1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree file for Marvell RD-AXPWiFiAP. 4*724ba675SRob Herring * 5*724ba675SRob Herring * Note: this board is shipped with a new generation boot loader that 6*724ba675SRob Herring * remaps internal registers at 0xf1000000. Therefore, if earlyprintk 7*724ba675SRob Herring * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option or the 8*724ba675SRob Herring * CONFIG_DEBUG_MVEBU_UART1_ALTERNATE option should be used. 9*724ba675SRob Herring * 10*724ba675SRob Herring * Copyright (C) 2013 Marvell 11*724ba675SRob Herring * 12*724ba675SRob Herring * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13*724ba675SRob Herring */ 14*724ba675SRob Herring 15*724ba675SRob Herring/dts-v1/; 16*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 17*724ba675SRob Herring#include <dt-bindings/input/input.h> 18*724ba675SRob Herring#include "armada-xp-mv78230.dtsi" 19*724ba675SRob Herring 20*724ba675SRob Herring/ { 21*724ba675SRob Herring model = "Marvell RD-AXPWiFiAP"; 22*724ba675SRob Herring compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp"; 23*724ba675SRob Herring 24*724ba675SRob Herring chosen { 25*724ba675SRob Herring stdout-path = "serial0:115200n8"; 26*724ba675SRob Herring }; 27*724ba675SRob Herring 28*724ba675SRob Herring memory@0 { 29*724ba675SRob Herring device_type = "memory"; 30*724ba675SRob Herring reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */ 31*724ba675SRob Herring }; 32*724ba675SRob Herring 33*724ba675SRob Herring soc { 34*724ba675SRob Herring ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 35*724ba675SRob Herring MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 36*724ba675SRob Herring MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000 37*724ba675SRob Herring MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>; 38*724ba675SRob Herring 39*724ba675SRob Herring internal-regs { 40*724ba675SRob Herring /* UART0 */ 41*724ba675SRob Herring serial@12000 { 42*724ba675SRob Herring status = "okay"; 43*724ba675SRob Herring }; 44*724ba675SRob Herring 45*724ba675SRob Herring /* UART1 */ 46*724ba675SRob Herring serial@12100 { 47*724ba675SRob Herring status = "okay"; 48*724ba675SRob Herring }; 49*724ba675SRob Herring 50*724ba675SRob Herring sata@a0000 { 51*724ba675SRob Herring nr-ports = <1>; 52*724ba675SRob Herring status = "okay"; 53*724ba675SRob Herring }; 54*724ba675SRob Herring 55*724ba675SRob Herring ethernet@70000 { 56*724ba675SRob Herring pinctrl-0 = <&ge0_rgmii_pins>; 57*724ba675SRob Herring pinctrl-names = "default"; 58*724ba675SRob Herring status = "okay"; 59*724ba675SRob Herring phy = <&phy0>; 60*724ba675SRob Herring phy-mode = "rgmii-id"; 61*724ba675SRob Herring }; 62*724ba675SRob Herring ethernet@74000 { 63*724ba675SRob Herring pinctrl-0 = <&ge1_rgmii_pins>; 64*724ba675SRob Herring pinctrl-names = "default"; 65*724ba675SRob Herring status = "okay"; 66*724ba675SRob Herring phy = <&phy1>; 67*724ba675SRob Herring phy-mode = "rgmii-id"; 68*724ba675SRob Herring }; 69*724ba675SRob Herring }; 70*724ba675SRob Herring }; 71*724ba675SRob Herring 72*724ba675SRob Herring gpio-keys { 73*724ba675SRob Herring compatible = "gpio-keys"; 74*724ba675SRob Herring pinctrl-0 = <&keys_pin>; 75*724ba675SRob Herring pinctrl-names = "default"; 76*724ba675SRob Herring 77*724ba675SRob Herring button-reset { 78*724ba675SRob Herring label = "Factory Reset Button"; 79*724ba675SRob Herring linux,code = <KEY_SETUP>; 80*724ba675SRob Herring gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 81*724ba675SRob Herring }; 82*724ba675SRob Herring }; 83*724ba675SRob Herring}; 84*724ba675SRob Herring 85*724ba675SRob Herring&mdio { 86*724ba675SRob Herring phy0: ethernet-phy@0 { 87*724ba675SRob Herring reg = <0>; 88*724ba675SRob Herring }; 89*724ba675SRob Herring 90*724ba675SRob Herring phy1: ethernet-phy@1 { 91*724ba675SRob Herring reg = <1>; 92*724ba675SRob Herring }; 93*724ba675SRob Herring}; 94*724ba675SRob Herring 95*724ba675SRob Herring&pciec { 96*724ba675SRob Herring status = "okay"; 97*724ba675SRob Herring 98*724ba675SRob Herring /* First mini-PCIe port */ 99*724ba675SRob Herring pcie@1,0 { 100*724ba675SRob Herring /* Port 0, Lane 0 */ 101*724ba675SRob Herring status = "okay"; 102*724ba675SRob Herring }; 103*724ba675SRob Herring 104*724ba675SRob Herring /* Second mini-PCIe port */ 105*724ba675SRob Herring pcie@2,0 { 106*724ba675SRob Herring /* Port 0, Lane 1 */ 107*724ba675SRob Herring status = "okay"; 108*724ba675SRob Herring }; 109*724ba675SRob Herring 110*724ba675SRob Herring /* Renesas uPD720202 USB 3.0 controller */ 111*724ba675SRob Herring pcie@3,0 { 112*724ba675SRob Herring /* Port 0, Lane 3 */ 113*724ba675SRob Herring status = "okay"; 114*724ba675SRob Herring }; 115*724ba675SRob Herring}; 116*724ba675SRob Herring 117*724ba675SRob Herring&pinctrl { 118*724ba675SRob Herring pinctrl-0 = <&phy_int_pin>; 119*724ba675SRob Herring pinctrl-names = "default"; 120*724ba675SRob Herring 121*724ba675SRob Herring keys_pin: keys-pin { 122*724ba675SRob Herring marvell,pins = "mpp33"; 123*724ba675SRob Herring marvell,function = "gpio"; 124*724ba675SRob Herring }; 125*724ba675SRob Herring 126*724ba675SRob Herring phy_int_pin: phy-int-pin { 127*724ba675SRob Herring marvell,pins = "mpp32"; 128*724ba675SRob Herring marvell,function = "gpio"; 129*724ba675SRob Herring }; 130*724ba675SRob Herring}; 131*724ba675SRob Herring 132*724ba675SRob Herring&spi0 { 133*724ba675SRob Herring status = "okay"; 134*724ba675SRob Herring 135*724ba675SRob Herring flash@0 { 136*724ba675SRob Herring #address-cells = <1>; 137*724ba675SRob Herring #size-cells = <1>; 138*724ba675SRob Herring compatible = "n25q128a13", "jedec,spi-nor"; 139*724ba675SRob Herring reg = <0>; /* Chip select 0 */ 140*724ba675SRob Herring spi-max-frequency = <108000000>; 141*724ba675SRob Herring }; 142*724ba675SRob Herring}; 143