xref: /linux/scripts/dtc/include-prefixes/arm/marvell/armada-388-clearfog.dts (revision 6e75ac5a824e1551764cd4bfce5ede3d5fafc407)
1724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2724ba675SRob Herring/*
3724ba675SRob Herring * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
4724ba675SRob Herring *
5724ba675SRob Herring *  Copyright (C) 2015 Russell King
6724ba675SRob Herring */
7724ba675SRob Herring
8724ba675SRob Herring/dts-v1/;
9724ba675SRob Herring#include "armada-388-clearfog.dtsi"
10724ba675SRob Herring
11724ba675SRob Herring/ {
12724ba675SRob Herring	model = "SolidRun Clearfog A1";
13724ba675SRob Herring	compatible = "solidrun,clearfog-a1", "marvell,armada388",
14724ba675SRob Herring		"marvell,armada385", "marvell,armada380";
15724ba675SRob Herring
16724ba675SRob Herring	soc {
17724ba675SRob Herring		internal-regs {
18724ba675SRob Herring			usb3@f0000 {
19724ba675SRob Herring				/* CON2, nearest CPU, USB2 only. */
20724ba675SRob Herring				status = "okay";
21724ba675SRob Herring			};
22724ba675SRob Herring		};
23724ba675SRob Herring
24724ba675SRob Herring		pcie {
25724ba675SRob Herring			pcie@3,0 {
26724ba675SRob Herring				/* Port 2, Lane 0. CON2, nearest CPU. */
27724ba675SRob Herring				reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
28724ba675SRob Herring				status = "okay";
29724ba675SRob Herring			};
30724ba675SRob Herring		};
31724ba675SRob Herring	};
32724ba675SRob Herring
33724ba675SRob Herring	gpio-keys {
34724ba675SRob Herring		compatible = "gpio-keys";
35724ba675SRob Herring		pinctrl-0 = <&rear_button_pins>;
36724ba675SRob Herring		pinctrl-names = "default";
37724ba675SRob Herring
38724ba675SRob Herring		button-0 {
39724ba675SRob Herring			/* The rear SW3 button */
40724ba675SRob Herring			label = "Rear Button";
41724ba675SRob Herring			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
42724ba675SRob Herring			linux,can-disable;
43724ba675SRob Herring			linux,code = <BTN_0>;
44724ba675SRob Herring		};
45724ba675SRob Herring	};
46724ba675SRob Herring};
47724ba675SRob Herring
48724ba675SRob Herring&eth1 {
49724ba675SRob Herring	/* ethernet@30000 */
50724ba675SRob Herring	phy-mode = "1000base-x";
51724ba675SRob Herring
52724ba675SRob Herring	fixed-link {
53724ba675SRob Herring		speed = <1000>;
54724ba675SRob Herring		full-duplex;
55724ba675SRob Herring	};
56724ba675SRob Herring};
57724ba675SRob Herring
58724ba675SRob Herring&expander0 {
59724ba675SRob Herring	/*
60724ba675SRob Herring	 * PCA9655 GPIO expander:
61724ba675SRob Herring	 *  0-CON3 CLKREQ#
62724ba675SRob Herring	 *  1-CON3 PERST#
63724ba675SRob Herring	 *  2-CON2 PERST#
64724ba675SRob Herring	 *  3-CON3 W_DISABLE
65724ba675SRob Herring	 *  4-CON2 CLKREQ#
66724ba675SRob Herring	 *  5-USB3 overcurrent
67724ba675SRob Herring	 *  6-USB3 power
68724ba675SRob Herring	 *  7-CON2 W_DISABLE
69724ba675SRob Herring	 *  8-JP4 P1
70724ba675SRob Herring	 *  9-JP4 P4
71724ba675SRob Herring	 * 10-JP4 P5
72724ba675SRob Herring	 * 11-m.2 DEVSLP
73724ba675SRob Herring	 * 12-SFP_LOS
74724ba675SRob Herring	 * 13-SFP_TX_FAULT
75724ba675SRob Herring	 * 14-SFP_TX_DISABLE
76724ba675SRob Herring	 * 15-SFP_MOD_DEF0
77724ba675SRob Herring	 */
78724ba675SRob Herring	pcie2-0-clkreq-hog {
79724ba675SRob Herring		gpio-hog;
80724ba675SRob Herring		gpios = <4 GPIO_ACTIVE_LOW>;
81724ba675SRob Herring		input;
82724ba675SRob Herring		line-name = "pcie2.0-clkreq";
83724ba675SRob Herring	};
84724ba675SRob Herring	pcie2-0-w-disable-hog {
85724ba675SRob Herring		gpio-hog;
86724ba675SRob Herring		gpios = <7 GPIO_ACTIVE_LOW>;
87724ba675SRob Herring		output-low;
88724ba675SRob Herring		line-name = "pcie2.0-w-disable";
89724ba675SRob Herring	};
90724ba675SRob Herring};
91724ba675SRob Herring
92724ba675SRob Herring&mdio {
93724ba675SRob Herring	status = "okay";
94724ba675SRob Herring
95*6e75ac5aSLinus Walleij	ethernet-switch@4 {
96724ba675SRob Herring		compatible = "marvell,mv88e6085";
97724ba675SRob Herring		reg = <4>;
98724ba675SRob Herring		pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
99724ba675SRob Herring		pinctrl-names = "default";
100724ba675SRob Herring
101*6e75ac5aSLinus Walleij		ethernet-ports {
102724ba675SRob Herring			#address-cells = <1>;
103724ba675SRob Herring			#size-cells = <0>;
104724ba675SRob Herring
105*6e75ac5aSLinus Walleij			ethernet-port@0 {
106724ba675SRob Herring				reg = <0>;
107724ba675SRob Herring				label = "lan5";
108724ba675SRob Herring			};
109724ba675SRob Herring
110*6e75ac5aSLinus Walleij			ethernet-port@1 {
111724ba675SRob Herring				reg = <1>;
112724ba675SRob Herring				label = "lan4";
113724ba675SRob Herring			};
114724ba675SRob Herring
115*6e75ac5aSLinus Walleij			ethernet-port@2 {
116724ba675SRob Herring				reg = <2>;
117724ba675SRob Herring				label = "lan3";
118724ba675SRob Herring			};
119724ba675SRob Herring
120*6e75ac5aSLinus Walleij			ethernet-port@3 {
121724ba675SRob Herring				reg = <3>;
122724ba675SRob Herring				label = "lan2";
123724ba675SRob Herring			};
124724ba675SRob Herring
125*6e75ac5aSLinus Walleij			ethernet-port@4 {
126724ba675SRob Herring				reg = <4>;
127724ba675SRob Herring				label = "lan1";
128724ba675SRob Herring			};
129724ba675SRob Herring
130*6e75ac5aSLinus Walleij			ethernet-port@5 {
131724ba675SRob Herring				reg = <5>;
132724ba675SRob Herring				ethernet = <&eth1>;
133724ba675SRob Herring				phy-mode = "1000base-x";
134724ba675SRob Herring
135724ba675SRob Herring				fixed-link {
136724ba675SRob Herring					speed = <1000>;
137724ba675SRob Herring					full-duplex;
138724ba675SRob Herring				};
139724ba675SRob Herring			};
140724ba675SRob Herring
141*6e75ac5aSLinus Walleij			ethernet-port@6 {
142724ba675SRob Herring				/* 88E1512 external phy */
143724ba675SRob Herring				reg = <6>;
144724ba675SRob Herring				label = "lan6";
145724ba675SRob Herring				phy-mode = "rgmii-id";
146724ba675SRob Herring
147724ba675SRob Herring				fixed-link {
148724ba675SRob Herring					speed = <1000>;
149724ba675SRob Herring					full-duplex;
150724ba675SRob Herring				};
151724ba675SRob Herring			};
152724ba675SRob Herring		};
153724ba675SRob Herring	};
154724ba675SRob Herring};
155724ba675SRob Herring
156724ba675SRob Herring&pinctrl {
157724ba675SRob Herring	clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
158724ba675SRob Herring		marvell,pins = "mpp46";
159724ba675SRob Herring		marvell,function = "ref";
160724ba675SRob Herring	};
161724ba675SRob Herring	clearfog_dsa0_pins: clearfog-dsa0-pins {
162724ba675SRob Herring		marvell,pins = "mpp23", "mpp41";
163724ba675SRob Herring		marvell,function = "gpio";
164724ba675SRob Herring	};
165724ba675SRob Herring	clearfog_spi1_cs_pins: spi1-cs-pins {
166724ba675SRob Herring		marvell,pins = "mpp55";
167724ba675SRob Herring		marvell,function = "spi1";
168724ba675SRob Herring	};
169724ba675SRob Herring	rear_button_pins: rear-button-pins {
170724ba675SRob Herring		marvell,pins = "mpp34";
171724ba675SRob Herring		marvell,function = "gpio";
172724ba675SRob Herring	};
173724ba675SRob Herring};
174724ba675SRob Herring
175724ba675SRob Herring&spi1 {
176724ba675SRob Herring	/*
177724ba675SRob Herring	 * Add SPI CS pins for clearfog:
178724ba675SRob Herring	 * CS0: W25Q32
179724ba675SRob Herring	 * CS1:
180724ba675SRob Herring	 * CS2: mikrobus
181724ba675SRob Herring	 */
182724ba675SRob Herring	pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
183724ba675SRob Herring};
184