xref: /linux/scripts/dtc/include-prefixes/arm/marvell/armada-385-clearfog-gtr-s4.dts (revision 6e75ac5a824e1551764cd4bfce5ede3d5fafc407)

// SPDX-License-Identifier: (GPL-2.0 OR MIT)

#include "armada-385-clearfog-gtr.dtsi"

/ {
	model = "SolidRun Clearfog GTR S4";
};

&sfp0 {
	tx-fault-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>;
};

&mdio {
	switch0: ethernet-switch@4 {
		compatible = "marvell,mv88e6085";
		reg = <4>;
		pinctrl-names = "default";
		pinctrl-0 = <&cf_gtr_switch_reset_pins>;
		reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			ethernet-port@1 {
				reg = <1>;
				label = "lan2";
				phy-handle = <&switch0phy0>;
			};

			ethernet-port@2 {
				reg = <2>;
				label = "lan1";
				phy-handle = <&switch0phy1>;
			};

			ethernet-port@3 {
				reg = <3>;
				label = "lan4";
				phy-handle = <&switch0phy2>;
			};

			ethernet-port@4 {
				reg = <4>;
				label = "lan3";
				phy-handle = <&switch0phy3>;
			};

			ethernet-port@5 {
				reg = <5>;
				phy-mode = "2500base-x";
				ethernet = <&eth1>;

				fixed-link {
					speed = <2500>;
					full-duplex;
				};
			};

		};

		mdio {
			#address-cells = <1>;
			#size-cells = <0>;

			switch0phy0: ethernet-phy@11 {
				reg = <0x11>;
			};

			switch0phy1: ethernet-phy@12 {
				reg = <0x12>;
			};

			switch0phy2: ethernet-phy@13 {
				reg = <0x13>;
			};

			switch0phy3: ethernet-phy@14 {
				reg = <0x14>;
			};
		};

	};
};