xref: /linux/scripts/dtc/include-prefixes/arm/marvell/armada-370-synology-ds213j.dts (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree file for Synology DS213j
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
6*724ba675SRob Herring *
7*724ba675SRob Herring * Note: this Device Tree assumes that the bootloader has remapped the
8*724ba675SRob Herring * internal registers to 0xf1000000 (instead of the old 0xd0000000).
9*724ba675SRob Herring * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
10*724ba675SRob Herring * bootloaders provided by Marvell. It is used in recent versions of
11*724ba675SRob Herring * DSM software provided by Synology. Nonetheless, some earlier boards
12*724ba675SRob Herring * were delivered with an older version of u-boot that left internal
13*724ba675SRob Herring * registers mapped at 0xd0000000. If you have such a device you will
14*724ba675SRob Herring * not be able to directly boot a kernel based on this Device Tree. In
15*724ba675SRob Herring * that case, the preferred solution is to update your bootloader (e.g.
16*724ba675SRob Herring * by upgrading to latest version of DSM, or building a new one and
17*724ba675SRob Herring * installing it from u-boot prompt) or adjust the Devive Tree
18*724ba675SRob Herring * (s/0xf1000000/0xd0000000/ in 'ranges' below).
19*724ba675SRob Herring */
20*724ba675SRob Herring
21*724ba675SRob Herring/dts-v1/;
22*724ba675SRob Herring
23*724ba675SRob Herring#include <dt-bindings/input/input.h>
24*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
25*724ba675SRob Herring#include "armada-370.dtsi"
26*724ba675SRob Herring
27*724ba675SRob Herring/ {
28*724ba675SRob Herring	model = "Synology DS213j";
29*724ba675SRob Herring	compatible = "synology,ds213j", "marvell,armada370",
30*724ba675SRob Herring		     "marvell,armada-370-xp";
31*724ba675SRob Herring
32*724ba675SRob Herring	chosen {
33*724ba675SRob Herring		stdout-path = "serial0:115200n8";
34*724ba675SRob Herring	};
35*724ba675SRob Herring
36*724ba675SRob Herring	memory@0 {
37*724ba675SRob Herring		device_type = "memory";
38*724ba675SRob Herring		reg = <0x00000000 0x20000000>; /* 512 MB */
39*724ba675SRob Herring	};
40*724ba675SRob Herring
41*724ba675SRob Herring	soc {
42*724ba675SRob Herring		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
43*724ba675SRob Herring			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
44*724ba675SRob Herring			  MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
45*724ba675SRob Herring
46*724ba675SRob Herring		internal-regs {
47*724ba675SRob Herring
48*724ba675SRob Herring			/* RTC provided by Seiko S-35390A I2C RTC chip below */
49*724ba675SRob Herring			rtc@10300 {
50*724ba675SRob Herring				status = "disabled";
51*724ba675SRob Herring			};
52*724ba675SRob Herring
53*724ba675SRob Herring			i2c@11000 {
54*724ba675SRob Herring				compatible = "marvell,mv64xxx-i2c";
55*724ba675SRob Herring				pinctrl-0 = <&i2c0_pins>;
56*724ba675SRob Herring				pinctrl-names = "default";
57*724ba675SRob Herring				clock-frequency = <400000>;
58*724ba675SRob Herring				status = "okay";
59*724ba675SRob Herring
60*724ba675SRob Herring				/* Main device RTC chip */
61*724ba675SRob Herring				s35390a: s35390a@30 {
62*724ba675SRob Herring					 compatible = "sii,s35390a";
63*724ba675SRob Herring					 reg = <0x30>;
64*724ba675SRob Herring				};
65*724ba675SRob Herring			};
66*724ba675SRob Herring
67*724ba675SRob Herring			/* Connected to a header on device's PCB */
68*724ba675SRob Herring			serial@12000 {
69*724ba675SRob Herring				status = "okay";
70*724ba675SRob Herring			};
71*724ba675SRob Herring
72*724ba675SRob Herring			/* Connected to a TI MSP430F2111 for power control */
73*724ba675SRob Herring			serial@12100 {
74*724ba675SRob Herring				status = "okay";
75*724ba675SRob Herring			};
76*724ba675SRob Herring
77*724ba675SRob Herring			poweroff@12100 {
78*724ba675SRob Herring				compatible = "synology,power-off";
79*724ba675SRob Herring				reg = <0x12100 0x100>;
80*724ba675SRob Herring				clocks = <&coreclk 0>;
81*724ba675SRob Herring			};
82*724ba675SRob Herring
83*724ba675SRob Herring			/* rear USB port, near reset button */
84*724ba675SRob Herring			usb@50000 {
85*724ba675SRob Herring				status = "okay";
86*724ba675SRob Herring			};
87*724ba675SRob Herring
88*724ba675SRob Herring			/* rear USB port, near RJ45 port */
89*724ba675SRob Herring			usb@51000 {
90*724ba675SRob Herring				status = "okay";
91*724ba675SRob Herring			};
92*724ba675SRob Herring
93*724ba675SRob Herring			ethernet@70000 {
94*724ba675SRob Herring				status = "okay";
95*724ba675SRob Herring				phy = <&phy1>;
96*724ba675SRob Herring				phy-mode = "sgmii";
97*724ba675SRob Herring			};
98*724ba675SRob Herring
99*724ba675SRob Herring			sata@a0000 {
100*724ba675SRob Herring				nr-ports = <2>;
101*724ba675SRob Herring				status = "okay";
102*724ba675SRob Herring			};
103*724ba675SRob Herring		};
104*724ba675SRob Herring	};
105*724ba675SRob Herring
106*724ba675SRob Herring	gpio-fan-32-38 {
107*724ba675SRob Herring		status = "okay";
108*724ba675SRob Herring		compatible = "gpio-fan";
109*724ba675SRob Herring		pinctrl-0 = <&fan_ctrl_low_pin &fan_ctrl_mid_pin
110*724ba675SRob Herring			     &fan_ctrl_high_pin &fan_alarm_pin>;
111*724ba675SRob Herring		pinctrl-names = "default";
112*724ba675SRob Herring		gpios = <&gpio1 31 GPIO_ACTIVE_HIGH
113*724ba675SRob Herring			 &gpio2  0 GPIO_ACTIVE_HIGH
114*724ba675SRob Herring			 &gpio2  1 GPIO_ACTIVE_HIGH>;
115*724ba675SRob Herring		alarm-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
116*724ba675SRob Herring		gpio-fan,speed-map = <    0 0
117*724ba675SRob Herring				       1000 1
118*724ba675SRob Herring				       1150 2
119*724ba675SRob Herring				       1350 4
120*724ba675SRob Herring				       1500 3
121*724ba675SRob Herring				       1650 5
122*724ba675SRob Herring				       1750 6
123*724ba675SRob Herring				       1900 7 >;
124*724ba675SRob Herring	};
125*724ba675SRob Herring
126*724ba675SRob Herring	gpio-leds {
127*724ba675SRob Herring		compatible = "gpio-leds";
128*724ba675SRob Herring		pinctrl-0 = <&disk1_led_pin
129*724ba675SRob Herring			     &disk2_led_pin>;
130*724ba675SRob Herring		pinctrl-names = "default";
131*724ba675SRob Herring
132*724ba675SRob Herring		disk1-led-amber {
133*724ba675SRob Herring			label = "synology:amber:disk1";
134*724ba675SRob Herring			gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
135*724ba675SRob Herring			default-state = "keep";
136*724ba675SRob Herring		};
137*724ba675SRob Herring
138*724ba675SRob Herring		disk2-led-amber {
139*724ba675SRob Herring			label = "synology:amber:disk2";
140*724ba675SRob Herring			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
141*724ba675SRob Herring			default-state = "keep";
142*724ba675SRob Herring		};
143*724ba675SRob Herring	};
144*724ba675SRob Herring
145*724ba675SRob Herring	regulators {
146*724ba675SRob Herring		compatible = "simple-bus";
147*724ba675SRob Herring		#address-cells = <1>;
148*724ba675SRob Herring		#size-cells = <0>;
149*724ba675SRob Herring		pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
150*724ba675SRob Herring		pinctrl-names = "default";
151*724ba675SRob Herring
152*724ba675SRob Herring		sata1_regulator: sata1-regulator@1 {
153*724ba675SRob Herring			compatible = "regulator-fixed";
154*724ba675SRob Herring			reg = <1>;
155*724ba675SRob Herring			regulator-name = "SATA1 Power";
156*724ba675SRob Herring			regulator-min-microvolt = <5000000>;
157*724ba675SRob Herring			regulator-max-microvolt = <5000000>;
158*724ba675SRob Herring			startup-delay-us = <2000000>;
159*724ba675SRob Herring			enable-active-high;
160*724ba675SRob Herring			regulator-always-on;
161*724ba675SRob Herring			regulator-boot-on;
162*724ba675SRob Herring			gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
163*724ba675SRob Herring		};
164*724ba675SRob Herring
165*724ba675SRob Herring		sata2_regulator: sata2-regulator@2 {
166*724ba675SRob Herring			compatible = "regulator-fixed";
167*724ba675SRob Herring			reg = <2>;
168*724ba675SRob Herring			regulator-name = "SATA2 Power";
169*724ba675SRob Herring			regulator-min-microvolt = <5000000>;
170*724ba675SRob Herring			regulator-max-microvolt = <5000000>;
171*724ba675SRob Herring			startup-delay-us = <4000000>;
172*724ba675SRob Herring			enable-active-high;
173*724ba675SRob Herring			regulator-always-on;
174*724ba675SRob Herring			regulator-boot-on;
175*724ba675SRob Herring			gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>;
176*724ba675SRob Herring		};
177*724ba675SRob Herring	};
178*724ba675SRob Herring};
179*724ba675SRob Herring
180*724ba675SRob Herring&mdio {
181*724ba675SRob Herring	phy1: ethernet-phy@1 { /* Marvell 88E1512 */
182*724ba675SRob Herring		reg = <1>;
183*724ba675SRob Herring	};
184*724ba675SRob Herring};
185*724ba675SRob Herring
186*724ba675SRob Herring&pinctrl {
187*724ba675SRob Herring	disk1_led_pin: disk1-led-pin {
188*724ba675SRob Herring		marvell,pins = "mpp31";
189*724ba675SRob Herring		marvell,function = "gpio";
190*724ba675SRob Herring	};
191*724ba675SRob Herring
192*724ba675SRob Herring	disk2_led_pin: disk2-led-pin {
193*724ba675SRob Herring		marvell,pins = "mpp32";
194*724ba675SRob Herring		marvell,function = "gpio";
195*724ba675SRob Herring	};
196*724ba675SRob Herring
197*724ba675SRob Herring	sata1_pwr_pin: sata1-pwr-pin {
198*724ba675SRob Herring		marvell,pins = "mpp37";
199*724ba675SRob Herring		marvell,function = "gpio";
200*724ba675SRob Herring	};
201*724ba675SRob Herring
202*724ba675SRob Herring	sata2_pwr_pin: sata2-pwr-pin {
203*724ba675SRob Herring		marvell,pins = "mpp62";
204*724ba675SRob Herring		marvell,function = "gpio";
205*724ba675SRob Herring	};
206*724ba675SRob Herring
207*724ba675SRob Herring	sata1_pres_pin: sata1-pres-pin {
208*724ba675SRob Herring		marvell,pins = "mpp60";
209*724ba675SRob Herring		marvell,function = "gpio";
210*724ba675SRob Herring	};
211*724ba675SRob Herring
212*724ba675SRob Herring	sata2_pres_pin: sata2-pres-pin {
213*724ba675SRob Herring		marvell,pins = "mpp48";
214*724ba675SRob Herring		marvell,function = "gpio";
215*724ba675SRob Herring	};
216*724ba675SRob Herring
217*724ba675SRob Herring	syno_id_bit0_pin: syno-id-bit0-pin {
218*724ba675SRob Herring		marvell,pins = "mpp55";
219*724ba675SRob Herring		marvell,function = "gpio";
220*724ba675SRob Herring	};
221*724ba675SRob Herring
222*724ba675SRob Herring	syno_id_bit1_pin: syno-id-bit1-pin {
223*724ba675SRob Herring		marvell,pins = "mpp56";
224*724ba675SRob Herring		marvell,function = "gpio";
225*724ba675SRob Herring	};
226*724ba675SRob Herring
227*724ba675SRob Herring	syno_id_bit2_pin: syno-id-bit2-pin {
228*724ba675SRob Herring		marvell,pins = "mpp57";
229*724ba675SRob Herring		marvell,function = "gpio";
230*724ba675SRob Herring	};
231*724ba675SRob Herring
232*724ba675SRob Herring	syno_id_bit3_pin: syno-id-bit3-pin {
233*724ba675SRob Herring		marvell,pins = "mpp58";
234*724ba675SRob Herring		marvell,function = "gpio";
235*724ba675SRob Herring	};
236*724ba675SRob Herring
237*724ba675SRob Herring	fan_ctrl_low_pin: fan-ctrl-low-pin {
238*724ba675SRob Herring		marvell,pins = "mpp65";
239*724ba675SRob Herring		marvell,function = "gpio";
240*724ba675SRob Herring	};
241*724ba675SRob Herring
242*724ba675SRob Herring	fan_ctrl_mid_pin: fan-ctrl-mid-pin {
243*724ba675SRob Herring		marvell,pins = "mpp64";
244*724ba675SRob Herring		marvell,function = "gpio";
245*724ba675SRob Herring	};
246*724ba675SRob Herring
247*724ba675SRob Herring	fan_ctrl_high_pin: fan-ctrl-high-pin {
248*724ba675SRob Herring		marvell,pins = "mpp63";
249*724ba675SRob Herring		marvell,function = "gpio";
250*724ba675SRob Herring	};
251*724ba675SRob Herring
252*724ba675SRob Herring	fan_alarm_pin: fan-alarm-pin {
253*724ba675SRob Herring		marvell,pins = "mpp38";
254*724ba675SRob Herring		marvell,function = "gpio";
255*724ba675SRob Herring	};
256*724ba675SRob Herring};
257*724ba675SRob Herring
258*724ba675SRob Herring&spi0 {
259*724ba675SRob Herring	status = "okay";
260*724ba675SRob Herring
261*724ba675SRob Herring	flash@0 {
262*724ba675SRob Herring		#address-cells = <1>;
263*724ba675SRob Herring		#size-cells = <1>;
264*724ba675SRob Herring		compatible = "micron,n25q064", "jedec,spi-nor";
265*724ba675SRob Herring		reg = <0>; /* Chip select 0 */
266*724ba675SRob Herring		spi-max-frequency = <20000000>;
267*724ba675SRob Herring
268*724ba675SRob Herring		/*
269*724ba675SRob Herring		 * Warning!
270*724ba675SRob Herring		 *
271*724ba675SRob Herring		 * Synology u-boot uses its compiled-in environment
272*724ba675SRob Herring		 * and it seems Synology did not care to change u-boot
273*724ba675SRob Herring		 * default configuration in order to allow saving a
274*724ba675SRob Herring		 * modified environment at a sensible location. So,
275*724ba675SRob Herring		 * if you do a 'saveenv' under u-boot, your modified
276*724ba675SRob Herring		 * environment will be saved at 1MB after the start
277*724ba675SRob Herring		 * of the flash, i.e. in the middle of the uImage.
278*724ba675SRob Herring		 * For that reason, it is strongly advised not to
279*724ba675SRob Herring		 * change the default environment, unless you know
280*724ba675SRob Herring		 * what you are doing.
281*724ba675SRob Herring		 */
282*724ba675SRob Herring		partition@0 { /* u-boot */
283*724ba675SRob Herring			label = "RedBoot";
284*724ba675SRob Herring			reg = <0x00000000 0x000c0000>; /* 768KB */
285*724ba675SRob Herring		};
286*724ba675SRob Herring
287*724ba675SRob Herring		partition@c0000 { /* uImage */
288*724ba675SRob Herring			label = "zImage";
289*724ba675SRob Herring			reg = <0x000c0000 0x002d0000>; /* 2880KB */
290*724ba675SRob Herring		};
291*724ba675SRob Herring
292*724ba675SRob Herring		partition@390000 { /* uInitramfs */
293*724ba675SRob Herring			label = "rd.gz";
294*724ba675SRob Herring			reg = <0x00390000 0x00440000>; /* 4250KB */
295*724ba675SRob Herring		};
296*724ba675SRob Herring
297*724ba675SRob Herring		partition@7d0000 { /* MAC address and serial number */
298*724ba675SRob Herring			label = "vendor";
299*724ba675SRob Herring			reg = <0x007d0000 0x00010000>; /* 64KB */
300*724ba675SRob Herring		};
301*724ba675SRob Herring
302*724ba675SRob Herring		partition@7e0000 {
303*724ba675SRob Herring			label = "RedBoot config";
304*724ba675SRob Herring			reg = <0x007e0000 0x00010000>; /* 64KB */
305*724ba675SRob Herring		};
306*724ba675SRob Herring
307*724ba675SRob Herring		partition@7f0000 {
308*724ba675SRob Herring			label = "FIS directory";
309*724ba675SRob Herring			reg = <0x007f0000 0x00010000>; /* 64KB */
310*724ba675SRob Herring		};
311*724ba675SRob Herring	};
312*724ba675SRob Herring};
313