1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree file for D-Link DNS-327L 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2015, Andrew Andrianov <andrew@ncrmnt.org> 6*724ba675SRob Herring */ 7*724ba675SRob Herring 8*724ba675SRob Herring/* Remaining unsolved: 9*724ba675SRob Herring * There's still some unknown device on i2c address 0x13 10*724ba675SRob Herring */ 11*724ba675SRob Herring 12*724ba675SRob Herring/dts-v1/; 13*724ba675SRob Herring 14*724ba675SRob Herring#include <dt-bindings/input/input.h> 15*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 16*724ba675SRob Herring#include "armada-370.dtsi" 17*724ba675SRob Herring 18*724ba675SRob Herring/ { 19*724ba675SRob Herring model = "D-Link DNS-327L"; 20*724ba675SRob Herring compatible = "dlink,dns327l", 21*724ba675SRob Herring "marvell,armada370", 22*724ba675SRob Herring "marvell,armada-370-xp"; 23*724ba675SRob Herring 24*724ba675SRob Herring chosen { 25*724ba675SRob Herring stdout-path = &uart0; 26*724ba675SRob Herring }; 27*724ba675SRob Herring 28*724ba675SRob Herring memory@0 { 29*724ba675SRob Herring device_type = "memory"; 30*724ba675SRob Herring reg = <0x00000000 0x20000000>; /* 512 MiB */ 31*724ba675SRob Herring }; 32*724ba675SRob Herring 33*724ba675SRob Herring soc { 34*724ba675SRob Herring ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 35*724ba675SRob Herring MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000 36*724ba675SRob Herring MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>; 37*724ba675SRob Herring 38*724ba675SRob Herring internal-regs { 39*724ba675SRob Herring sata@a0000 { 40*724ba675SRob Herring nr-ports = <2>; 41*724ba675SRob Herring status = "okay"; 42*724ba675SRob Herring }; 43*724ba675SRob Herring 44*724ba675SRob Herring usb@50000 { 45*724ba675SRob Herring status = "okay"; 46*724ba675SRob Herring }; 47*724ba675SRob Herring }; 48*724ba675SRob Herring }; 49*724ba675SRob Herring 50*724ba675SRob Herring gpio-keys { 51*724ba675SRob Herring compatible = "gpio-keys"; 52*724ba675SRob Herring pinctrl-0 = < 53*724ba675SRob Herring &backup_button_pin 54*724ba675SRob Herring &power_button_pin 55*724ba675SRob Herring &reset_button_pin>; 56*724ba675SRob Herring pinctrl-names = "default"; 57*724ba675SRob Herring 58*724ba675SRob Herring power-button { 59*724ba675SRob Herring label = "Power Button"; 60*724ba675SRob Herring linux,code = <KEY_POWER>; 61*724ba675SRob Herring gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 62*724ba675SRob Herring }; 63*724ba675SRob Herring 64*724ba675SRob Herring backup-button { 65*724ba675SRob Herring label = "Backup Button"; 66*724ba675SRob Herring linux,code = <KEY_COPY>; 67*724ba675SRob Herring gpios = <&gpio1 31 GPIO_ACTIVE_LOW>; 68*724ba675SRob Herring }; 69*724ba675SRob Herring 70*724ba675SRob Herring reset-button { 71*724ba675SRob Herring label = "Reset Button"; 72*724ba675SRob Herring linux,code = <KEY_RESTART>; 73*724ba675SRob Herring gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 74*724ba675SRob Herring }; 75*724ba675SRob Herring }; 76*724ba675SRob Herring 77*724ba675SRob Herring gpio-leds { 78*724ba675SRob Herring compatible = "gpio-leds"; 79*724ba675SRob Herring pinctrl-0 = < 80*724ba675SRob Herring &sata_l_amber_pin 81*724ba675SRob Herring &sata_r_amber_pin 82*724ba675SRob Herring &backup_led_pin 83*724ba675SRob Herring /* Ensure these are managed by hardware */ 84*724ba675SRob Herring &sata_l_white_pin 85*724ba675SRob Herring &sata_r_white_pin>; 86*724ba675SRob Herring 87*724ba675SRob Herring pinctrl-names = "default"; 88*724ba675SRob Herring 89*724ba675SRob Herring led-sata-r-amber { 90*724ba675SRob Herring label = "dns327l:amber:sata-r"; 91*724ba675SRob Herring gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; 92*724ba675SRob Herring default-state = "keep"; 93*724ba675SRob Herring }; 94*724ba675SRob Herring 95*724ba675SRob Herring led-sata-l-amber { 96*724ba675SRob Herring label = "dns327l:amber:sata-l"; 97*724ba675SRob Herring gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; 98*724ba675SRob Herring default-state = "keep"; 99*724ba675SRob Herring }; 100*724ba675SRob Herring 101*724ba675SRob Herring led-backup { 102*724ba675SRob Herring label = "dns327l:white:usb"; 103*724ba675SRob Herring gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; 104*724ba675SRob Herring default-state = "keep"; 105*724ba675SRob Herring }; 106*724ba675SRob Herring }; 107*724ba675SRob Herring 108*724ba675SRob Herring regulators { 109*724ba675SRob Herring compatible = "simple-bus"; 110*724ba675SRob Herring #address-cells = <1>; 111*724ba675SRob Herring #size-cells = <0>; 112*724ba675SRob Herring 113*724ba675SRob Herring usb_power: regulator@1 { 114*724ba675SRob Herring compatible = "regulator-fixed"; 115*724ba675SRob Herring reg = <1>; 116*724ba675SRob Herring pinctrl-0 = <&xhci_pwr_pin>; 117*724ba675SRob Herring pinctrl-names = "default"; 118*724ba675SRob Herring regulator-name = "USB3.0 Port Power"; 119*724ba675SRob Herring regulator-min-microvolt = <5000000>; 120*724ba675SRob Herring regulator-max-microvolt = <5000000>; 121*724ba675SRob Herring enable-active-high; 122*724ba675SRob Herring regulator-boot-on; 123*724ba675SRob Herring regulator-always-on; 124*724ba675SRob Herring gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>; 125*724ba675SRob Herring }; 126*724ba675SRob Herring 127*724ba675SRob Herring sata_r_power: regulator@2 { 128*724ba675SRob Herring compatible = "regulator-fixed"; 129*724ba675SRob Herring reg = <2>; 130*724ba675SRob Herring pinctrl-0 = <&sata_r_pwr_pin>; 131*724ba675SRob Herring pinctrl-names = "default"; 132*724ba675SRob Herring regulator-name = "SATA-R Power"; 133*724ba675SRob Herring regulator-min-microvolt = <5000000>; 134*724ba675SRob Herring regulator-max-microvolt = <5000000>; 135*724ba675SRob Herring startup-delay-us = <2000000>; 136*724ba675SRob Herring enable-active-high; 137*724ba675SRob Herring regulator-always-on; 138*724ba675SRob Herring regulator-boot-on; 139*724ba675SRob Herring gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; 140*724ba675SRob Herring }; 141*724ba675SRob Herring 142*724ba675SRob Herring sata_l_power: regulator@3 { 143*724ba675SRob Herring compatible = "regulator-fixed"; 144*724ba675SRob Herring reg = <3>; 145*724ba675SRob Herring pinctrl-0 = <&sata_l_pwr_pin>; 146*724ba675SRob Herring pinctrl-names = "default"; 147*724ba675SRob Herring regulator-name = "SATA-L Power"; 148*724ba675SRob Herring regulator-min-microvolt = <5000000>; 149*724ba675SRob Herring regulator-max-microvolt = <5000000>; 150*724ba675SRob Herring startup-delay-us = <4000000>; 151*724ba675SRob Herring enable-active-high; 152*724ba675SRob Herring regulator-always-on; 153*724ba675SRob Herring regulator-boot-on; 154*724ba675SRob Herring gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; 155*724ba675SRob Herring }; 156*724ba675SRob Herring }; 157*724ba675SRob Herring}; 158*724ba675SRob Herring 159*724ba675SRob Herring&pciec { 160*724ba675SRob Herring status = "okay"; 161*724ba675SRob Herring 162*724ba675SRob Herring pcie@1,0 { 163*724ba675SRob Herring /* Port 0, Lane 0 */ 164*724ba675SRob Herring status = "okay"; 165*724ba675SRob Herring }; 166*724ba675SRob Herring 167*724ba675SRob Herring pcie@2,0 { 168*724ba675SRob Herring /* Port 1, Lane 0 */ 169*724ba675SRob Herring status = "okay"; 170*724ba675SRob Herring }; 171*724ba675SRob Herring}; 172*724ba675SRob Herring 173*724ba675SRob Herring&pinctrl { 174*724ba675SRob Herring sata_l_white_pin: sata-l-white-pin { 175*724ba675SRob Herring marvell,pins = "mpp57"; 176*724ba675SRob Herring marvell,function = "sata0"; 177*724ba675SRob Herring }; 178*724ba675SRob Herring 179*724ba675SRob Herring sata_r_white_pin: sata-r-white-pin { 180*724ba675SRob Herring marvell,pins = "mpp55"; 181*724ba675SRob Herring marvell,function = "sata1"; 182*724ba675SRob Herring }; 183*724ba675SRob Herring 184*724ba675SRob Herring sata_r_amber_pin: sata-r-amber-pin { 185*724ba675SRob Herring marvell,pins = "mpp52"; 186*724ba675SRob Herring marvell,function = "gpio"; 187*724ba675SRob Herring }; 188*724ba675SRob Herring 189*724ba675SRob Herring sata_l_amber_pin: sata-l-amber-pin { 190*724ba675SRob Herring marvell,pins = "mpp53"; 191*724ba675SRob Herring marvell,function = "gpio"; 192*724ba675SRob Herring }; 193*724ba675SRob Herring 194*724ba675SRob Herring backup_led_pin: backup-led-pin { 195*724ba675SRob Herring marvell,pins = "mpp61"; 196*724ba675SRob Herring marvell,function = "gpo"; 197*724ba675SRob Herring }; 198*724ba675SRob Herring 199*724ba675SRob Herring xhci_pwr_pin: xhci-pwr-pin { 200*724ba675SRob Herring marvell,pins = "mpp13"; 201*724ba675SRob Herring marvell,function = "gpio"; 202*724ba675SRob Herring }; 203*724ba675SRob Herring 204*724ba675SRob Herring sata_r_pwr_pin: sata-r-pwr-pin { 205*724ba675SRob Herring marvell,pins = "mpp54"; 206*724ba675SRob Herring marvell,function = "gpio"; 207*724ba675SRob Herring }; 208*724ba675SRob Herring 209*724ba675SRob Herring sata_l_pwr_pin: sata-l-pwr-pin { 210*724ba675SRob Herring marvell,pins = "mpp56"; 211*724ba675SRob Herring marvell,function = "gpio"; 212*724ba675SRob Herring }; 213*724ba675SRob Herring 214*724ba675SRob Herring uart1_pins: uart1-pins { 215*724ba675SRob Herring marvell,pins = "mpp60", "mpp61"; 216*724ba675SRob Herring marvell,function = "uart1"; 217*724ba675SRob Herring }; 218*724ba675SRob Herring 219*724ba675SRob Herring power_button_pin: power-button-pin { 220*724ba675SRob Herring marvell,pins = "mpp65"; 221*724ba675SRob Herring marvell,function = "gpio"; 222*724ba675SRob Herring }; 223*724ba675SRob Herring 224*724ba675SRob Herring backup_button_pin: backup-button-pin { 225*724ba675SRob Herring marvell,pins = "mpp63"; 226*724ba675SRob Herring marvell,function = "gpio"; 227*724ba675SRob Herring }; 228*724ba675SRob Herring 229*724ba675SRob Herring reset_button_pin: reset-button-pin { 230*724ba675SRob Herring marvell,pins = "mpp64"; 231*724ba675SRob Herring marvell,function = "gpio"; 232*724ba675SRob Herring }; 233*724ba675SRob Herring}; 234*724ba675SRob Herring 235*724ba675SRob Herring/* Serial console */ 236*724ba675SRob Herring&uart0 { 237*724ba675SRob Herring status = "okay"; 238*724ba675SRob Herring}; 239*724ba675SRob Herring 240*724ba675SRob Herring/* Connected to Weltrend MCU */ 241*724ba675SRob Herring&uart1 { 242*724ba675SRob Herring pinctrl-0 = <&uart1_pins>; 243*724ba675SRob Herring pinctrl-names = "default"; 244*724ba675SRob Herring status = "okay"; 245*724ba675SRob Herring}; 246*724ba675SRob Herring 247*724ba675SRob Herring&mdio { 248*724ba675SRob Herring phy0: ethernet-phy@0 { /* Marvell 88E1318 */ 249*724ba675SRob Herring reg = <0>; 250*724ba675SRob Herring marvell,reg-init = <0x2 0x19 0x0 0x0077>, 251*724ba675SRob Herring <0x2 0x18 0x0 0x5747>; 252*724ba675SRob Herring }; 253*724ba675SRob Herring}; 254*724ba675SRob Herring 255*724ba675SRob Herringð1 { 256*724ba675SRob Herring phy = <&phy0>; 257*724ba675SRob Herring phy-mode = "rgmii-id"; 258*724ba675SRob Herring status = "okay"; 259*724ba675SRob Herring}; 260*724ba675SRob Herring 261*724ba675SRob Herring&i2c0 { 262*724ba675SRob Herring compatible = "marvell,mv64xxx-i2c"; 263*724ba675SRob Herring clock-frequency = <100000>; 264*724ba675SRob Herring status = "okay"; 265*724ba675SRob Herring}; 266*724ba675SRob Herring 267*724ba675SRob Herring&nand_controller { 268*724ba675SRob Herring status = "okay"; 269*724ba675SRob Herring 270*724ba675SRob Herring nand@0 { 271*724ba675SRob Herring reg = <0>; 272*724ba675SRob Herring label = "pxa3xx_nand-0"; 273*724ba675SRob Herring nand-rb = <0>; 274*724ba675SRob Herring marvell,nand-keep-config; 275*724ba675SRob Herring nand-on-flash-bbt; 276*724ba675SRob Herring nand-ecc-strength = <4>; 277*724ba675SRob Herring nand-ecc-step-size = <512>; 278*724ba675SRob Herring 279*724ba675SRob Herring partitions { 280*724ba675SRob Herring compatible = "fixed-partitions"; 281*724ba675SRob Herring #address-cells = <1>; 282*724ba675SRob Herring #size-cells = <1>; 283*724ba675SRob Herring 284*724ba675SRob Herring partition@0 { 285*724ba675SRob Herring label = "u-boot"; 286*724ba675SRob Herring /* 1.0 MiB */ 287*724ba675SRob Herring reg = <0x0000000 0x100000>; 288*724ba675SRob Herring read-only; 289*724ba675SRob Herring }; 290*724ba675SRob Herring 291*724ba675SRob Herring partition@100000 { 292*724ba675SRob Herring label = "u-boot-env"; 293*724ba675SRob Herring /* 128 KiB */ 294*724ba675SRob Herring reg = <0x100000 0x20000>; 295*724ba675SRob Herring read-only; 296*724ba675SRob Herring }; 297*724ba675SRob Herring 298*724ba675SRob Herring partition@120000 { 299*724ba675SRob Herring label = "uImage"; 300*724ba675SRob Herring /* 7 MiB */ 301*724ba675SRob Herring reg = <0x120000 0x700000>; 302*724ba675SRob Herring }; 303*724ba675SRob Herring 304*724ba675SRob Herring partition@820000 { 305*724ba675SRob Herring label = "ubifs"; 306*724ba675SRob Herring /* ~ 84 MiB */ 307*724ba675SRob Herring reg = <0x820000 0x54e0000>; 308*724ba675SRob Herring }; 309*724ba675SRob Herring 310*724ba675SRob Herring /* Hardcoded into stock bootloader */ 311*724ba675SRob Herring partition@5d00000 { 312*724ba675SRob Herring label = "failsafe-uImage"; 313*724ba675SRob Herring /* 5 MiB */ 314*724ba675SRob Herring reg = <0x5d00000 0x500000>; 315*724ba675SRob Herring }; 316*724ba675SRob Herring 317*724ba675SRob Herring partition@6200000 { 318*724ba675SRob Herring label = "failsafe-fs"; 319*724ba675SRob Herring /* 29 MiB */ 320*724ba675SRob Herring reg = <0x6200000 0x1d00000>; 321*724ba675SRob Herring }; 322*724ba675SRob Herring 323*724ba675SRob Herring partition@7f00000 { 324*724ba675SRob Herring label = "bbt"; 325*724ba675SRob Herring /* 1 MiB for BBT */ 326*724ba675SRob Herring reg = <0x7f00000 0x100000>; 327*724ba675SRob Herring }; 328*724ba675SRob Herring }; 329*724ba675SRob Herring }; 330*724ba675SRob Herring}; 331