1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (c) 2015 HiSilicon Technologies Co., Ltd. 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring#include <dt-bindings/clock/hi3519-clock.h> 7724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 8724ba675SRob Herring/ { 9724ba675SRob Herring #address-cells = <1>; 10724ba675SRob Herring #size-cells = <1>; 11724ba675SRob Herring chosen { }; 12724ba675SRob Herring 13724ba675SRob Herring cpus { 14724ba675SRob Herring #address-cells = <1>; 15724ba675SRob Herring #size-cells = <0>; 16724ba675SRob Herring 17724ba675SRob Herring cpu@0 { 18724ba675SRob Herring device_type = "cpu"; 19724ba675SRob Herring compatible = "arm,cortex-a7"; 20724ba675SRob Herring reg = <0>; 21724ba675SRob Herring }; 22724ba675SRob Herring }; 23724ba675SRob Herring 24724ba675SRob Herring gic: interrupt-controller@10300000 { 25724ba675SRob Herring compatible = "arm,cortex-a7-gic"; 26724ba675SRob Herring #interrupt-cells = <3>; 27724ba675SRob Herring interrupt-controller; 28724ba675SRob Herring reg = <0x10301000 0x1000>, <0x10302000 0x1000>; 29724ba675SRob Herring }; 30724ba675SRob Herring 31724ba675SRob Herring clk_3m: clk_3m { 32724ba675SRob Herring compatible = "fixed-clock"; 33724ba675SRob Herring #clock-cells = <0>; 34724ba675SRob Herring clock-frequency = <3000000>; 35724ba675SRob Herring }; 36724ba675SRob Herring 37724ba675SRob Herring crg: clock-reset-controller@12010000 { 38724ba675SRob Herring compatible = "hisilicon,hi3519-crg"; 39724ba675SRob Herring #clock-cells = <1>; 40724ba675SRob Herring #reset-cells = <2>; 41724ba675SRob Herring reg = <0x12010000 0x10000>; 42724ba675SRob Herring }; 43724ba675SRob Herring 44724ba675SRob Herring soc { 45724ba675SRob Herring #address-cells = <1>; 46724ba675SRob Herring #size-cells = <1>; 47724ba675SRob Herring compatible = "simple-bus"; 48724ba675SRob Herring interrupt-parent = <&gic>; 49724ba675SRob Herring ranges; 50724ba675SRob Herring 51724ba675SRob Herring uart0: serial@12100000 { 52724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 53724ba675SRob Herring reg = <0x12100000 0x1000>; 54724ba675SRob Herring interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 55724ba675SRob Herring clocks = <&crg HI3519_UART0_CLK>, <&crg HI3519_UART0_CLK>; 56724ba675SRob Herring clock-names = "uartclk", "apb_pclk"; 57*e0d64db2SRob Herring status = "disabled"; 58724ba675SRob Herring }; 59724ba675SRob Herring 60724ba675SRob Herring uart1: serial@12101000 { 61724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 62724ba675SRob Herring reg = <0x12101000 0x1000>; 63724ba675SRob Herring interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 64724ba675SRob Herring clocks = <&crg HI3519_UART1_CLK>, <&crg HI3519_UART1_CLK>; 65724ba675SRob Herring clock-names = "uartclk", "apb_pclk"; 66*e0d64db2SRob Herring status = "disabled"; 67724ba675SRob Herring }; 68724ba675SRob Herring 69724ba675SRob Herring uart2: serial@12102000 { 70724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 71724ba675SRob Herring reg = <0x12102000 0x1000>; 72724ba675SRob Herring interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 73724ba675SRob Herring clocks = <&crg HI3519_UART2_CLK>, <&crg HI3519_UART2_CLK>; 74724ba675SRob Herring clock-names = "uartclk", "apb_pclk"; 75*e0d64db2SRob Herring status = "disabled"; 76724ba675SRob Herring }; 77724ba675SRob Herring 78724ba675SRob Herring uart3: serial@12103000 { 79724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 80724ba675SRob Herring reg = <0x12103000 0x1000>; 81724ba675SRob Herring interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 82724ba675SRob Herring clocks = <&crg HI3519_UART3_CLK>, <&crg HI3519_UART3_CLK>; 83724ba675SRob Herring clock-names = "uartclk", "apb_pclk"; 84*e0d64db2SRob Herring status = "disabled"; 85724ba675SRob Herring }; 86724ba675SRob Herring 87724ba675SRob Herring uart4: serial@12104000 { 88724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 89724ba675SRob Herring reg = <0x12104000 0x1000>; 90724ba675SRob Herring interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 91724ba675SRob Herring clocks = <&crg HI3519_UART4_CLK>, <&crg HI3519_UART4_CLK>; 92724ba675SRob Herring clock-names = "uartclk", "apb_pclk"; 93*e0d64db2SRob Herring status = "disabled"; 94724ba675SRob Herring }; 95724ba675SRob Herring 96724ba675SRob Herring dual_timer0: timer@12000000 { 97724ba675SRob Herring compatible = "arm,sp804", "arm,primecell"; 98724ba675SRob Herring interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 99724ba675SRob Herring <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 100724ba675SRob Herring reg = <0x12000000 0x1000>; 101724ba675SRob Herring clocks = <&clk_3m>; 102724ba675SRob Herring clock-names = "apb_pclk"; 103*e0d64db2SRob Herring status = "disabled"; 104724ba675SRob Herring }; 105724ba675SRob Herring 106724ba675SRob Herring dual_timer1: timer@12001000 { 107724ba675SRob Herring compatible = "arm,sp804", "arm,primecell"; 108724ba675SRob Herring interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, 109724ba675SRob Herring <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 110724ba675SRob Herring reg = <0x12001000 0x1000>; 111724ba675SRob Herring clocks = <&clk_3m>; 112724ba675SRob Herring clock-names = "apb_pclk"; 113*e0d64db2SRob Herring status = "disabled"; 114724ba675SRob Herring }; 115724ba675SRob Herring 116724ba675SRob Herring dual_timer2: timer@12002000 { 117724ba675SRob Herring compatible = "arm,sp804", "arm,primecell"; 118724ba675SRob Herring interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 119724ba675SRob Herring <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 120724ba675SRob Herring reg = <0x12002000 0x1000>; 121724ba675SRob Herring clocks = <&clk_3m>; 122724ba675SRob Herring clock-names = "apb_pclk"; 123*e0d64db2SRob Herring status = "disabled"; 124724ba675SRob Herring }; 125724ba675SRob Herring 126724ba675SRob Herring spi_bus0: spi@12120000 { 127724ba675SRob Herring compatible = "arm,pl022", "arm,primecell"; 128724ba675SRob Herring reg = <0x12120000 0x1000>; 129724ba675SRob Herring interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 130724ba675SRob Herring clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>; 131724ba675SRob Herring clock-names = "sspclk", "apb_pclk"; 132724ba675SRob Herring num-cs = <1>; 133724ba675SRob Herring #address-cells = <1>; 134724ba675SRob Herring #size-cells = <0>; 135*e0d64db2SRob Herring status = "disabled"; 136724ba675SRob Herring }; 137724ba675SRob Herring 138724ba675SRob Herring spi_bus1: spi@12121000 { 139724ba675SRob Herring compatible = "arm,pl022", "arm,primecell"; 140724ba675SRob Herring reg = <0x12121000 0x1000>; 141724ba675SRob Herring interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 142724ba675SRob Herring clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>; 143724ba675SRob Herring clock-names = "sspclk", "apb_pclk"; 144724ba675SRob Herring num-cs = <1>; 145724ba675SRob Herring #address-cells = <1>; 146724ba675SRob Herring #size-cells = <0>; 147*e0d64db2SRob Herring status = "disabled"; 148724ba675SRob Herring }; 149724ba675SRob Herring 150724ba675SRob Herring spi_bus2: spi@12122000 { 151724ba675SRob Herring compatible = "arm,pl022", "arm,primecell"; 152724ba675SRob Herring reg = <0x12122000 0x1000>; 153724ba675SRob Herring interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 154724ba675SRob Herring clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>; 155724ba675SRob Herring clock-names = "sspclk", "apb_pclk"; 156724ba675SRob Herring num-cs = <1>; 157724ba675SRob Herring #address-cells = <1>; 158724ba675SRob Herring #size-cells = <0>; 159*e0d64db2SRob Herring status = "disabled"; 160724ba675SRob Herring }; 161724ba675SRob Herring 162724ba675SRob Herring sysctrl: system-controller@12020000 { 163724ba675SRob Herring compatible = "hisilicon,hi3519-sysctrl", "syscon"; 164724ba675SRob Herring reg = <0x12020000 0x1000>; 165724ba675SRob Herring }; 166724ba675SRob Herring 167724ba675SRob Herring reboot { 168724ba675SRob Herring compatible = "syscon-reboot"; 169724ba675SRob Herring regmap = <&sysctrl>; 170724ba675SRob Herring offset = <0x4>; 171724ba675SRob Herring mask = <0xdeadbeef>; 172724ba675SRob Herring }; 173724ba675SRob Herring }; 174724ba675SRob Herring}; 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