1*ed5244a1SNikita Shubin// SPDX-License-Identifier: GPL-2.0 2*ed5244a1SNikita Shubin/* 3*ed5244a1SNikita Shubin * Device Tree file for Cirrus Logic systems EP93XX SoC 4*ed5244a1SNikita Shubin */ 5*ed5244a1SNikita Shubin#include <dt-bindings/gpio/gpio.h> 6*ed5244a1SNikita Shubin#include <dt-bindings/leds/common.h> 7*ed5244a1SNikita Shubin#include <dt-bindings/input/input.h> 8*ed5244a1SNikita Shubin#include <dt-bindings/clock/cirrus,ep9301-syscon.h> 9*ed5244a1SNikita Shubin/ { 10*ed5244a1SNikita Shubin soc: soc { 11*ed5244a1SNikita Shubin compatible = "simple-bus"; 12*ed5244a1SNikita Shubin ranges; 13*ed5244a1SNikita Shubin #address-cells = <1>; 14*ed5244a1SNikita Shubin #size-cells = <1>; 15*ed5244a1SNikita Shubin 16*ed5244a1SNikita Shubin syscon: syscon@80930000 { 17*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-syscon", "syscon"; 18*ed5244a1SNikita Shubin reg = <0x80930000 0x1000>; 19*ed5244a1SNikita Shubin 20*ed5244a1SNikita Shubin #clock-cells = <1>; 21*ed5244a1SNikita Shubin clocks = <&xtali>; 22*ed5244a1SNikita Shubin 23*ed5244a1SNikita Shubin spi_default_pins: pins-spi { 24*ed5244a1SNikita Shubin function = "spi"; 25*ed5244a1SNikita Shubin groups = "ssp"; 26*ed5244a1SNikita Shubin }; 27*ed5244a1SNikita Shubin 28*ed5244a1SNikita Shubin ac97_default_pins: pins-ac97 { 29*ed5244a1SNikita Shubin function = "ac97"; 30*ed5244a1SNikita Shubin groups = "ac97"; 31*ed5244a1SNikita Shubin }; 32*ed5244a1SNikita Shubin 33*ed5244a1SNikita Shubin i2s_on_ssp_pins: pins-i2sonssp { 34*ed5244a1SNikita Shubin function = "i2s"; 35*ed5244a1SNikita Shubin groups = "i2s_on_ssp"; 36*ed5244a1SNikita Shubin }; 37*ed5244a1SNikita Shubin 38*ed5244a1SNikita Shubin i2s_on_ac97_pins: pins-i2sonac97 { 39*ed5244a1SNikita Shubin function = "i2s"; 40*ed5244a1SNikita Shubin groups = "i2s_on_ac97"; 41*ed5244a1SNikita Shubin }; 42*ed5244a1SNikita Shubin 43*ed5244a1SNikita Shubin gpio1_default_pins: pins-gpio1 { 44*ed5244a1SNikita Shubin function = "gpio"; 45*ed5244a1SNikita Shubin groups = "gpio1agrp"; 46*ed5244a1SNikita Shubin }; 47*ed5244a1SNikita Shubin 48*ed5244a1SNikita Shubin pwm1_default_pins: pins-pwm1 { 49*ed5244a1SNikita Shubin function = "pwm"; 50*ed5244a1SNikita Shubin groups = "pwm1"; 51*ed5244a1SNikita Shubin }; 52*ed5244a1SNikita Shubin 53*ed5244a1SNikita Shubin gpio2_default_pins: pins-gpio2 { 54*ed5244a1SNikita Shubin function = "gpio"; 55*ed5244a1SNikita Shubin groups = "gpio2agrp"; 56*ed5244a1SNikita Shubin }; 57*ed5244a1SNikita Shubin 58*ed5244a1SNikita Shubin gpio3_default_pins: pins-gpio3 { 59*ed5244a1SNikita Shubin function = "gpio"; 60*ed5244a1SNikita Shubin groups = "gpio3agrp"; 61*ed5244a1SNikita Shubin }; 62*ed5244a1SNikita Shubin 63*ed5244a1SNikita Shubin keypad_default_pins: pins-keypad { 64*ed5244a1SNikita Shubin function = "keypad"; 65*ed5244a1SNikita Shubin groups = "keypadgrp"; 66*ed5244a1SNikita Shubin }; 67*ed5244a1SNikita Shubin 68*ed5244a1SNikita Shubin gpio4_default_pins: pins-gpio4 { 69*ed5244a1SNikita Shubin function = "gpio"; 70*ed5244a1SNikita Shubin groups = "gpio4agrp"; 71*ed5244a1SNikita Shubin }; 72*ed5244a1SNikita Shubin 73*ed5244a1SNikita Shubin gpio6_default_pins: pins-gpio6 { 74*ed5244a1SNikita Shubin function = "gpio"; 75*ed5244a1SNikita Shubin groups = "gpio6agrp"; 76*ed5244a1SNikita Shubin }; 77*ed5244a1SNikita Shubin 78*ed5244a1SNikita Shubin gpio7_default_pins: pins-gpio7 { 79*ed5244a1SNikita Shubin function = "gpio"; 80*ed5244a1SNikita Shubin groups = "gpio7agrp"; 81*ed5244a1SNikita Shubin }; 82*ed5244a1SNikita Shubin 83*ed5244a1SNikita Shubin ide_default_pins: pins-ide { 84*ed5244a1SNikita Shubin function = "pata"; 85*ed5244a1SNikita Shubin groups = "idegrp"; 86*ed5244a1SNikita Shubin }; 87*ed5244a1SNikita Shubin 88*ed5244a1SNikita Shubin lcd_on_dram0_pins: pins-rasteronsdram0 { 89*ed5244a1SNikita Shubin function = "lcd"; 90*ed5244a1SNikita Shubin groups = "rasteronsdram0grp"; 91*ed5244a1SNikita Shubin }; 92*ed5244a1SNikita Shubin 93*ed5244a1SNikita Shubin lcd_on_dram3_pins: pins-rasteronsdram3 { 94*ed5244a1SNikita Shubin function = "lcd"; 95*ed5244a1SNikita Shubin groups = "rasteronsdram3grp"; 96*ed5244a1SNikita Shubin }; 97*ed5244a1SNikita Shubin }; 98*ed5244a1SNikita Shubin 99*ed5244a1SNikita Shubin adc: adc@80900000 { 100*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-adc"; 101*ed5244a1SNikita Shubin reg = <0x80900000 0x28>; 102*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_ADC>; 103*ed5244a1SNikita Shubin interrupt-parent = <&vic0>; 104*ed5244a1SNikita Shubin interrupts = <30>; 105*ed5244a1SNikita Shubin status = "disabled"; 106*ed5244a1SNikita Shubin }; 107*ed5244a1SNikita Shubin 108*ed5244a1SNikita Shubin /* 109*ed5244a1SNikita Shubin * The EP93XX expansion bus is a set of up to 7 each up to 16MB 110*ed5244a1SNikita Shubin * windows in the 256MB space from 0x50000000 to 0x5fffffff. 111*ed5244a1SNikita Shubin * But since we don't require to setup it in any way, we can 112*ed5244a1SNikita Shubin * represent it as a simple-bus. 113*ed5244a1SNikita Shubin */ 114*ed5244a1SNikita Shubin ebi: bus@80080000 { 115*ed5244a1SNikita Shubin compatible = "simple-bus"; 116*ed5244a1SNikita Shubin reg = <0x80080000 0x20>; 117*ed5244a1SNikita Shubin native-endian; 118*ed5244a1SNikita Shubin #address-cells = <1>; 119*ed5244a1SNikita Shubin #size-cells = <1>; 120*ed5244a1SNikita Shubin ranges; 121*ed5244a1SNikita Shubin }; 122*ed5244a1SNikita Shubin 123*ed5244a1SNikita Shubin dma0: dma-controller@80000000 { 124*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-dma-m2p"; 125*ed5244a1SNikita Shubin reg = <0x80000000 0x0040>, 126*ed5244a1SNikita Shubin <0x80000040 0x0040>, 127*ed5244a1SNikita Shubin <0x80000080 0x0040>, 128*ed5244a1SNikita Shubin <0x800000c0 0x0040>, 129*ed5244a1SNikita Shubin <0x80000240 0x0040>, 130*ed5244a1SNikita Shubin <0x80000200 0x0040>, 131*ed5244a1SNikita Shubin <0x800002c0 0x0040>, 132*ed5244a1SNikita Shubin <0x80000280 0x0040>, 133*ed5244a1SNikita Shubin <0x80000340 0x0040>, 134*ed5244a1SNikita Shubin <0x80000300 0x0040>; 135*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_M2P0>, 136*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_M2P1>, 137*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_M2P2>, 138*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_M2P3>, 139*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_M2P4>, 140*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_M2P5>, 141*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_M2P6>, 142*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_M2P7>, 143*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_M2P8>, 144*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_M2P9>; 145*ed5244a1SNikita Shubin clock-names = "m2p0", "m2p1", 146*ed5244a1SNikita Shubin "m2p2", "m2p3", 147*ed5244a1SNikita Shubin "m2p4", "m2p5", 148*ed5244a1SNikita Shubin "m2p6", "m2p7", 149*ed5244a1SNikita Shubin "m2p8", "m2p9"; 150*ed5244a1SNikita Shubin interrupt-parent = <&vic0>; 151*ed5244a1SNikita Shubin interrupts = <7>, <8>, <9>, <10>, <11>, 152*ed5244a1SNikita Shubin <12>, <13>, <14>, <15>, <16>; 153*ed5244a1SNikita Shubin #dma-cells = <2>; 154*ed5244a1SNikita Shubin }; 155*ed5244a1SNikita Shubin 156*ed5244a1SNikita Shubin dma1: dma-controller@80000100 { 157*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-dma-m2m"; 158*ed5244a1SNikita Shubin reg = <0x80000100 0x0040>, 159*ed5244a1SNikita Shubin <0x80000140 0x0040>; 160*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_M2M0>, 161*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_M2M1>; 162*ed5244a1SNikita Shubin clock-names = "m2m0", "m2m1"; 163*ed5244a1SNikita Shubin interrupt-parent = <&vic0>; 164*ed5244a1SNikita Shubin interrupts = <17>, <18>; 165*ed5244a1SNikita Shubin #dma-cells = <2>; 166*ed5244a1SNikita Shubin }; 167*ed5244a1SNikita Shubin 168*ed5244a1SNikita Shubin eth0: ethernet@80010000 { 169*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-eth"; 170*ed5244a1SNikita Shubin reg = <0x80010000 0x10000>; 171*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 172*ed5244a1SNikita Shubin interrupts = <7>; 173*ed5244a1SNikita Shubin mdio0: mdio { 174*ed5244a1SNikita Shubin #address-cells = <1>; 175*ed5244a1SNikita Shubin #size-cells = <0>; 176*ed5244a1SNikita Shubin }; 177*ed5244a1SNikita Shubin }; 178*ed5244a1SNikita Shubin 179*ed5244a1SNikita Shubin gpio0: gpio@80840000 { 180*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-gpio"; 181*ed5244a1SNikita Shubin reg = <0x80840000 0x04>, 182*ed5244a1SNikita Shubin <0x80840010 0x04>, 183*ed5244a1SNikita Shubin <0x80840090 0x1c>; 184*ed5244a1SNikita Shubin reg-names = "data", "dir", "intr"; 185*ed5244a1SNikita Shubin gpio-controller; 186*ed5244a1SNikita Shubin #gpio-cells = <2>; 187*ed5244a1SNikita Shubin interrupt-controller; 188*ed5244a1SNikita Shubin #interrupt-cells = <2>; 189*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 190*ed5244a1SNikita Shubin interrupts = <27>; 191*ed5244a1SNikita Shubin }; 192*ed5244a1SNikita Shubin 193*ed5244a1SNikita Shubin gpio1: gpio@80840004 { 194*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-gpio"; 195*ed5244a1SNikita Shubin reg = <0x80840004 0x04>, 196*ed5244a1SNikita Shubin <0x80840014 0x04>, 197*ed5244a1SNikita Shubin <0x808400ac 0x1c>; 198*ed5244a1SNikita Shubin reg-names = "data", "dir", "intr"; 199*ed5244a1SNikita Shubin gpio-controller; 200*ed5244a1SNikita Shubin #gpio-cells = <2>; 201*ed5244a1SNikita Shubin interrupt-controller; 202*ed5244a1SNikita Shubin #interrupt-cells = <2>; 203*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 204*ed5244a1SNikita Shubin interrupts = <27>; 205*ed5244a1SNikita Shubin }; 206*ed5244a1SNikita Shubin 207*ed5244a1SNikita Shubin gpio2: gpio@80840008 { 208*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-gpio"; 209*ed5244a1SNikita Shubin reg = <0x80840008 0x04>, 210*ed5244a1SNikita Shubin <0x80840018 0x04>; 211*ed5244a1SNikita Shubin reg-names = "data", "dir"; 212*ed5244a1SNikita Shubin gpio-controller; 213*ed5244a1SNikita Shubin #gpio-cells = <2>; 214*ed5244a1SNikita Shubin pinctrl-names = "default"; 215*ed5244a1SNikita Shubin pinctrl-0 = <&gpio2_default_pins>; 216*ed5244a1SNikita Shubin }; 217*ed5244a1SNikita Shubin 218*ed5244a1SNikita Shubin gpio3: gpio@8084000c { 219*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-gpio"; 220*ed5244a1SNikita Shubin reg = <0x8084000c 0x04>, 221*ed5244a1SNikita Shubin <0x8084001c 0x04>; 222*ed5244a1SNikita Shubin reg-names = "data", "dir"; 223*ed5244a1SNikita Shubin gpio-controller; 224*ed5244a1SNikita Shubin #gpio-cells = <2>; 225*ed5244a1SNikita Shubin pinctrl-names = "default"; 226*ed5244a1SNikita Shubin pinctrl-0 = <&gpio3_default_pins>; 227*ed5244a1SNikita Shubin }; 228*ed5244a1SNikita Shubin 229*ed5244a1SNikita Shubin gpio4: gpio@80840020 { 230*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-gpio"; 231*ed5244a1SNikita Shubin reg = <0x80840020 0x04>, 232*ed5244a1SNikita Shubin <0x80840024 0x04>; 233*ed5244a1SNikita Shubin reg-names = "data", "dir"; 234*ed5244a1SNikita Shubin gpio-controller; 235*ed5244a1SNikita Shubin #gpio-cells = <2>; 236*ed5244a1SNikita Shubin pinctrl-names = "default"; 237*ed5244a1SNikita Shubin pinctrl-0 = <&gpio4_default_pins>; 238*ed5244a1SNikita Shubin }; 239*ed5244a1SNikita Shubin 240*ed5244a1SNikita Shubin gpio5: gpio@80840030 { 241*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-gpio"; 242*ed5244a1SNikita Shubin reg = <0x80840030 0x04>, 243*ed5244a1SNikita Shubin <0x80840034 0x04>, 244*ed5244a1SNikita Shubin <0x8084004c 0x1c>; 245*ed5244a1SNikita Shubin reg-names = "data", "dir", "intr"; 246*ed5244a1SNikita Shubin gpio-controller; 247*ed5244a1SNikita Shubin #gpio-cells = <2>; 248*ed5244a1SNikita Shubin interrupt-controller; 249*ed5244a1SNikita Shubin #interrupt-cells = <2>; 250*ed5244a1SNikita Shubin interrupts-extended = <&vic0 19>, <&vic0 20>, 251*ed5244a1SNikita Shubin <&vic0 21>, <&vic0 22>, 252*ed5244a1SNikita Shubin <&vic1 15>, <&vic1 16>, 253*ed5244a1SNikita Shubin <&vic1 17>, <&vic1 18>; 254*ed5244a1SNikita Shubin }; 255*ed5244a1SNikita Shubin 256*ed5244a1SNikita Shubin gpio6: gpio@80840038 { 257*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-gpio"; 258*ed5244a1SNikita Shubin reg = <0x80840038 0x04>, 259*ed5244a1SNikita Shubin <0x8084003c 0x04>; 260*ed5244a1SNikita Shubin reg-names = "data", "dir"; 261*ed5244a1SNikita Shubin gpio-controller; 262*ed5244a1SNikita Shubin #gpio-cells = <2>; 263*ed5244a1SNikita Shubin pinctrl-names = "default"; 264*ed5244a1SNikita Shubin pinctrl-0 = <&gpio6_default_pins>; 265*ed5244a1SNikita Shubin }; 266*ed5244a1SNikita Shubin 267*ed5244a1SNikita Shubin gpio7: gpio@80840040 { 268*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-gpio"; 269*ed5244a1SNikita Shubin reg = <0x80840040 0x04>, 270*ed5244a1SNikita Shubin <0x80840044 0x04>; 271*ed5244a1SNikita Shubin reg-names = "data", "dir"; 272*ed5244a1SNikita Shubin gpio-controller; 273*ed5244a1SNikita Shubin #gpio-cells = <2>; 274*ed5244a1SNikita Shubin pinctrl-names = "default"; 275*ed5244a1SNikita Shubin pinctrl-0 = <&gpio7_default_pins>; 276*ed5244a1SNikita Shubin }; 277*ed5244a1SNikita Shubin 278*ed5244a1SNikita Shubin i2s: i2s@80820000 { 279*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-i2s"; 280*ed5244a1SNikita Shubin reg = <0x80820000 0x100>; 281*ed5244a1SNikita Shubin #sound-dai-cells = <0>; 282*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 283*ed5244a1SNikita Shubin interrupts = <28>; 284*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_I2S_MCLK>, 285*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_I2S_SCLK>, 286*ed5244a1SNikita Shubin <&syscon EP93XX_CLK_I2S_LRCLK>; 287*ed5244a1SNikita Shubin clock-names = "mclk", "sclk", "lrclk"; 288*ed5244a1SNikita Shubin dmas = <&dma0 0 1>, <&dma0 0 2>; 289*ed5244a1SNikita Shubin dma-names = "tx", "rx"; 290*ed5244a1SNikita Shubin status = "disabled"; 291*ed5244a1SNikita Shubin }; 292*ed5244a1SNikita Shubin 293*ed5244a1SNikita Shubin ide: ide@800a0000 { 294*ed5244a1SNikita Shubin compatible = "cirrus,ep9312-pata"; 295*ed5244a1SNikita Shubin reg = <0x800a0000 0x38>; 296*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 297*ed5244a1SNikita Shubin interrupts = <8>; 298*ed5244a1SNikita Shubin pinctrl-names = "default"; 299*ed5244a1SNikita Shubin pinctrl-0 = <&ide_default_pins>; 300*ed5244a1SNikita Shubin status = "disabled"; 301*ed5244a1SNikita Shubin }; 302*ed5244a1SNikita Shubin 303*ed5244a1SNikita Shubin vic0: interrupt-controller@800b0000 { 304*ed5244a1SNikita Shubin compatible = "arm,pl192-vic"; 305*ed5244a1SNikita Shubin reg = <0x800b0000 0x1000>; 306*ed5244a1SNikita Shubin interrupt-controller; 307*ed5244a1SNikita Shubin #interrupt-cells = <1>; 308*ed5244a1SNikita Shubin valid-mask = <0x7ffffffc>; 309*ed5244a1SNikita Shubin valid-wakeup-mask = <0x0>; 310*ed5244a1SNikita Shubin }; 311*ed5244a1SNikita Shubin 312*ed5244a1SNikita Shubin vic1: interrupt-controller@800c0000 { 313*ed5244a1SNikita Shubin compatible = "arm,pl192-vic"; 314*ed5244a1SNikita Shubin reg = <0x800c0000 0x1000>; 315*ed5244a1SNikita Shubin interrupt-controller; 316*ed5244a1SNikita Shubin #interrupt-cells = <1>; 317*ed5244a1SNikita Shubin valid-mask = <0x1fffffff>; 318*ed5244a1SNikita Shubin valid-wakeup-mask = <0x0>; 319*ed5244a1SNikita Shubin }; 320*ed5244a1SNikita Shubin 321*ed5244a1SNikita Shubin keypad: keypad@800f0000 { 322*ed5244a1SNikita Shubin compatible = "cirrus,ep9307-keypad"; 323*ed5244a1SNikita Shubin reg = <0x800f0000 0x0c>; 324*ed5244a1SNikita Shubin interrupt-parent = <&vic0>; 325*ed5244a1SNikita Shubin interrupts = <29>; 326*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_KEYPAD>; 327*ed5244a1SNikita Shubin pinctrl-names = "default"; 328*ed5244a1SNikita Shubin pinctrl-0 = <&keypad_default_pins>; 329*ed5244a1SNikita Shubin linux,keymap = <KEY_UP>, 330*ed5244a1SNikita Shubin <KEY_DOWN>, 331*ed5244a1SNikita Shubin <KEY_VOLUMEDOWN>, 332*ed5244a1SNikita Shubin <KEY_HOME>, 333*ed5244a1SNikita Shubin <KEY_RIGHT>, 334*ed5244a1SNikita Shubin <KEY_LEFT>, 335*ed5244a1SNikita Shubin <KEY_ENTER>, 336*ed5244a1SNikita Shubin <KEY_VOLUMEUP>, 337*ed5244a1SNikita Shubin <KEY_F6>, 338*ed5244a1SNikita Shubin <KEY_F8>, 339*ed5244a1SNikita Shubin <KEY_F9>, 340*ed5244a1SNikita Shubin <KEY_F10>, 341*ed5244a1SNikita Shubin <KEY_F1>, 342*ed5244a1SNikita Shubin <KEY_F2>, 343*ed5244a1SNikita Shubin <KEY_F3>, 344*ed5244a1SNikita Shubin <KEY_POWER>; 345*ed5244a1SNikita Shubin }; 346*ed5244a1SNikita Shubin 347*ed5244a1SNikita Shubin pwm0: pwm@80910000 { 348*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-pwm"; 349*ed5244a1SNikita Shubin reg = <0x80910000 0x10>; 350*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_PWM>; 351*ed5244a1SNikita Shubin #pwm-cells = <3>; 352*ed5244a1SNikita Shubin status = "disabled"; 353*ed5244a1SNikita Shubin }; 354*ed5244a1SNikita Shubin 355*ed5244a1SNikita Shubin pwm1: pwm@80910020 { 356*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-pwm"; 357*ed5244a1SNikita Shubin reg = <0x80910020 0x10>; 358*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_PWM>; 359*ed5244a1SNikita Shubin #pwm-cells = <3>; 360*ed5244a1SNikita Shubin pinctrl-names = "default"; 361*ed5244a1SNikita Shubin pinctrl-0 = <&pwm1_default_pins>; 362*ed5244a1SNikita Shubin status = "disabled"; 363*ed5244a1SNikita Shubin }; 364*ed5244a1SNikita Shubin 365*ed5244a1SNikita Shubin rtc0: rtc@80920000 { 366*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-rtc"; 367*ed5244a1SNikita Shubin reg = <0x80920000 0x100>; 368*ed5244a1SNikita Shubin }; 369*ed5244a1SNikita Shubin 370*ed5244a1SNikita Shubin spi0: spi@808a0000 { 371*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-spi"; 372*ed5244a1SNikita Shubin reg = <0x808a0000 0x18>; 373*ed5244a1SNikita Shubin #address-cells = <1>; 374*ed5244a1SNikita Shubin #size-cells = <0>; 375*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 376*ed5244a1SNikita Shubin interrupts = <21>; 377*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_SPI>; 378*ed5244a1SNikita Shubin pinctrl-names = "default"; 379*ed5244a1SNikita Shubin pinctrl-0 = <&spi_default_pins>; 380*ed5244a1SNikita Shubin status = "disabled"; 381*ed5244a1SNikita Shubin }; 382*ed5244a1SNikita Shubin 383*ed5244a1SNikita Shubin timer: timer@80810000 { 384*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-timer"; 385*ed5244a1SNikita Shubin reg = <0x80810000 0x100>; 386*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 387*ed5244a1SNikita Shubin interrupts = <19>; 388*ed5244a1SNikita Shubin }; 389*ed5244a1SNikita Shubin 390*ed5244a1SNikita Shubin uart0: serial@808c0000 { 391*ed5244a1SNikita Shubin compatible = "arm,pl011", "arm,primecell"; 392*ed5244a1SNikita Shubin reg = <0x808c0000 0x1000>; 393*ed5244a1SNikita Shubin arm,primecell-periphid = <0x00041010>; 394*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_UART1>, <&syscon EP93XX_CLK_UART>; 395*ed5244a1SNikita Shubin clock-names = "uartclk", "apb_pclk"; 396*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 397*ed5244a1SNikita Shubin interrupts = <20>; 398*ed5244a1SNikita Shubin status = "disabled"; 399*ed5244a1SNikita Shubin }; 400*ed5244a1SNikita Shubin 401*ed5244a1SNikita Shubin uart1: uart@808d0000 { 402*ed5244a1SNikita Shubin compatible = "arm,primecell"; 403*ed5244a1SNikita Shubin reg = <0x808d0000 0x1000>; 404*ed5244a1SNikita Shubin arm,primecell-periphid = <0x00041010>; 405*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_UART2>, <&syscon EP93XX_CLK_UART>; 406*ed5244a1SNikita Shubin clock-names = "apb:uart2", "apb_pclk"; 407*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 408*ed5244a1SNikita Shubin interrupts = <22>; 409*ed5244a1SNikita Shubin status = "disabled"; 410*ed5244a1SNikita Shubin }; 411*ed5244a1SNikita Shubin 412*ed5244a1SNikita Shubin uart2: uart@808b0000 { 413*ed5244a1SNikita Shubin compatible = "arm,primecell"; 414*ed5244a1SNikita Shubin reg = <0x808b0000 0x1000>; 415*ed5244a1SNikita Shubin arm,primecell-periphid = <0x00041010>; 416*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_UART3>, <&syscon EP93XX_CLK_UART>; 417*ed5244a1SNikita Shubin clock-names = "apb:uart3", "apb_pclk"; 418*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 419*ed5244a1SNikita Shubin interrupts = <23>; 420*ed5244a1SNikita Shubin status = "disabled"; 421*ed5244a1SNikita Shubin }; 422*ed5244a1SNikita Shubin 423*ed5244a1SNikita Shubin usb0: usb@80020000 { 424*ed5244a1SNikita Shubin compatible = "generic-ohci"; 425*ed5244a1SNikita Shubin reg = <0x80020000 0x10000>; 426*ed5244a1SNikita Shubin interrupt-parent = <&vic1>; 427*ed5244a1SNikita Shubin interrupts = <24>; 428*ed5244a1SNikita Shubin clocks = <&syscon EP93XX_CLK_USB>; 429*ed5244a1SNikita Shubin status = "disabled"; 430*ed5244a1SNikita Shubin }; 431*ed5244a1SNikita Shubin 432*ed5244a1SNikita Shubin watchdog0: watchdog@80940000 { 433*ed5244a1SNikita Shubin compatible = "cirrus,ep9301-wdt"; 434*ed5244a1SNikita Shubin reg = <0x80940000 0x08>; 435*ed5244a1SNikita Shubin }; 436*ed5244a1SNikita Shubin }; 437*ed5244a1SNikita Shubin 438*ed5244a1SNikita Shubin xtali: oscillator { 439*ed5244a1SNikita Shubin compatible = "fixed-clock"; 440*ed5244a1SNikita Shubin #clock-cells = <0>; 441*ed5244a1SNikita Shubin clock-frequency = <14745600>; 442*ed5244a1SNikita Shubin clock-output-names = "xtali"; 443*ed5244a1SNikita Shubin }; 444*ed5244a1SNikita Shubin}; 445