1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright 2011-2012 Calxeda, Inc. 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring/ { 7*724ba675SRob Herring chosen { 8*724ba675SRob Herring bootargs = "console=ttyAMA0"; 9*724ba675SRob Herring }; 10*724ba675SRob Herring 11*724ba675SRob Herring psci { 12*724ba675SRob Herring compatible = "arm,psci"; 13*724ba675SRob Herring method = "smc"; 14*724ba675SRob Herring cpu_suspend = <0x84000002>; 15*724ba675SRob Herring cpu_off = <0x84000004>; 16*724ba675SRob Herring cpu_on = <0x84000006>; 17*724ba675SRob Herring }; 18*724ba675SRob Herring 19*724ba675SRob Herring soc { 20*724ba675SRob Herring #address-cells = <1>; 21*724ba675SRob Herring #size-cells = <1>; 22*724ba675SRob Herring compatible = "simple-bus"; 23*724ba675SRob Herring interrupt-parent = <&intc>; 24*724ba675SRob Herring 25*724ba675SRob Herring sata@ffe08000 { 26*724ba675SRob Herring compatible = "calxeda,hb-ahci"; 27*724ba675SRob Herring reg = <0xffe08000 0x10000>; 28*724ba675SRob Herring interrupts = <0 83 4>; 29*724ba675SRob Herring dma-coherent; 30*724ba675SRob Herring calxeda,port-phys = < &combophy5 0>, <&combophy0 0>, 31*724ba675SRob Herring <&combophy0 1>, <&combophy0 2>, 32*724ba675SRob Herring <&combophy0 3>; 33*724ba675SRob Herring calxeda,sgpio-gpio =<&gpioh 5 1>, <&gpioh 6 1>, 34*724ba675SRob Herring <&gpioh 7 1>; 35*724ba675SRob Herring calxeda,led-order = <4 0 1 2 3>; 36*724ba675SRob Herring }; 37*724ba675SRob Herring 38*724ba675SRob Herring sdhci@ffe0e000 { 39*724ba675SRob Herring compatible = "calxeda,hb-sdhci"; 40*724ba675SRob Herring reg = <0xffe0e000 0x1000>; 41*724ba675SRob Herring interrupts = <0 90 4>; 42*724ba675SRob Herring clocks = <&eclk>; 43*724ba675SRob Herring status = "disabled"; 44*724ba675SRob Herring }; 45*724ba675SRob Herring 46*724ba675SRob Herring ipc@fff20000 { 47*724ba675SRob Herring compatible = "arm,pl320", "arm,primecell"; 48*724ba675SRob Herring reg = <0xfff20000 0x1000>; 49*724ba675SRob Herring interrupts = <0 7 4>; 50*724ba675SRob Herring clocks = <&pclk>; 51*724ba675SRob Herring clock-names = "apb_pclk"; 52*724ba675SRob Herring }; 53*724ba675SRob Herring 54*724ba675SRob Herring gpioe: gpio@fff30000 { 55*724ba675SRob Herring #gpio-cells = <2>; 56*724ba675SRob Herring compatible = "arm,pl061", "arm,primecell"; 57*724ba675SRob Herring gpio-controller; 58*724ba675SRob Herring reg = <0xfff30000 0x1000>; 59*724ba675SRob Herring interrupts = <0 14 4>; 60*724ba675SRob Herring clocks = <&pclk>; 61*724ba675SRob Herring clock-names = "apb_pclk"; 62*724ba675SRob Herring status = "disabled"; 63*724ba675SRob Herring }; 64*724ba675SRob Herring 65*724ba675SRob Herring gpiof: gpio@fff31000 { 66*724ba675SRob Herring #gpio-cells = <2>; 67*724ba675SRob Herring compatible = "arm,pl061", "arm,primecell"; 68*724ba675SRob Herring gpio-controller; 69*724ba675SRob Herring reg = <0xfff31000 0x1000>; 70*724ba675SRob Herring interrupts = <0 15 4>; 71*724ba675SRob Herring clocks = <&pclk>; 72*724ba675SRob Herring clock-names = "apb_pclk"; 73*724ba675SRob Herring status = "disabled"; 74*724ba675SRob Herring }; 75*724ba675SRob Herring 76*724ba675SRob Herring gpiog: gpio@fff32000 { 77*724ba675SRob Herring #gpio-cells = <2>; 78*724ba675SRob Herring compatible = "arm,pl061", "arm,primecell"; 79*724ba675SRob Herring gpio-controller; 80*724ba675SRob Herring reg = <0xfff32000 0x1000>; 81*724ba675SRob Herring interrupts = <0 16 4>; 82*724ba675SRob Herring clocks = <&pclk>; 83*724ba675SRob Herring clock-names = "apb_pclk"; 84*724ba675SRob Herring status = "disabled"; 85*724ba675SRob Herring }; 86*724ba675SRob Herring 87*724ba675SRob Herring gpioh: gpio@fff33000 { 88*724ba675SRob Herring #gpio-cells = <2>; 89*724ba675SRob Herring compatible = "arm,pl061", "arm,primecell"; 90*724ba675SRob Herring gpio-controller; 91*724ba675SRob Herring reg = <0xfff33000 0x1000>; 92*724ba675SRob Herring interrupts = <0 17 4>; 93*724ba675SRob Herring clocks = <&pclk>; 94*724ba675SRob Herring clock-names = "apb_pclk"; 95*724ba675SRob Herring status = "disabled"; 96*724ba675SRob Herring }; 97*724ba675SRob Herring 98*724ba675SRob Herring timer@fff34000 { 99*724ba675SRob Herring compatible = "arm,sp804", "arm,primecell"; 100*724ba675SRob Herring reg = <0xfff34000 0x1000>; 101*724ba675SRob Herring interrupts = <0 18 4>; 102*724ba675SRob Herring clocks = <&pclk>; 103*724ba675SRob Herring clock-names = "apb_pclk"; 104*724ba675SRob Herring }; 105*724ba675SRob Herring 106*724ba675SRob Herring rtc@fff35000 { 107*724ba675SRob Herring compatible = "arm,pl031", "arm,primecell"; 108*724ba675SRob Herring reg = <0xfff35000 0x1000>; 109*724ba675SRob Herring interrupts = <0 19 4>; 110*724ba675SRob Herring clocks = <&pclk>; 111*724ba675SRob Herring clock-names = "apb_pclk"; 112*724ba675SRob Herring }; 113*724ba675SRob Herring 114*724ba675SRob Herring serial@fff36000 { 115*724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 116*724ba675SRob Herring reg = <0xfff36000 0x1000>; 117*724ba675SRob Herring interrupts = <0 20 4>; 118*724ba675SRob Herring clocks = <&pclk>, <&pclk>; 119*724ba675SRob Herring clock-names = "uartclk", "apb_pclk"; 120*724ba675SRob Herring }; 121*724ba675SRob Herring 122*724ba675SRob Herring smic@fff3a000 { 123*724ba675SRob Herring compatible = "ipmi-smic"; 124*724ba675SRob Herring device_type = "ipmi"; 125*724ba675SRob Herring reg = <0xfff3a000 0x1000>; 126*724ba675SRob Herring interrupts = <0 24 4>; 127*724ba675SRob Herring reg-size = <4>; 128*724ba675SRob Herring reg-spacing = <4>; 129*724ba675SRob Herring }; 130*724ba675SRob Herring 131*724ba675SRob Herring sregs@fff3c000 { 132*724ba675SRob Herring compatible = "calxeda,hb-sregs"; 133*724ba675SRob Herring reg = <0xfff3c000 0x1000>; 134*724ba675SRob Herring 135*724ba675SRob Herring clocks { 136*724ba675SRob Herring #address-cells = <1>; 137*724ba675SRob Herring #size-cells = <0>; 138*724ba675SRob Herring 139*724ba675SRob Herring osc: oscillator { 140*724ba675SRob Herring #clock-cells = <0>; 141*724ba675SRob Herring compatible = "fixed-clock"; 142*724ba675SRob Herring clock-frequency = <33333000>; 143*724ba675SRob Herring }; 144*724ba675SRob Herring 145*724ba675SRob Herring ddrpll: ddrpll { 146*724ba675SRob Herring #clock-cells = <0>; 147*724ba675SRob Herring compatible = "calxeda,hb-pll-clock"; 148*724ba675SRob Herring clocks = <&osc>; 149*724ba675SRob Herring reg = <0x108>; 150*724ba675SRob Herring }; 151*724ba675SRob Herring 152*724ba675SRob Herring a9pll: a9pll { 153*724ba675SRob Herring #clock-cells = <0>; 154*724ba675SRob Herring compatible = "calxeda,hb-pll-clock"; 155*724ba675SRob Herring clocks = <&osc>; 156*724ba675SRob Herring reg = <0x100>; 157*724ba675SRob Herring }; 158*724ba675SRob Herring 159*724ba675SRob Herring a9periphclk: a9periphclk { 160*724ba675SRob Herring #clock-cells = <0>; 161*724ba675SRob Herring compatible = "calxeda,hb-a9periph-clock"; 162*724ba675SRob Herring clocks = <&a9pll>; 163*724ba675SRob Herring reg = <0x104>; 164*724ba675SRob Herring }; 165*724ba675SRob Herring 166*724ba675SRob Herring a9bclk: a9bclk { 167*724ba675SRob Herring #clock-cells = <0>; 168*724ba675SRob Herring compatible = "calxeda,hb-a9bus-clock"; 169*724ba675SRob Herring clocks = <&a9pll>; 170*724ba675SRob Herring reg = <0x104>; 171*724ba675SRob Herring }; 172*724ba675SRob Herring 173*724ba675SRob Herring emmcpll: emmcpll { 174*724ba675SRob Herring #clock-cells = <0>; 175*724ba675SRob Herring compatible = "calxeda,hb-pll-clock"; 176*724ba675SRob Herring clocks = <&osc>; 177*724ba675SRob Herring reg = <0x10C>; 178*724ba675SRob Herring }; 179*724ba675SRob Herring 180*724ba675SRob Herring eclk: eclk { 181*724ba675SRob Herring #clock-cells = <0>; 182*724ba675SRob Herring compatible = "calxeda,hb-emmc-clock"; 183*724ba675SRob Herring clocks = <&emmcpll>; 184*724ba675SRob Herring reg = <0x114>; 185*724ba675SRob Herring }; 186*724ba675SRob Herring 187*724ba675SRob Herring pclk: pclk { 188*724ba675SRob Herring #clock-cells = <0>; 189*724ba675SRob Herring compatible = "fixed-clock"; 190*724ba675SRob Herring clock-frequency = <150000000>; 191*724ba675SRob Herring }; 192*724ba675SRob Herring }; 193*724ba675SRob Herring }; 194*724ba675SRob Herring 195*724ba675SRob Herring dma@fff3d000 { 196*724ba675SRob Herring compatible = "arm,pl330", "arm,primecell"; 197*724ba675SRob Herring reg = <0xfff3d000 0x1000>; 198*724ba675SRob Herring interrupts = <0 92 4>; 199*724ba675SRob Herring clocks = <&pclk>; 200*724ba675SRob Herring clock-names = "apb_pclk"; 201*724ba675SRob Herring }; 202*724ba675SRob Herring 203*724ba675SRob Herring ethernet@fff50000 { 204*724ba675SRob Herring compatible = "calxeda,hb-xgmac"; 205*724ba675SRob Herring reg = <0xfff50000 0x1000>; 206*724ba675SRob Herring interrupts = <0 77 4>, <0 78 4>, <0 79 4>; 207*724ba675SRob Herring dma-coherent; 208*724ba675SRob Herring }; 209*724ba675SRob Herring 210*724ba675SRob Herring ethernet@fff51000 { 211*724ba675SRob Herring compatible = "calxeda,hb-xgmac"; 212*724ba675SRob Herring reg = <0xfff51000 0x1000>; 213*724ba675SRob Herring interrupts = <0 80 4>, <0 81 4>, <0 82 4>; 214*724ba675SRob Herring dma-coherent; 215*724ba675SRob Herring }; 216*724ba675SRob Herring 217*724ba675SRob Herring combophy0: combo-phy@fff58000 { 218*724ba675SRob Herring compatible = "calxeda,hb-combophy"; 219*724ba675SRob Herring #phy-cells = <1>; 220*724ba675SRob Herring reg = <0xfff58000 0x1000>; 221*724ba675SRob Herring phydev = <5>; 222*724ba675SRob Herring }; 223*724ba675SRob Herring 224*724ba675SRob Herring combophy5: combo-phy@fff5d000 { 225*724ba675SRob Herring compatible = "calxeda,hb-combophy"; 226*724ba675SRob Herring #phy-cells = <1>; 227*724ba675SRob Herring reg = <0xfff5d000 0x1000>; 228*724ba675SRob Herring phydev = <31>; 229*724ba675SRob Herring }; 230*724ba675SRob Herring }; 231*724ba675SRob Herring}; 232