1/* 2 * BSD LICENSE 3 * 4 * Copyright(c) 2016 Broadcom. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in 14 * the documentation and/or other materials provided with the 15 * distribution. 16 * * Neither the name of Broadcom Corporation nor the names of its 17 * contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33/* BCM23550 and BCM21664 have almost identical clocks */ 34#include <dt-bindings/clock/bcm21664.h> 35#include <dt-bindings/interrupt-controller/arm-gic.h> 36#include <dt-bindings/interrupt-controller/irq.h> 37 38/ { 39 #address-cells = <1>; 40 #size-cells = <1>; 41 model = "BCM23550 SoC"; 42 compatible = "brcm,bcm23550"; 43 interrupt-parent = <&gic>; 44 45 cpus { 46 #address-cells = <1>; 47 #size-cells = <0>; 48 49 cpu0: cpu@0 { 50 device_type = "cpu"; 51 compatible = "arm,cortex-a7"; 52 reg = <0>; 53 clock-frequency = <1000000000>; 54 }; 55 56 cpu1: cpu@1 { 57 device_type = "cpu"; 58 compatible = "arm,cortex-a7"; 59 enable-method = "brcm,bcm23550"; 60 secondary-boot-reg = <0x35004178>; 61 reg = <1>; 62 clock-frequency = <1000000000>; 63 }; 64 65 cpu2: cpu@2 { 66 device_type = "cpu"; 67 compatible = "arm,cortex-a7"; 68 enable-method = "brcm,bcm23550"; 69 secondary-boot-reg = <0x35004178>; 70 reg = <2>; 71 clock-frequency = <1000000000>; 72 }; 73 74 cpu3: cpu@3 { 75 device_type = "cpu"; 76 compatible = "arm,cortex-a7"; 77 enable-method = "brcm,bcm23550"; 78 secondary-boot-reg = <0x35004178>; 79 reg = <3>; 80 clock-frequency = <1000000000>; 81 }; 82 }; 83 84 /* Hub bus */ 85 hub@34000000 { 86 compatible = "simple-bus"; 87 ranges = <0 0x34000000 0x102f83ac>; 88 #address-cells = <1>; 89 #size-cells = <1>; 90 91 smc@4e000 { 92 compatible = "brcm,bcm23550-smc", "brcm,kona-smc"; 93 reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */ 94 }; 95 96 resetmgr: reset-controller@1001f00 { 97 compatible = "brcm,bcm21664-resetmgr"; 98 reg = <0x01001f00 0x24>; 99 }; 100 101 gpio: gpio@1003000 { 102 compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio"; 103 reg = <0x01003000 0x524>; 104 interrupts = 105 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 106 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 107 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 108 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 109 #gpio-cells = <2>; 110 #interrupt-cells = <2>; 111 gpio-controller; 112 interrupt-controller; 113 }; 114 115 timer@1006000 { 116 compatible = "brcm,kona-timer"; 117 reg = <0x01006000 0x1c>; 118 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 119 clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>; 120 }; 121 }; 122 123 /* Slaves bus */ 124 slaves@3e000000 { 125 compatible = "simple-bus"; 126 ranges = <0 0x3e000000 0x0001c070>; 127 #address-cells = <1>; 128 #size-cells = <1>; 129 130 uartb: serial@0 { 131 compatible = "snps,dw-apb-uart"; 132 reg = <0x00000000 0x118>; 133 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>; 134 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 135 reg-shift = <2>; 136 reg-io-width = <4>; 137 status = "disabled"; 138 }; 139 140 uartb2: serial@1000 { 141 compatible = "snps,dw-apb-uart"; 142 reg = <0x00001000 0x118>; 143 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>; 144 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 145 reg-shift = <2>; 146 reg-io-width = <4>; 147 status = "disabled"; 148 }; 149 150 uartb3: serial@2000 { 151 compatible = "snps,dw-apb-uart"; 152 reg = <0x00002000 0x118>; 153 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>; 154 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 155 reg-shift = <2>; 156 reg-io-width = <4>; 157 status = "disabled"; 158 }; 159 160 bsc1: i2c@16000 { 161 compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 162 reg = <0x00016000 0x70>; 163 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 164 #address-cells = <1>; 165 #size-cells = <0>; 166 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>; 167 status = "disabled"; 168 }; 169 170 bsc2: i2c@17000 { 171 compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 172 reg = <0x00017000 0x70>; 173 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 174 #address-cells = <1>; 175 #size-cells = <0>; 176 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>; 177 status = "disabled"; 178 }; 179 180 bsc3: i2c@18000 { 181 compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 182 reg = <0x00018000 0x70>; 183 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 184 #address-cells = <1>; 185 #size-cells = <0>; 186 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>; 187 status = "disabled"; 188 }; 189 190 bsc4: i2c@1c000 { 191 compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 192 reg = <0x0001c000 0x70>; 193 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 194 #address-cells = <1>; 195 #size-cells = <0>; 196 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>; 197 status = "disabled"; 198 }; 199 }; 200 201 /* Apps bus */ 202 apps@3e300000 { 203 compatible = "simple-bus"; 204 ranges = <0 0x3e300000 0x01b77000>; 205 #address-cells = <1>; 206 #size-cells = <1>; 207 208 usbotg: usb@e20000 { 209 compatible = "snps,dwc2"; 210 reg = <0x00e20000 0x10000>; 211 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 212 clocks = <&usb_otg_ahb_clk>; 213 clock-names = "otg"; 214 phys = <&usbphy>; 215 phy-names = "usb2-phy"; 216 status = "disabled"; 217 }; 218 219 usbphy: usb-phy@e30000 { 220 compatible = "brcm,kona-usb2-phy"; 221 reg = <0x00e30000 0x28>; 222 #phy-cells = <0>; 223 status = "disabled"; 224 }; 225 226 sdio1: mmc@e80000 { 227 compatible = "brcm,kona-sdhci"; 228 reg = <0x00e80000 0x801c>; 229 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 230 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>; 231 status = "disabled"; 232 }; 233 234 sdio2: mmc@e90000 { 235 compatible = "brcm,kona-sdhci"; 236 reg = <0x00e90000 0x801c>; 237 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 238 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>; 239 status = "disabled"; 240 }; 241 242 sdio3: mmc@ea0000 { 243 compatible = "brcm,kona-sdhci"; 244 reg = <0x00ea0000 0x801c>; 245 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 246 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>; 247 status = "disabled"; 248 }; 249 250 sdio4: mmc@eb0000 { 251 compatible = "brcm,kona-sdhci"; 252 reg = <0x00eb0000 0x801c>; 253 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 254 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>; 255 status = "disabled"; 256 }; 257 258 cdc: cdc@1b0e000 { 259 compatible = "brcm,bcm23550-cdc"; 260 reg = <0x01b0e000 0x78>; 261 }; 262 263 gic: interrupt-controller@1b21000 { 264 compatible = "arm,cortex-a9-gic"; 265 #interrupt-cells = <3>; 266 #address-cells = <0>; 267 interrupt-controller; 268 reg = <0x01b21000 0x1000>, 269 <0x01b22000 0x1000>; 270 }; 271 }; 272 273 clocks { 274 #address-cells = <1>; 275 #size-cells = <1>; 276 ranges; 277 278 /* 279 * Fixed clocks are defined before CCUs whose 280 * clocks may depend on them. 281 */ 282 283 ref_32k_clk: ref_32k { 284 #clock-cells = <0>; 285 compatible = "fixed-clock"; 286 clock-frequency = <32768>; 287 }; 288 289 bbl_32k_clk: bbl_32k { 290 #clock-cells = <0>; 291 compatible = "fixed-clock"; 292 clock-frequency = <32768>; 293 }; 294 295 ref_13m_clk: ref_13m { 296 #clock-cells = <0>; 297 compatible = "fixed-clock"; 298 clock-frequency = <13000000>; 299 }; 300 301 var_13m_clk: var_13m { 302 #clock-cells = <0>; 303 compatible = "fixed-clock"; 304 clock-frequency = <13000000>; 305 }; 306 307 dft_19_5m_clk: dft_19_5m { 308 #clock-cells = <0>; 309 compatible = "fixed-clock"; 310 clock-frequency = <19500000>; 311 }; 312 313 ref_crystal_clk: ref_crystal { 314 #clock-cells = <0>; 315 compatible = "fixed-clock"; 316 clock-frequency = <26000000>; 317 }; 318 319 ref_52m_clk: ref_52m { 320 #clock-cells = <0>; 321 compatible = "fixed-clock"; 322 clock-frequency = <52000000>; 323 }; 324 325 var_52m_clk: var_52m { 326 #clock-cells = <0>; 327 compatible = "fixed-clock"; 328 clock-frequency = <52000000>; 329 }; 330 331 usb_otg_ahb_clk: usb_otg_ahb { 332 #clock-cells = <0>; 333 compatible = "fixed-clock"; 334 clock-frequency = <52000000>; 335 }; 336 337 ref_96m_clk: ref_96m { 338 #clock-cells = <0>; 339 compatible = "fixed-clock"; 340 clock-frequency = <96000000>; 341 }; 342 343 var_96m_clk: var_96m { 344 #clock-cells = <0>; 345 compatible = "fixed-clock"; 346 clock-frequency = <96000000>; 347 }; 348 349 ref_104m_clk: ref_104m { 350 #clock-cells = <0>; 351 compatible = "fixed-clock"; 352 clock-frequency = <104000000>; 353 }; 354 355 var_104m_clk: var_104m { 356 #clock-cells = <0>; 357 compatible = "fixed-clock"; 358 clock-frequency = <104000000>; 359 }; 360 361 ref_156m_clk: ref_156m { 362 #clock-cells = <0>; 363 compatible = "fixed-clock"; 364 clock-frequency = <156000000>; 365 }; 366 367 var_156m_clk: var_156m { 368 #clock-cells = <0>; 369 compatible = "fixed-clock"; 370 clock-frequency = <156000000>; 371 }; 372 373 root_ccu: root_ccu@35001000 { 374 compatible = "brcm,bcm21664-root-ccu"; 375 reg = <0x35001000 0x0f00>; 376 #clock-cells = <1>; 377 clock-output-names = "frac_1m"; 378 }; 379 380 aon_ccu: aon_ccu@35002000 { 381 compatible = "brcm,bcm21664-aon-ccu"; 382 reg = <0x35002000 0x0f00>; 383 #clock-cells = <1>; 384 clock-output-names = "hub_timer"; 385 }; 386 387 slave_ccu: slave_ccu@3e011000 { 388 compatible = "brcm,bcm21664-slave-ccu"; 389 reg = <0x3e011000 0x0f00>; 390 #clock-cells = <1>; 391 clock-output-names = "uartb", 392 "uartb2", 393 "uartb3", 394 "bsc1", 395 "bsc2", 396 "bsc3", 397 "bsc4"; 398 }; 399 400 master_ccu: master_ccu@3f001000 { 401 compatible = "brcm,bcm21664-master-ccu"; 402 reg = <0x3f001000 0x0f00>; 403 #clock-cells = <1>; 404 clock-output-names = "sdio1", 405 "sdio2", 406 "sdio3", 407 "sdio4", 408 "sdio1_sleep", 409 "sdio2_sleep", 410 "sdio3_sleep", 411 "sdio4_sleep"; 412 }; 413 }; 414}; 415