xref: /linux/scripts/dtc/include-prefixes/arm/broadcom/bcm2166x-common.dtsi (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1*34f86e85SArtur Weber// SPDX-License-Identifier: BSD-3-Clause
2*34f86e85SArtur Weber/*
3*34f86e85SArtur Weber * Common device tree for components shared between the BCM21664 and BCM23550
4*34f86e85SArtur Weber * SoCs.
5*34f86e85SArtur Weber *
6*34f86e85SArtur Weber * Copyright (C) 2016 Broadcom
7*34f86e85SArtur Weber */
8*34f86e85SArtur Weber
9*34f86e85SArtur Weber/dts-v1/;
10*34f86e85SArtur Weber
11*34f86e85SArtur Weber#include <dt-bindings/clock/bcm21664.h>
12*34f86e85SArtur Weber#include <dt-bindings/interrupt-controller/arm-gic.h>
13*34f86e85SArtur Weber#include <dt-bindings/interrupt-controller/irq.h>
14*34f86e85SArtur Weber
15*34f86e85SArtur Weber/ {
16*34f86e85SArtur Weber	#address-cells = <1>;
17*34f86e85SArtur Weber	#size-cells = <1>;
18*34f86e85SArtur Weber
19*34f86e85SArtur Weber	/* Hub bus */
20*34f86e85SArtur Weber	hub: hub-bus@34000000 {
21*34f86e85SArtur Weber		compatible = "simple-bus";
22*34f86e85SArtur Weber		ranges = <0 0x34000000 0x102f83ac>;
23*34f86e85SArtur Weber		#address-cells = <1>;
24*34f86e85SArtur Weber		#size-cells = <1>;
25*34f86e85SArtur Weber
26*34f86e85SArtur Weber		smc: smc@4e000 {
27*34f86e85SArtur Weber			/* Compatible filled by SoC DTSI */
28*34f86e85SArtur Weber			reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
29*34f86e85SArtur Weber		};
30*34f86e85SArtur Weber
31*34f86e85SArtur Weber		resetmgr: reset-controller@1001f00 {
32*34f86e85SArtur Weber			compatible = "brcm,bcm21664-resetmgr";
33*34f86e85SArtur Weber			reg = <0x01001f00 0x24>;
34*34f86e85SArtur Weber		};
35*34f86e85SArtur Weber
36*34f86e85SArtur Weber		gpio: gpio@1003000 {
37*34f86e85SArtur Weber			/* Compatible filled by SoC DTSI */
38*34f86e85SArtur Weber			reg = <0x01003000 0x524>;
39*34f86e85SArtur Weber			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
40*34f86e85SArtur Weber				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
41*34f86e85SArtur Weber				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
42*34f86e85SArtur Weber				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
43*34f86e85SArtur Weber			#gpio-cells = <2>;
44*34f86e85SArtur Weber			#interrupt-cells = <2>;
45*34f86e85SArtur Weber			gpio-controller;
46*34f86e85SArtur Weber			interrupt-controller;
47*34f86e85SArtur Weber		};
48*34f86e85SArtur Weber
49*34f86e85SArtur Weber		timer@1006000 {
50*34f86e85SArtur Weber			compatible = "brcm,kona-timer";
51*34f86e85SArtur Weber			reg = <0x01006000 0x1c>;
52*34f86e85SArtur Weber			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
53*34f86e85SArtur Weber			clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
54*34f86e85SArtur Weber		};
55*34f86e85SArtur Weber	};
56*34f86e85SArtur Weber
57*34f86e85SArtur Weber	/* Slaves bus */
58*34f86e85SArtur Weber	slaves: slaves-bus@3e000000 {
59*34f86e85SArtur Weber		compatible = "simple-bus";
60*34f86e85SArtur Weber		ranges = <0 0x3e000000 0x0001c070>;
61*34f86e85SArtur Weber		#address-cells = <1>;
62*34f86e85SArtur Weber		#size-cells = <1>;
63*34f86e85SArtur Weber
64*34f86e85SArtur Weber		uartb: serial@0 {
65*34f86e85SArtur Weber			compatible = "snps,dw-apb-uart";
66*34f86e85SArtur Weber			reg = <0x00000000 0x118>;
67*34f86e85SArtur Weber			clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
68*34f86e85SArtur Weber			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
69*34f86e85SArtur Weber			reg-shift = <2>;
70*34f86e85SArtur Weber			reg-io-width = <4>;
71*34f86e85SArtur Weber			status = "disabled";
72*34f86e85SArtur Weber		};
73*34f86e85SArtur Weber
74*34f86e85SArtur Weber		uartb2: serial@1000 {
75*34f86e85SArtur Weber			compatible = "snps,dw-apb-uart";
76*34f86e85SArtur Weber			reg = <0x00001000 0x118>;
77*34f86e85SArtur Weber			clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
78*34f86e85SArtur Weber			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
79*34f86e85SArtur Weber			reg-shift = <2>;
80*34f86e85SArtur Weber			reg-io-width = <4>;
81*34f86e85SArtur Weber			status = "disabled";
82*34f86e85SArtur Weber		};
83*34f86e85SArtur Weber
84*34f86e85SArtur Weber		uartb3: serial@2000 {
85*34f86e85SArtur Weber			compatible = "snps,dw-apb-uart";
86*34f86e85SArtur Weber			reg = <0x00002000 0x118>;
87*34f86e85SArtur Weber			clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
88*34f86e85SArtur Weber			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
89*34f86e85SArtur Weber			reg-shift = <2>;
90*34f86e85SArtur Weber			reg-io-width = <4>;
91*34f86e85SArtur Weber			status = "disabled";
92*34f86e85SArtur Weber		};
93*34f86e85SArtur Weber
94*34f86e85SArtur Weber		bsc1: i2c@16000 {
95*34f86e85SArtur Weber			/* Compatible filled by SoC DTSI */
96*34f86e85SArtur Weber			reg = <0x00016000 0x70>;
97*34f86e85SArtur Weber			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
98*34f86e85SArtur Weber			#address-cells = <1>;
99*34f86e85SArtur Weber			#size-cells = <0>;
100*34f86e85SArtur Weber			clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
101*34f86e85SArtur Weber			status = "disabled";
102*34f86e85SArtur Weber		};
103*34f86e85SArtur Weber
104*34f86e85SArtur Weber		bsc2: i2c@17000 {
105*34f86e85SArtur Weber			/* Compatible filled by SoC DTSI */
106*34f86e85SArtur Weber			reg = <0x00017000 0x70>;
107*34f86e85SArtur Weber			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
108*34f86e85SArtur Weber			#address-cells = <1>;
109*34f86e85SArtur Weber			#size-cells = <0>;
110*34f86e85SArtur Weber			clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
111*34f86e85SArtur Weber			status = "disabled";
112*34f86e85SArtur Weber		};
113*34f86e85SArtur Weber
114*34f86e85SArtur Weber		bsc3: i2c@18000 {
115*34f86e85SArtur Weber			/* Compatible filled by SoC DTSI */
116*34f86e85SArtur Weber			reg = <0x00018000 0x70>;
117*34f86e85SArtur Weber			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
118*34f86e85SArtur Weber			#address-cells = <1>;
119*34f86e85SArtur Weber			#size-cells = <0>;
120*34f86e85SArtur Weber			clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
121*34f86e85SArtur Weber			status = "disabled";
122*34f86e85SArtur Weber		};
123*34f86e85SArtur Weber
124*34f86e85SArtur Weber		bsc4: i2c@1c000 {
125*34f86e85SArtur Weber			/* Compatible filled by SoC DTSI */
126*34f86e85SArtur Weber			reg = <0x0001c000 0x70>;
127*34f86e85SArtur Weber			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
128*34f86e85SArtur Weber			#address-cells = <1>;
129*34f86e85SArtur Weber			#size-cells = <0>;
130*34f86e85SArtur Weber			clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
131*34f86e85SArtur Weber			status = "disabled";
132*34f86e85SArtur Weber		};
133*34f86e85SArtur Weber	};
134*34f86e85SArtur Weber
135*34f86e85SArtur Weber	/* Apps bus */
136*34f86e85SArtur Weber	apps: apps-bus@3e300000 {
137*34f86e85SArtur Weber		compatible = "simple-bus";
138*34f86e85SArtur Weber		ranges = <0 0x3e300000 0x01c02000>;
139*34f86e85SArtur Weber		#address-cells = <1>;
140*34f86e85SArtur Weber		#size-cells = <1>;
141*34f86e85SArtur Weber
142*34f86e85SArtur Weber		usbotg: usb@e20000 {
143*34f86e85SArtur Weber			compatible = "snps,dwc2";
144*34f86e85SArtur Weber			reg = <0x00e20000 0x10000>;
145*34f86e85SArtur Weber			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
146*34f86e85SArtur Weber			clocks = <&usb_otg_ahb_clk>;
147*34f86e85SArtur Weber			clock-names = "otg";
148*34f86e85SArtur Weber			phys = <&usbphy>;
149*34f86e85SArtur Weber			phy-names = "usb2-phy";
150*34f86e85SArtur Weber			status = "disabled";
151*34f86e85SArtur Weber		};
152*34f86e85SArtur Weber
153*34f86e85SArtur Weber		usbphy: usb-phy@e30000 {
154*34f86e85SArtur Weber			compatible = "brcm,kona-usb2-phy";
155*34f86e85SArtur Weber			reg = <0x00e30000 0x28>;
156*34f86e85SArtur Weber			#phy-cells = <0>;
157*34f86e85SArtur Weber			status = "disabled";
158*34f86e85SArtur Weber		};
159*34f86e85SArtur Weber
160*34f86e85SArtur Weber		sdio1: mmc@e80000 {
161*34f86e85SArtur Weber			compatible = "brcm,kona-sdhci";
162*34f86e85SArtur Weber			reg = <0x00e80000 0x801c>;
163*34f86e85SArtur Weber			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
164*34f86e85SArtur Weber			clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
165*34f86e85SArtur Weber			status = "disabled";
166*34f86e85SArtur Weber		};
167*34f86e85SArtur Weber
168*34f86e85SArtur Weber		sdio2: mmc@e90000 {
169*34f86e85SArtur Weber			compatible = "brcm,kona-sdhci";
170*34f86e85SArtur Weber			reg = <0x00e90000 0x801c>;
171*34f86e85SArtur Weber			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
172*34f86e85SArtur Weber			clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
173*34f86e85SArtur Weber			status = "disabled";
174*34f86e85SArtur Weber		};
175*34f86e85SArtur Weber
176*34f86e85SArtur Weber		sdio3: mmc@ea0000 {
177*34f86e85SArtur Weber			compatible = "brcm,kona-sdhci";
178*34f86e85SArtur Weber			reg = <0x00ea0000 0x801c>;
179*34f86e85SArtur Weber			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
180*34f86e85SArtur Weber			clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
181*34f86e85SArtur Weber			status = "disabled";
182*34f86e85SArtur Weber		};
183*34f86e85SArtur Weber
184*34f86e85SArtur Weber		sdio4: mmc@eb0000 {
185*34f86e85SArtur Weber			compatible = "brcm,kona-sdhci";
186*34f86e85SArtur Weber			reg = <0x00eb0000 0x801c>;
187*34f86e85SArtur Weber			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
188*34f86e85SArtur Weber			clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
189*34f86e85SArtur Weber			status = "disabled";
190*34f86e85SArtur Weber		};
191*34f86e85SArtur Weber	};
192*34f86e85SArtur Weber
193*34f86e85SArtur Weber	clocks {
194*34f86e85SArtur Weber		#address-cells = <1>;
195*34f86e85SArtur Weber		#size-cells = <1>;
196*34f86e85SArtur Weber		ranges;
197*34f86e85SArtur Weber
198*34f86e85SArtur Weber		/*
199*34f86e85SArtur Weber		 * Fixed clocks are defined before CCUs whose
200*34f86e85SArtur Weber		 * clocks may depend on them.
201*34f86e85SArtur Weber		 */
202*34f86e85SArtur Weber
203*34f86e85SArtur Weber		ref_32k_clk: ref_32k {
204*34f86e85SArtur Weber			#clock-cells = <0>;
205*34f86e85SArtur Weber			compatible = "fixed-clock";
206*34f86e85SArtur Weber			clock-frequency = <32768>;
207*34f86e85SArtur Weber		};
208*34f86e85SArtur Weber
209*34f86e85SArtur Weber		bbl_32k_clk: bbl_32k {
210*34f86e85SArtur Weber			#clock-cells = <0>;
211*34f86e85SArtur Weber			compatible = "fixed-clock";
212*34f86e85SArtur Weber			clock-frequency = <32768>;
213*34f86e85SArtur Weber		};
214*34f86e85SArtur Weber
215*34f86e85SArtur Weber		ref_13m_clk: ref_13m {
216*34f86e85SArtur Weber			#clock-cells = <0>;
217*34f86e85SArtur Weber			compatible = "fixed-clock";
218*34f86e85SArtur Weber			clock-frequency = <13000000>;
219*34f86e85SArtur Weber		};
220*34f86e85SArtur Weber
221*34f86e85SArtur Weber		var_13m_clk: var_13m {
222*34f86e85SArtur Weber			#clock-cells = <0>;
223*34f86e85SArtur Weber			compatible = "fixed-clock";
224*34f86e85SArtur Weber			clock-frequency = <13000000>;
225*34f86e85SArtur Weber		};
226*34f86e85SArtur Weber
227*34f86e85SArtur Weber		dft_19_5m_clk: dft_19_5m {
228*34f86e85SArtur Weber			#clock-cells = <0>;
229*34f86e85SArtur Weber			compatible = "fixed-clock";
230*34f86e85SArtur Weber			clock-frequency = <19500000>;
231*34f86e85SArtur Weber		};
232*34f86e85SArtur Weber
233*34f86e85SArtur Weber		ref_crystal_clk: ref_crystal {
234*34f86e85SArtur Weber			#clock-cells = <0>;
235*34f86e85SArtur Weber			compatible = "fixed-clock";
236*34f86e85SArtur Weber			clock-frequency = <26000000>;
237*34f86e85SArtur Weber		};
238*34f86e85SArtur Weber
239*34f86e85SArtur Weber		ref_52m_clk: ref_52m {
240*34f86e85SArtur Weber			#clock-cells = <0>;
241*34f86e85SArtur Weber			compatible = "fixed-clock";
242*34f86e85SArtur Weber			clock-frequency = <52000000>;
243*34f86e85SArtur Weber		};
244*34f86e85SArtur Weber
245*34f86e85SArtur Weber		var_52m_clk: var_52m {
246*34f86e85SArtur Weber			#clock-cells = <0>;
247*34f86e85SArtur Weber			compatible = "fixed-clock";
248*34f86e85SArtur Weber			clock-frequency = <52000000>;
249*34f86e85SArtur Weber		};
250*34f86e85SArtur Weber
251*34f86e85SArtur Weber		usb_otg_ahb_clk: usb_otg_ahb {
252*34f86e85SArtur Weber			#clock-cells = <0>;
253*34f86e85SArtur Weber			compatible = "fixed-clock";
254*34f86e85SArtur Weber			clock-frequency = <52000000>;
255*34f86e85SArtur Weber		};
256*34f86e85SArtur Weber
257*34f86e85SArtur Weber		ref_96m_clk: ref_96m {
258*34f86e85SArtur Weber			#clock-cells = <0>;
259*34f86e85SArtur Weber			compatible = "fixed-clock";
260*34f86e85SArtur Weber			clock-frequency = <96000000>;
261*34f86e85SArtur Weber		};
262*34f86e85SArtur Weber
263*34f86e85SArtur Weber		var_96m_clk: var_96m {
264*34f86e85SArtur Weber			#clock-cells = <0>;
265*34f86e85SArtur Weber			compatible = "fixed-clock";
266*34f86e85SArtur Weber			clock-frequency = <96000000>;
267*34f86e85SArtur Weber		};
268*34f86e85SArtur Weber
269*34f86e85SArtur Weber		ref_104m_clk: ref_104m {
270*34f86e85SArtur Weber			#clock-cells = <0>;
271*34f86e85SArtur Weber			compatible = "fixed-clock";
272*34f86e85SArtur Weber			clock-frequency = <104000000>;
273*34f86e85SArtur Weber		};
274*34f86e85SArtur Weber
275*34f86e85SArtur Weber		var_104m_clk: var_104m {
276*34f86e85SArtur Weber			#clock-cells = <0>;
277*34f86e85SArtur Weber			compatible = "fixed-clock";
278*34f86e85SArtur Weber			clock-frequency = <104000000>;
279*34f86e85SArtur Weber		};
280*34f86e85SArtur Weber
281*34f86e85SArtur Weber		ref_156m_clk: ref_156m {
282*34f86e85SArtur Weber			#clock-cells = <0>;
283*34f86e85SArtur Weber			compatible = "fixed-clock";
284*34f86e85SArtur Weber			clock-frequency = <156000000>;
285*34f86e85SArtur Weber		};
286*34f86e85SArtur Weber
287*34f86e85SArtur Weber		var_156m_clk: var_156m {
288*34f86e85SArtur Weber			#clock-cells = <0>;
289*34f86e85SArtur Weber			compatible = "fixed-clock";
290*34f86e85SArtur Weber			clock-frequency = <156000000>;
291*34f86e85SArtur Weber		};
292*34f86e85SArtur Weber
293*34f86e85SArtur Weber		root_ccu: root_ccu@35001000 {
294*34f86e85SArtur Weber			compatible = "brcm,bcm21664-root-ccu";
295*34f86e85SArtur Weber			reg = <0x35001000 0x0f00>;
296*34f86e85SArtur Weber			#clock-cells = <1>;
297*34f86e85SArtur Weber			clock-output-names = "frac_1m";
298*34f86e85SArtur Weber		};
299*34f86e85SArtur Weber
300*34f86e85SArtur Weber		aon_ccu: aon_ccu@35002000 {
301*34f86e85SArtur Weber			compatible = "brcm,bcm21664-aon-ccu";
302*34f86e85SArtur Weber			reg = <0x35002000 0x0f00>;
303*34f86e85SArtur Weber			#clock-cells = <1>;
304*34f86e85SArtur Weber			clock-output-names = "hub_timer";
305*34f86e85SArtur Weber		};
306*34f86e85SArtur Weber
307*34f86e85SArtur Weber		slave_ccu: slave_ccu@3e011000 {
308*34f86e85SArtur Weber			compatible = "brcm,bcm21664-slave-ccu";
309*34f86e85SArtur Weber			reg = <0x3e011000 0x0f00>;
310*34f86e85SArtur Weber			#clock-cells = <1>;
311*34f86e85SArtur Weber			clock-output-names = "uartb",
312*34f86e85SArtur Weber					     "uartb2",
313*34f86e85SArtur Weber					     "uartb3",
314*34f86e85SArtur Weber					     "bsc1",
315*34f86e85SArtur Weber					     "bsc2",
316*34f86e85SArtur Weber					     "bsc3",
317*34f86e85SArtur Weber					     "bsc4";
318*34f86e85SArtur Weber		};
319*34f86e85SArtur Weber
320*34f86e85SArtur Weber		master_ccu: master_ccu@3f001000 {
321*34f86e85SArtur Weber			compatible = "brcm,bcm21664-master-ccu";
322*34f86e85SArtur Weber			reg = <0x3f001000 0x0f00>;
323*34f86e85SArtur Weber			#clock-cells = <1>;
324*34f86e85SArtur Weber			clock-output-names = "sdio1",
325*34f86e85SArtur Weber					     "sdio2",
326*34f86e85SArtur Weber					     "sdio3",
327*34f86e85SArtur Weber					     "sdio4",
328*34f86e85SArtur Weber					     "sdio1_sleep",
329*34f86e85SArtur Weber					     "sdio2_sleep",
330*34f86e85SArtur Weber					     "sdio3_sleep",
331*34f86e85SArtur Weber					     "sdio4_sleep";
332*34f86e85SArtur Weber		};
333*34f86e85SArtur Weber	};
334*34f86e85SArtur Weber};
335