1*724ba675SRob Herring/* 2*724ba675SRob Herring * BSD LICENSE 3*724ba675SRob Herring * 4*724ba675SRob Herring * Copyright(c) 2014 Broadcom Corporation. All rights reserved. 5*724ba675SRob Herring * 6*724ba675SRob Herring * Redistribution and use in source and binary forms, with or without 7*724ba675SRob Herring * modification, are permitted provided that the following conditions 8*724ba675SRob Herring * are met: 9*724ba675SRob Herring * 10*724ba675SRob Herring * * Redistributions of source code must retain the above copyright 11*724ba675SRob Herring * notice, this list of conditions and the following disclaimer. 12*724ba675SRob Herring * * Redistributions in binary form must reproduce the above copyright 13*724ba675SRob Herring * notice, this list of conditions and the following disclaimer in 14*724ba675SRob Herring * the documentation and/or other materials provided with the 15*724ba675SRob Herring * distribution. 16*724ba675SRob Herring * * Neither the name of Broadcom Corporation nor the names of its 17*724ba675SRob Herring * contributors may be used to endorse or promote products derived 18*724ba675SRob Herring * from this software without specific prior written permission. 19*724ba675SRob Herring * 20*724ba675SRob Herring * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21*724ba675SRob Herring * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22*724ba675SRob Herring * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23*724ba675SRob Herring * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24*724ba675SRob Herring * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25*724ba675SRob Herring * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26*724ba675SRob Herring * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27*724ba675SRob Herring * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28*724ba675SRob Herring * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29*724ba675SRob Herring * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30*724ba675SRob Herring * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31*724ba675SRob Herring */ 32*724ba675SRob Herring 33*724ba675SRob Herringclocks { 34*724ba675SRob Herring #address-cells = <1>; 35*724ba675SRob Herring #size-cells = <1>; 36*724ba675SRob Herring ranges; 37*724ba675SRob Herring 38*724ba675SRob Herring osc: oscillator { 39*724ba675SRob Herring #clock-cells = <0>; 40*724ba675SRob Herring compatible = "fixed-clock"; 41*724ba675SRob Herring clock-frequency = <25000000>; 42*724ba675SRob Herring }; 43*724ba675SRob Herring 44*724ba675SRob Herring /* Cygnus ARM PLL */ 45*724ba675SRob Herring armpll: armpll@19000000 { 46*724ba675SRob Herring #clock-cells = <0>; 47*724ba675SRob Herring compatible = "brcm,cygnus-armpll"; 48*724ba675SRob Herring clocks = <&osc>; 49*724ba675SRob Herring reg = <0x19000000 0x1000>; 50*724ba675SRob Herring }; 51*724ba675SRob Herring 52*724ba675SRob Herring /* peripheral clock for system timer */ 53*724ba675SRob Herring periph_clk: arm_periph_clk { 54*724ba675SRob Herring #clock-cells = <0>; 55*724ba675SRob Herring compatible = "fixed-factor-clock"; 56*724ba675SRob Herring clocks = <&armpll>; 57*724ba675SRob Herring clock-div = <2>; 58*724ba675SRob Herring clock-mult = <1>; 59*724ba675SRob Herring }; 60*724ba675SRob Herring 61*724ba675SRob Herring /* APB bus clock */ 62*724ba675SRob Herring apb_clk: apb_clk { 63*724ba675SRob Herring #clock-cells = <0>; 64*724ba675SRob Herring compatible = "fixed-factor-clock"; 65*724ba675SRob Herring clocks = <&armpll>; 66*724ba675SRob Herring clock-div = <4>; 67*724ba675SRob Herring clock-mult = <1>; 68*724ba675SRob Herring }; 69*724ba675SRob Herring 70*724ba675SRob Herring genpll: genpll@301d000 { 71*724ba675SRob Herring #clock-cells = <1>; 72*724ba675SRob Herring compatible = "brcm,cygnus-genpll"; 73*724ba675SRob Herring reg = <0x0301d000 0x2c>, <0x0301c020 0x4>; 74*724ba675SRob Herring clocks = <&osc>; 75*724ba675SRob Herring clock-output-names = "genpll", "axi21", "250mhz", "ihost_sys", 76*724ba675SRob Herring "enet_sw", "audio_125", "can"; 77*724ba675SRob Herring }; 78*724ba675SRob Herring 79*724ba675SRob Herring /* always 1/2 of the axi21 clock */ 80*724ba675SRob Herring axi41_clk: axi41_clk { 81*724ba675SRob Herring #clock-cells = <0>; 82*724ba675SRob Herring compatible = "fixed-factor-clock"; 83*724ba675SRob Herring clocks = <&genpll 1>; 84*724ba675SRob Herring clock-div = <2>; 85*724ba675SRob Herring clock-mult = <1>; 86*724ba675SRob Herring }; 87*724ba675SRob Herring 88*724ba675SRob Herring /* always 1/4 of the axi21 clock */ 89*724ba675SRob Herring axi81_clk: axi81_clk { 90*724ba675SRob Herring #clock-cells = <0>; 91*724ba675SRob Herring compatible = "fixed-factor-clock"; 92*724ba675SRob Herring clocks = <&genpll 1>; 93*724ba675SRob Herring clock-div = <4>; 94*724ba675SRob Herring clock-mult = <1>; 95*724ba675SRob Herring }; 96*724ba675SRob Herring 97*724ba675SRob Herring lcpll0: lcpll0@301d02c { 98*724ba675SRob Herring #clock-cells = <1>; 99*724ba675SRob Herring compatible = "brcm,cygnus-lcpll0"; 100*724ba675SRob Herring reg = <0x0301d02c 0x1c>, <0x0301c020 0x4>; 101*724ba675SRob Herring clocks = <&osc>; 102*724ba675SRob Herring clock-output-names = "lcpll0", "pcie_phy", "ddr_phy", "sdio", 103*724ba675SRob Herring "usb_phy", "smart_card", "ch5"; 104*724ba675SRob Herring }; 105*724ba675SRob Herring 106*724ba675SRob Herring mipipll: mipipll@180a9800 { 107*724ba675SRob Herring #clock-cells = <1>; 108*724ba675SRob Herring compatible = "brcm,cygnus-mipipll"; 109*724ba675SRob Herring reg = <0x180a9800 0x2c>, <0x0301c020 0x4>, <0x180aa024 0x4>; 110*724ba675SRob Herring clocks = <&osc>; 111*724ba675SRob Herring clock-output-names = "mipipll", "ch0_unused", "ch1_lcd", 112*724ba675SRob Herring "ch2_v3d", "ch3_unused", "ch4_unused", 113*724ba675SRob Herring "ch5_unused"; 114*724ba675SRob Herring }; 115*724ba675SRob Herring 116*724ba675SRob Herring asiu_clks: asiu_clks@301d048 { 117*724ba675SRob Herring #clock-cells = <1>; 118*724ba675SRob Herring compatible = "brcm,cygnus-asiu-clk"; 119*724ba675SRob Herring reg = <0x0301d048 0xc>, <0x180aa024 0x4>; 120*724ba675SRob Herring 121*724ba675SRob Herring clocks = <&osc>; 122*724ba675SRob Herring clock-output-names = "keypad", "adc/touch", "pwm"; 123*724ba675SRob Herring }; 124*724ba675SRob Herring 125*724ba675SRob Herring audiopll: audiopll@180aeb00 { 126*724ba675SRob Herring #clock-cells = <1>; 127*724ba675SRob Herring compatible = "brcm,cygnus-audiopll"; 128*724ba675SRob Herring reg = <0x180aeb00 0x68>; 129*724ba675SRob Herring clocks = <&osc>; 130*724ba675SRob Herring clock-output-names = "audiopll", "ch0_audio", 131*724ba675SRob Herring "ch1_audio", "ch2_audio"; 132*724ba675SRob Herring }; 133*724ba675SRob Herring}; 134