1// SPDX-License-Identifier: GPL-2.0-or-later 2// Copyright 2019 IBM Corp. 3 4#include <dt-bindings/interrupt-controller/arm-gic.h> 5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6#include <dt-bindings/clock/ast2600-clock.h> 7 8/ { 9 model = "Aspeed BMC"; 10 compatible = "aspeed,ast2600"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 14 15 aliases { 16 i2c0 = &i2c0; 17 i2c1 = &i2c1; 18 i2c2 = &i2c2; 19 i2c3 = &i2c3; 20 i2c4 = &i2c4; 21 i2c5 = &i2c5; 22 i2c6 = &i2c6; 23 i2c7 = &i2c7; 24 i2c8 = &i2c8; 25 i2c9 = &i2c9; 26 i2c10 = &i2c10; 27 i2c11 = &i2c11; 28 i2c12 = &i2c12; 29 i2c13 = &i2c13; 30 i2c14 = &i2c14; 31 i2c15 = &i2c15; 32 serial0 = &uart1; 33 serial1 = &uart2; 34 serial2 = &uart3; 35 serial3 = &uart4; 36 serial4 = &uart5; 37 serial5 = &vuart1; 38 serial6 = &vuart2; 39 mdio0 = &mdio0; 40 mdio1 = &mdio1; 41 mdio2 = &mdio2; 42 mdio3 = &mdio3; 43 }; 44 45 46 cpus { 47 #address-cells = <1>; 48 #size-cells = <0>; 49 enable-method = "aspeed,ast2600-smp"; 50 51 cpu@f00 { 52 compatible = "arm,cortex-a7"; 53 device_type = "cpu"; 54 reg = <0xf00>; 55 }; 56 57 cpu@f01 { 58 compatible = "arm,cortex-a7"; 59 device_type = "cpu"; 60 reg = <0xf01>; 61 }; 62 }; 63 64 timer { 65 compatible = "arm,armv7-timer"; 66 interrupt-parent = <&gic>; 67 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 68 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 69 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 70 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 71 clocks = <&syscon ASPEED_CLK_HPLL>; 72 arm,cpu-registers-not-fw-configured; 73 always-on; 74 }; 75 76 edac: sdram@1e6e0000 { 77 compatible = "aspeed,ast2600-sdram-edac", "syscon"; 78 reg = <0x1e6e0000 0x174>; 79 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 80 }; 81 82 ahb { 83 compatible = "simple-bus"; 84 #address-cells = <1>; 85 #size-cells = <1>; 86 device_type = "soc"; 87 ranges; 88 89 gic: interrupt-controller@40461000 { 90 compatible = "arm,cortex-a7-gic"; 91 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 92 #interrupt-cells = <3>; 93 interrupt-controller; 94 interrupt-parent = <&gic>; 95 reg = <0x40461000 0x1000>, 96 <0x40462000 0x1000>, 97 <0x40464000 0x2000>, 98 <0x40466000 0x2000>; 99 }; 100 101 ahbc: bus@1e600000 { 102 compatible = "aspeed,ast2600-ahbc", "syscon"; 103 reg = <0x1e600000 0x100>; 104 }; 105 106 fmc: spi@1e620000 { 107 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 compatible = "aspeed,ast2600-fmc"; 111 clocks = <&syscon ASPEED_CLK_AHB>; 112 status = "disabled"; 113 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 114 flash@0 { 115 reg = < 0 >; 116 compatible = "jedec,spi-nor"; 117 spi-max-frequency = <50000000>; 118 spi-rx-bus-width = <2>; 119 status = "disabled"; 120 }; 121 flash@1 { 122 reg = < 1 >; 123 compatible = "jedec,spi-nor"; 124 spi-max-frequency = <50000000>; 125 spi-rx-bus-width = <2>; 126 status = "disabled"; 127 }; 128 flash@2 { 129 reg = < 2 >; 130 compatible = "jedec,spi-nor"; 131 spi-max-frequency = <50000000>; 132 spi-rx-bus-width = <2>; 133 status = "disabled"; 134 }; 135 }; 136 137 spi1: spi@1e630000 { 138 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>; 139 #address-cells = <1>; 140 #size-cells = <0>; 141 compatible = "aspeed,ast2600-spi"; 142 clocks = <&syscon ASPEED_CLK_AHB>; 143 status = "disabled"; 144 flash@0 { 145 reg = < 0 >; 146 compatible = "jedec,spi-nor"; 147 spi-max-frequency = <50000000>; 148 spi-rx-bus-width = <2>; 149 status = "disabled"; 150 }; 151 flash@1 { 152 reg = < 1 >; 153 compatible = "jedec,spi-nor"; 154 spi-max-frequency = <50000000>; 155 spi-rx-bus-width = <2>; 156 status = "disabled"; 157 }; 158 }; 159 160 spi2: spi@1e631000 { 161 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>; 162 #address-cells = <1>; 163 #size-cells = <0>; 164 compatible = "aspeed,ast2600-spi"; 165 clocks = <&syscon ASPEED_CLK_AHB>; 166 status = "disabled"; 167 flash@0 { 168 reg = < 0 >; 169 compatible = "jedec,spi-nor"; 170 spi-max-frequency = <50000000>; 171 spi-rx-bus-width = <2>; 172 status = "disabled"; 173 }; 174 flash@1 { 175 reg = < 1 >; 176 compatible = "jedec,spi-nor"; 177 spi-max-frequency = <50000000>; 178 spi-rx-bus-width = <2>; 179 status = "disabled"; 180 }; 181 flash@2 { 182 reg = < 2 >; 183 compatible = "jedec,spi-nor"; 184 spi-max-frequency = <50000000>; 185 spi-rx-bus-width = <2>; 186 status = "disabled"; 187 }; 188 }; 189 190 mdio0: mdio@1e650000 { 191 compatible = "aspeed,ast2600-mdio"; 192 reg = <0x1e650000 0x8>; 193 #address-cells = <1>; 194 #size-cells = <0>; 195 status = "disabled"; 196 pinctrl-names = "default"; 197 pinctrl-0 = <&pinctrl_mdio1_default>; 198 resets = <&syscon ASPEED_RESET_MII>; 199 }; 200 201 mdio1: mdio@1e650008 { 202 compatible = "aspeed,ast2600-mdio"; 203 reg = <0x1e650008 0x8>; 204 #address-cells = <1>; 205 #size-cells = <0>; 206 status = "disabled"; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&pinctrl_mdio2_default>; 209 resets = <&syscon ASPEED_RESET_MII>; 210 }; 211 212 mdio2: mdio@1e650010 { 213 compatible = "aspeed,ast2600-mdio"; 214 reg = <0x1e650010 0x8>; 215 #address-cells = <1>; 216 #size-cells = <0>; 217 status = "disabled"; 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pinctrl_mdio3_default>; 220 resets = <&syscon ASPEED_RESET_MII>; 221 }; 222 223 mdio3: mdio@1e650018 { 224 compatible = "aspeed,ast2600-mdio"; 225 reg = <0x1e650018 0x8>; 226 #address-cells = <1>; 227 #size-cells = <0>; 228 status = "disabled"; 229 pinctrl-names = "default"; 230 pinctrl-0 = <&pinctrl_mdio4_default>; 231 resets = <&syscon ASPEED_RESET_MII>; 232 }; 233 234 mac0: ftgmac@1e660000 { 235 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 236 reg = <0x1e660000 0x180>; 237 #address-cells = <1>; 238 #size-cells = <0>; 239 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 240 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 241 status = "disabled"; 242 }; 243 244 mac1: ftgmac@1e680000 { 245 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 246 reg = <0x1e680000 0x180>; 247 #address-cells = <1>; 248 #size-cells = <0>; 249 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 250 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 251 status = "disabled"; 252 }; 253 254 mac2: ftgmac@1e670000 { 255 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 256 reg = <0x1e670000 0x180>; 257 #address-cells = <1>; 258 #size-cells = <0>; 259 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 260 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>; 261 status = "disabled"; 262 }; 263 264 mac3: ftgmac@1e690000 { 265 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 266 reg = <0x1e690000 0x180>; 267 #address-cells = <1>; 268 #size-cells = <0>; 269 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 270 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>; 271 status = "disabled"; 272 }; 273 274 ehci0: usb@1e6a1000 { 275 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 276 reg = <0x1e6a1000 0x100>; 277 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 278 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 279 pinctrl-names = "default"; 280 pinctrl-0 = <&pinctrl_usb2ah_default>; 281 status = "disabled"; 282 }; 283 284 ehci1: usb@1e6a3000 { 285 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 286 reg = <0x1e6a3000 0x100>; 287 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 288 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 289 pinctrl-names = "default"; 290 pinctrl-0 = <&pinctrl_usb2bh_default>; 291 status = "disabled"; 292 }; 293 294 uhci: usb@1e6b0000 { 295 compatible = "aspeed,ast2600-uhci", "generic-uhci"; 296 reg = <0x1e6b0000 0x100>; 297 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 298 #ports = <2>; 299 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 300 status = "disabled"; 301 /* 302 * No default pinmux, it will follow EHCI, use an 303 * explicit pinmux override if EHCI is not enabled. 304 */ 305 }; 306 307 vhub: usb-vhub@1e6a0000 { 308 compatible = "aspeed,ast2600-usb-vhub"; 309 reg = <0x1e6a0000 0x350>; 310 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 311 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 312 aspeed,vhub-downstream-ports = <7>; 313 aspeed,vhub-generic-endpoints = <21>; 314 pinctrl-names = "default"; 315 pinctrl-0 = <&pinctrl_usb2ad_default>; 316 status = "disabled"; 317 }; 318 319 udc: usb@1e6a2000 { 320 compatible = "aspeed,ast2600-udc"; 321 reg = <0x1e6a2000 0x300>; 322 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 323 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 324 pinctrl-names = "default"; 325 pinctrl-0 = <&pinctrl_usb2bd_default>; 326 status = "disabled"; 327 }; 328 329 apb { 330 compatible = "simple-bus"; 331 #address-cells = <1>; 332 #size-cells = <1>; 333 ranges; 334 335 hace: crypto@1e6d0000 { 336 compatible = "aspeed,ast2600-hace"; 337 reg = <0x1e6d0000 0x200>; 338 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 339 clocks = <&syscon ASPEED_CLK_GATE_YCLK>; 340 resets = <&syscon ASPEED_RESET_HACE>; 341 }; 342 343 syscon: syscon@1e6e2000 { 344 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd"; 345 reg = <0x1e6e2000 0x1000>; 346 ranges = <0 0x1e6e2000 0x1000>; 347 #address-cells = <1>; 348 #size-cells = <1>; 349 #clock-cells = <1>; 350 #reset-cells = <1>; 351 352 pinctrl: pinctrl { 353 compatible = "aspeed,ast2600-pinctrl"; 354 }; 355 356 silicon-id@14 { 357 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id"; 358 reg = <0x14 0x4 0x5b0 0x8>; 359 }; 360 361 smp-memram@180 { 362 compatible = "aspeed,ast2600-smpmem"; 363 reg = <0x180 0x40>; 364 }; 365 366 scu_ic0: interrupt-controller@560 { 367 #interrupt-cells = <1>; 368 compatible = "aspeed,ast2600-scu-ic0"; 369 reg = <0x560 0x4>; 370 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 371 interrupt-controller; 372 }; 373 374 scu_ic1: interrupt-controller@570 { 375 #interrupt-cells = <1>; 376 compatible = "aspeed,ast2600-scu-ic1"; 377 reg = <0x570 0x4>; 378 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 379 interrupt-controller; 380 }; 381 }; 382 383 rng: hwrng@1e6e2524 { 384 compatible = "timeriomem_rng"; 385 reg = <0x1e6e2524 0x4>; 386 period = <1>; 387 quality = <100>; 388 }; 389 390 gfx: display@1e6e6000 { 391 compatible = "aspeed,ast2600-gfx", "syscon"; 392 reg = <0x1e6e6000 0x1000>; 393 reg-io-width = <4>; 394 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; 395 resets = <&syscon ASPEED_RESET_GRAPHICS>; 396 syscon = <&syscon>; 397 status = "disabled"; 398 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 399 }; 400 401 xdma: xdma@1e6e7000 { 402 compatible = "aspeed,ast2600-xdma"; 403 reg = <0x1e6e7000 0x100>; 404 clocks = <&syscon ASPEED_CLK_GATE_BCLK>; 405 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>; 406 reset-names = "device", "root-complex"; 407 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 408 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>; 409 aspeed,pcie-device = "bmc"; 410 aspeed,scu = <&syscon>; 411 status = "disabled"; 412 }; 413 414 adc0: adc@1e6e9000 { 415 compatible = "aspeed,ast2600-adc0"; 416 reg = <0x1e6e9000 0x100>; 417 clocks = <&syscon ASPEED_CLK_APB2>; 418 resets = <&syscon ASPEED_RESET_ADC>; 419 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 420 #io-channel-cells = <1>; 421 status = "disabled"; 422 }; 423 424 adc1: adc@1e6e9100 { 425 compatible = "aspeed,ast2600-adc1"; 426 reg = <0x1e6e9100 0x100>; 427 clocks = <&syscon ASPEED_CLK_APB2>; 428 resets = <&syscon ASPEED_RESET_ADC>; 429 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 430 #io-channel-cells = <1>; 431 status = "disabled"; 432 }; 433 434 sbc: secure-boot-controller@1e6f2000 { 435 compatible = "aspeed,ast2600-sbc"; 436 reg = <0x1e6f2000 0x1000>; 437 }; 438 439 acry: crypto@1e6fa000 { 440 compatible = "aspeed,ast2600-acry"; 441 reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>; 442 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; 443 clocks = <&syscon ASPEED_CLK_GATE_RSACLK>; 444 aspeed,ahbc = <&ahbc>; 445 }; 446 447 video: video@1e700000 { 448 compatible = "aspeed,ast2600-video-engine"; 449 reg = <0x1e700000 0x1000>; 450 clocks = <&syscon ASPEED_CLK_GATE_VCLK>, 451 <&syscon ASPEED_CLK_GATE_ECLK>; 452 clock-names = "vclk", "eclk"; 453 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 454 status = "disabled"; 455 }; 456 457 gpio0: gpio@1e780000 { 458 #gpio-cells = <2>; 459 gpio-controller; 460 compatible = "aspeed,ast2600-gpio"; 461 reg = <0x1e780000 0x400>; 462 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 463 gpio-ranges = <&pinctrl 0 0 208>; 464 ngpios = <208>; 465 clocks = <&syscon ASPEED_CLK_APB2>; 466 interrupt-controller; 467 #interrupt-cells = <2>; 468 }; 469 470 sgpiom0: sgpiom@1e780500 { 471 #gpio-cells = <2>; 472 gpio-controller; 473 compatible = "aspeed,ast2600-sgpiom"; 474 reg = <0x1e780500 0x100>; 475 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 476 clocks = <&syscon ASPEED_CLK_APB2>; 477 interrupt-controller; 478 bus-frequency = <12000000>; 479 pinctrl-names = "default"; 480 pinctrl-0 = <&pinctrl_sgpm1_default>; 481 status = "disabled"; 482 }; 483 484 sgpiom1: sgpiom@1e780600 { 485 #gpio-cells = <2>; 486 gpio-controller; 487 compatible = "aspeed,ast2600-sgpiom"; 488 reg = <0x1e780600 0x100>; 489 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 490 clocks = <&syscon ASPEED_CLK_APB2>; 491 interrupt-controller; 492 bus-frequency = <12000000>; 493 pinctrl-names = "default"; 494 pinctrl-0 = <&pinctrl_sgpm2_default>; 495 status = "disabled"; 496 }; 497 498 gpio1: gpio@1e780800 { 499 #gpio-cells = <2>; 500 gpio-controller; 501 compatible = "aspeed,ast2600-gpio"; 502 reg = <0x1e780800 0x800>; 503 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 504 gpio-ranges = <&pinctrl 0 208 36>; 505 ngpios = <36>; 506 clocks = <&syscon ASPEED_CLK_APB1>; 507 interrupt-controller; 508 #interrupt-cells = <2>; 509 }; 510 511 rtc: rtc@1e781000 { 512 compatible = "aspeed,ast2600-rtc"; 513 reg = <0x1e781000 0x18>; 514 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 515 status = "disabled"; 516 }; 517 518 timer: timer@1e782000 { 519 compatible = "aspeed,ast2600-timer"; 520 reg = <0x1e782000 0x90>; 521 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 522 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 523 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 524 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 525 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 526 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 527 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 528 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 529 clocks = <&syscon ASPEED_CLK_APB1>; 530 clock-names = "PCLK"; 531 status = "disabled"; 532 }; 533 534 uart1: serial@1e783000 { 535 compatible = "ns16550a"; 536 reg = <0x1e783000 0x20>; 537 reg-shift = <2>; 538 reg-io-width = <4>; 539 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 540 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 541 resets = <&lpc_reset 4>; 542 no-loopback-test; 543 pinctrl-names = "default"; 544 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>; 545 status = "disabled"; 546 }; 547 548 uart5: serial@1e784000 { 549 compatible = "ns16550a"; 550 reg = <0x1e784000 0x1000>; 551 reg-shift = <2>; 552 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 553 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 554 no-loopback-test; 555 }; 556 557 wdt1: watchdog@1e785000 { 558 compatible = "aspeed,ast2600-wdt"; 559 reg = <0x1e785000 0x40>; 560 }; 561 562 wdt2: watchdog@1e785040 { 563 compatible = "aspeed,ast2600-wdt"; 564 reg = <0x1e785040 0x40>; 565 status = "disabled"; 566 }; 567 568 wdt3: watchdog@1e785080 { 569 compatible = "aspeed,ast2600-wdt"; 570 reg = <0x1e785080 0x40>; 571 status = "disabled"; 572 }; 573 574 wdt4: watchdog@1e7850c0 { 575 compatible = "aspeed,ast2600-wdt"; 576 reg = <0x1e7850C0 0x40>; 577 status = "disabled"; 578 }; 579 580 peci0: peci-controller@1e78b000 { 581 compatible = "aspeed,ast2600-peci"; 582 reg = <0x1e78b000 0x100>; 583 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 584 clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; 585 resets = <&syscon ASPEED_RESET_PECI>; 586 cmd-timeout-ms = <1000>; 587 clock-frequency = <1000000>; 588 status = "disabled"; 589 }; 590 591 lpc: lpc@1e789000 { 592 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"; 593 reg = <0x1e789000 0x1000>; 594 reg-io-width = <4>; 595 596 #address-cells = <1>; 597 #size-cells = <1>; 598 ranges = <0x0 0x1e789000 0x1000>; 599 600 kcs1: kcs@24 { 601 compatible = "aspeed,ast2500-kcs-bmc-v2"; 602 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; 603 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 604 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 605 kcs_chan = <1>; 606 status = "disabled"; 607 }; 608 609 kcs2: kcs@28 { 610 compatible = "aspeed,ast2500-kcs-bmc-v2"; 611 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; 612 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 613 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 614 status = "disabled"; 615 }; 616 617 kcs3: kcs@2c { 618 compatible = "aspeed,ast2500-kcs-bmc-v2"; 619 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; 620 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 621 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 622 status = "disabled"; 623 }; 624 625 kcs4: kcs@114 { 626 compatible = "aspeed,ast2500-kcs-bmc-v2"; 627 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; 628 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 629 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 630 status = "disabled"; 631 }; 632 633 lpc_ctrl: lpc-ctrl@80 { 634 compatible = "aspeed,ast2600-lpc-ctrl"; 635 reg = <0x80 0x80>; 636 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 637 status = "disabled"; 638 }; 639 640 lpc_snoop: lpc-snoop@80 { 641 compatible = "aspeed,ast2600-lpc-snoop"; 642 reg = <0x80 0x80>; 643 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 644 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 645 status = "disabled"; 646 }; 647 648 lhc: lhc@a0 { 649 compatible = "aspeed,ast2600-lhc"; 650 reg = <0xa0 0x24 0xc8 0x8>; 651 }; 652 653 lpc_reset: reset-controller@98 { 654 compatible = "aspeed,ast2600-lpc-reset"; 655 reg = <0x98 0x4>; 656 #reset-cells = <1>; 657 }; 658 659 uart_routing: uart-routing@98 { 660 compatible = "aspeed,ast2600-uart-routing"; 661 reg = <0x98 0x8>; 662 status = "disabled"; 663 }; 664 665 ibt: ibt@140 { 666 compatible = "aspeed,ast2600-ibt-bmc"; 667 reg = <0x140 0x18>; 668 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 669 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 670 status = "disabled"; 671 }; 672 }; 673 674 sdc: sdc@1e740000 { 675 compatible = "aspeed,ast2600-sd-controller"; 676 reg = <0x1e740000 0x100>; 677 #address-cells = <1>; 678 #size-cells = <1>; 679 ranges = <0 0x1e740000 0x10000>; 680 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 681 status = "disabled"; 682 683 sdhci0: sdhci@1e740100 { 684 compatible = "aspeed,ast2600-sdhci", "sdhci"; 685 reg = <0x100 0x100>; 686 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 687 sdhci,auto-cmd12; 688 clocks = <&syscon ASPEED_CLK_SDIO>; 689 status = "disabled"; 690 }; 691 692 sdhci1: sdhci@1e740200 { 693 compatible = "aspeed,ast2600-sdhci", "sdhci"; 694 reg = <0x200 0x100>; 695 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 696 sdhci,auto-cmd12; 697 clocks = <&syscon ASPEED_CLK_SDIO>; 698 status = "disabled"; 699 }; 700 }; 701 702 emmc_controller: sdc@1e750000 { 703 compatible = "aspeed,ast2600-sd-controller"; 704 reg = <0x1e750000 0x100>; 705 #address-cells = <1>; 706 #size-cells = <1>; 707 ranges = <0 0x1e750000 0x10000>; 708 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>; 709 status = "disabled"; 710 711 emmc: sdhci@1e750100 { 712 compatible = "aspeed,ast2600-sdhci"; 713 reg = <0x100 0x100>; 714 sdhci,auto-cmd12; 715 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 716 clocks = <&syscon ASPEED_CLK_EMMC>; 717 pinctrl-names = "default"; 718 pinctrl-0 = <&pinctrl_emmc_default>; 719 }; 720 }; 721 722 vuart1: serial@1e787000 { 723 compatible = "aspeed,ast2500-vuart"; 724 reg = <0x1e787000 0x40>; 725 reg-shift = <2>; 726 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 727 clocks = <&syscon ASPEED_CLK_APB1>; 728 no-loopback-test; 729 status = "disabled"; 730 }; 731 732 vuart3: serial@1e787800 { 733 compatible = "aspeed,ast2500-vuart"; 734 reg = <0x1e787800 0x40>; 735 reg-shift = <2>; 736 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 737 clocks = <&syscon ASPEED_CLK_APB2>; 738 no-loopback-test; 739 status = "disabled"; 740 }; 741 742 vuart2: serial@1e788000 { 743 compatible = "aspeed,ast2500-vuart"; 744 reg = <0x1e788000 0x40>; 745 reg-shift = <2>; 746 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 747 clocks = <&syscon ASPEED_CLK_APB1>; 748 no-loopback-test; 749 status = "disabled"; 750 }; 751 752 vuart4: serial@1e788800 { 753 compatible = "aspeed,ast2500-vuart"; 754 reg = <0x1e788800 0x40>; 755 reg-shift = <2>; 756 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 757 clocks = <&syscon ASPEED_CLK_APB2>; 758 no-loopback-test; 759 status = "disabled"; 760 }; 761 762 uart2: serial@1e78d000 { 763 compatible = "ns16550a"; 764 reg = <0x1e78d000 0x20>; 765 reg-shift = <2>; 766 reg-io-width = <4>; 767 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 768 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 769 resets = <&lpc_reset 5>; 770 no-loopback-test; 771 pinctrl-names = "default"; 772 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 773 status = "disabled"; 774 }; 775 776 uart3: serial@1e78e000 { 777 compatible = "ns16550a"; 778 reg = <0x1e78e000 0x20>; 779 reg-shift = <2>; 780 reg-io-width = <4>; 781 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 782 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 783 resets = <&lpc_reset 6>; 784 no-loopback-test; 785 pinctrl-names = "default"; 786 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 787 status = "disabled"; 788 }; 789 790 uart4: serial@1e78f000 { 791 compatible = "ns16550a"; 792 reg = <0x1e78f000 0x20>; 793 reg-shift = <2>; 794 reg-io-width = <4>; 795 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 796 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 797 resets = <&lpc_reset 7>; 798 no-loopback-test; 799 pinctrl-names = "default"; 800 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>; 801 status = "disabled"; 802 }; 803 804 uart6: serial@1e790000 { 805 compatible = "ns16550a"; 806 reg = <0x1e790000 0x20>; 807 reg-shift = <2>; 808 reg-io-width = <4>; 809 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 810 clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>; 811 no-loopback-test; 812 pinctrl-names = "default"; 813 pinctrl-0 = <&pinctrl_uart6_default>; 814 815 status = "disabled"; 816 }; 817 818 uart7: serial@1e790100 { 819 compatible = "ns16550a"; 820 reg = <0x1e790100 0x20>; 821 reg-shift = <2>; 822 reg-io-width = <4>; 823 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 824 clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>; 825 no-loopback-test; 826 pinctrl-names = "default"; 827 pinctrl-0 = <&pinctrl_uart7_default>; 828 829 status = "disabled"; 830 }; 831 832 uart8: serial@1e790200 { 833 compatible = "ns16550a"; 834 reg = <0x1e790200 0x20>; 835 reg-shift = <2>; 836 reg-io-width = <4>; 837 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 838 clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>; 839 no-loopback-test; 840 pinctrl-names = "default"; 841 pinctrl-0 = <&pinctrl_uart8_default>; 842 843 status = "disabled"; 844 }; 845 846 uart9: serial@1e790300 { 847 compatible = "ns16550a"; 848 reg = <0x1e790300 0x20>; 849 reg-shift = <2>; 850 reg-io-width = <4>; 851 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 852 clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>; 853 no-loopback-test; 854 pinctrl-names = "default"; 855 pinctrl-0 = <&pinctrl_uart9_default>; 856 857 status = "disabled"; 858 }; 859 860 i2c: bus@1e78a000 { 861 compatible = "simple-bus"; 862 #address-cells = <1>; 863 #size-cells = <1>; 864 ranges = <0 0x1e78a000 0x1000>; 865 }; 866 867 fsim0: fsi@1e79b000 { 868 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 869 reg = <0x1e79b000 0x94>; 870 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 871 pinctrl-names = "default"; 872 pinctrl-0 = <&pinctrl_fsi1_default>; 873 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 874 status = "disabled"; 875 }; 876 877 fsim1: fsi@1e79b100 { 878 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 879 reg = <0x1e79b100 0x94>; 880 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 881 pinctrl-names = "default"; 882 pinctrl-0 = <&pinctrl_fsi2_default>; 883 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 884 status = "disabled"; 885 }; 886 887 udma: dma-controller@1e79e000 { 888 compatible = "aspeed,ast2600-udma"; 889 reg = <0x1e79e000 0x1000>; 890 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 891 dma-channels = <28>; 892 #dma-cells = <1>; 893 status = "disabled"; 894 }; 895 }; 896 }; 897}; 898 899#include "aspeed-g6-pinctrl.dtsi" 900 901&i2c { 902 i2c0: i2c-bus@80 { 903 #address-cells = <1>; 904 #size-cells = <0>; 905 #interrupt-cells = <1>; 906 reg = <0x80 0x80>; 907 compatible = "aspeed,ast2600-i2c-bus"; 908 clocks = <&syscon ASPEED_CLK_APB2>; 909 resets = <&syscon ASPEED_RESET_I2C>; 910 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 911 bus-frequency = <100000>; 912 pinctrl-names = "default"; 913 pinctrl-0 = <&pinctrl_i2c1_default>; 914 status = "disabled"; 915 }; 916 917 i2c1: i2c-bus@100 { 918 #address-cells = <1>; 919 #size-cells = <0>; 920 #interrupt-cells = <1>; 921 reg = <0x100 0x80>; 922 compatible = "aspeed,ast2600-i2c-bus"; 923 clocks = <&syscon ASPEED_CLK_APB2>; 924 resets = <&syscon ASPEED_RESET_I2C>; 925 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 926 bus-frequency = <100000>; 927 pinctrl-names = "default"; 928 pinctrl-0 = <&pinctrl_i2c2_default>; 929 status = "disabled"; 930 }; 931 932 i2c2: i2c-bus@180 { 933 #address-cells = <1>; 934 #size-cells = <0>; 935 #interrupt-cells = <1>; 936 reg = <0x180 0x80>; 937 compatible = "aspeed,ast2600-i2c-bus"; 938 clocks = <&syscon ASPEED_CLK_APB2>; 939 resets = <&syscon ASPEED_RESET_I2C>; 940 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 941 bus-frequency = <100000>; 942 pinctrl-names = "default"; 943 pinctrl-0 = <&pinctrl_i2c3_default>; 944 status = "disabled"; 945 }; 946 947 i2c3: i2c-bus@200 { 948 #address-cells = <1>; 949 #size-cells = <0>; 950 #interrupt-cells = <1>; 951 reg = <0x200 0x80>; 952 compatible = "aspeed,ast2600-i2c-bus"; 953 clocks = <&syscon ASPEED_CLK_APB2>; 954 resets = <&syscon ASPEED_RESET_I2C>; 955 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 956 bus-frequency = <100000>; 957 pinctrl-names = "default"; 958 pinctrl-0 = <&pinctrl_i2c4_default>; 959 status = "disabled"; 960 }; 961 962 i2c4: i2c-bus@280 { 963 #address-cells = <1>; 964 #size-cells = <0>; 965 #interrupt-cells = <1>; 966 reg = <0x280 0x80>; 967 compatible = "aspeed,ast2600-i2c-bus"; 968 clocks = <&syscon ASPEED_CLK_APB2>; 969 resets = <&syscon ASPEED_RESET_I2C>; 970 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 971 bus-frequency = <100000>; 972 pinctrl-names = "default"; 973 pinctrl-0 = <&pinctrl_i2c5_default>; 974 status = "disabled"; 975 }; 976 977 i2c5: i2c-bus@300 { 978 #address-cells = <1>; 979 #size-cells = <0>; 980 #interrupt-cells = <1>; 981 reg = <0x300 0x80>; 982 compatible = "aspeed,ast2600-i2c-bus"; 983 clocks = <&syscon ASPEED_CLK_APB2>; 984 resets = <&syscon ASPEED_RESET_I2C>; 985 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 986 bus-frequency = <100000>; 987 pinctrl-names = "default"; 988 pinctrl-0 = <&pinctrl_i2c6_default>; 989 status = "disabled"; 990 }; 991 992 i2c6: i2c-bus@380 { 993 #address-cells = <1>; 994 #size-cells = <0>; 995 #interrupt-cells = <1>; 996 reg = <0x380 0x80>; 997 compatible = "aspeed,ast2600-i2c-bus"; 998 clocks = <&syscon ASPEED_CLK_APB2>; 999 resets = <&syscon ASPEED_RESET_I2C>; 1000 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1001 bus-frequency = <100000>; 1002 pinctrl-names = "default"; 1003 pinctrl-0 = <&pinctrl_i2c7_default>; 1004 status = "disabled"; 1005 }; 1006 1007 i2c7: i2c-bus@400 { 1008 #address-cells = <1>; 1009 #size-cells = <0>; 1010 #interrupt-cells = <1>; 1011 reg = <0x400 0x80>; 1012 compatible = "aspeed,ast2600-i2c-bus"; 1013 clocks = <&syscon ASPEED_CLK_APB2>; 1014 resets = <&syscon ASPEED_RESET_I2C>; 1015 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 1016 bus-frequency = <100000>; 1017 pinctrl-names = "default"; 1018 pinctrl-0 = <&pinctrl_i2c8_default>; 1019 status = "disabled"; 1020 }; 1021 1022 i2c8: i2c-bus@480 { 1023 #address-cells = <1>; 1024 #size-cells = <0>; 1025 #interrupt-cells = <1>; 1026 reg = <0x480 0x80>; 1027 compatible = "aspeed,ast2600-i2c-bus"; 1028 clocks = <&syscon ASPEED_CLK_APB2>; 1029 resets = <&syscon ASPEED_RESET_I2C>; 1030 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1031 bus-frequency = <100000>; 1032 pinctrl-names = "default"; 1033 pinctrl-0 = <&pinctrl_i2c9_default>; 1034 status = "disabled"; 1035 }; 1036 1037 i2c9: i2c-bus@500 { 1038 #address-cells = <1>; 1039 #size-cells = <0>; 1040 #interrupt-cells = <1>; 1041 reg = <0x500 0x80>; 1042 compatible = "aspeed,ast2600-i2c-bus"; 1043 clocks = <&syscon ASPEED_CLK_APB2>; 1044 resets = <&syscon ASPEED_RESET_I2C>; 1045 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 1046 bus-frequency = <100000>; 1047 pinctrl-names = "default"; 1048 pinctrl-0 = <&pinctrl_i2c10_default>; 1049 status = "disabled"; 1050 }; 1051 1052 i2c10: i2c-bus@580 { 1053 #address-cells = <1>; 1054 #size-cells = <0>; 1055 #interrupt-cells = <1>; 1056 reg = <0x580 0x80>; 1057 compatible = "aspeed,ast2600-i2c-bus"; 1058 clocks = <&syscon ASPEED_CLK_APB2>; 1059 resets = <&syscon ASPEED_RESET_I2C>; 1060 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 1061 bus-frequency = <100000>; 1062 pinctrl-names = "default"; 1063 pinctrl-0 = <&pinctrl_i2c11_default>; 1064 status = "disabled"; 1065 }; 1066 1067 i2c11: i2c-bus@600 { 1068 #address-cells = <1>; 1069 #size-cells = <0>; 1070 #interrupt-cells = <1>; 1071 reg = <0x600 0x80>; 1072 compatible = "aspeed,ast2600-i2c-bus"; 1073 clocks = <&syscon ASPEED_CLK_APB2>; 1074 resets = <&syscon ASPEED_RESET_I2C>; 1075 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 1076 bus-frequency = <100000>; 1077 pinctrl-names = "default"; 1078 pinctrl-0 = <&pinctrl_i2c12_default>; 1079 status = "disabled"; 1080 }; 1081 1082 i2c12: i2c-bus@680 { 1083 #address-cells = <1>; 1084 #size-cells = <0>; 1085 #interrupt-cells = <1>; 1086 reg = <0x680 0x80>; 1087 compatible = "aspeed,ast2600-i2c-bus"; 1088 clocks = <&syscon ASPEED_CLK_APB2>; 1089 resets = <&syscon ASPEED_RESET_I2C>; 1090 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 1091 bus-frequency = <100000>; 1092 pinctrl-names = "default"; 1093 pinctrl-0 = <&pinctrl_i2c13_default>; 1094 status = "disabled"; 1095 }; 1096 1097 i2c13: i2c-bus@700 { 1098 #address-cells = <1>; 1099 #size-cells = <0>; 1100 #interrupt-cells = <1>; 1101 reg = <0x700 0x80>; 1102 compatible = "aspeed,ast2600-i2c-bus"; 1103 clocks = <&syscon ASPEED_CLK_APB2>; 1104 resets = <&syscon ASPEED_RESET_I2C>; 1105 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 1106 bus-frequency = <100000>; 1107 pinctrl-names = "default"; 1108 pinctrl-0 = <&pinctrl_i2c14_default>; 1109 status = "disabled"; 1110 }; 1111 1112 i2c14: i2c-bus@780 { 1113 #address-cells = <1>; 1114 #size-cells = <0>; 1115 #interrupt-cells = <1>; 1116 reg = <0x780 0x80>; 1117 compatible = "aspeed,ast2600-i2c-bus"; 1118 clocks = <&syscon ASPEED_CLK_APB2>; 1119 resets = <&syscon ASPEED_RESET_I2C>; 1120 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; 1121 bus-frequency = <100000>; 1122 pinctrl-names = "default"; 1123 pinctrl-0 = <&pinctrl_i2c15_default>; 1124 status = "disabled"; 1125 }; 1126 1127 i2c15: i2c-bus@800 { 1128 #address-cells = <1>; 1129 #size-cells = <0>; 1130 #interrupt-cells = <1>; 1131 reg = <0x800 0x80>; 1132 compatible = "aspeed,ast2600-i2c-bus"; 1133 clocks = <&syscon ASPEED_CLK_APB2>; 1134 resets = <&syscon ASPEED_RESET_I2C>; 1135 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 1136 bus-frequency = <100000>; 1137 pinctrl-names = "default"; 1138 pinctrl-0 = <&pinctrl_i2c16_default>; 1139 status = "disabled"; 1140 }; 1141}; 1142