1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ 2724ba675SRob Herring// Copyright (C) 2021 YADRO 3724ba675SRob Herring/dts-v1/; 4724ba675SRob Herring 5724ba675SRob Herring#include "aspeed-bmc-vegman.dtsi" 6724ba675SRob Herring 7724ba675SRob Herring/ { 8724ba675SRob Herring model = "YADRO VEGMAN Rx20 BMC"; 9724ba675SRob Herring compatible = "yadro,vegman-rx20-bmc", "aspeed,ast2500"; 10724ba675SRob Herring 11724ba675SRob Herring leds { 12724ba675SRob Herring compatible = "gpio-leds"; 13724ba675SRob Herring 14724ba675SRob Herring temp_alarm { 15724ba675SRob Herring label = "temp:red:status"; 16724ba675SRob Herring default-state = "off"; 17724ba675SRob Herring gpios = <&gpio ASPEED_GPIO(E, 4) GPIO_ACTIVE_LOW>; 18724ba675SRob Herring }; 19724ba675SRob Herring 20724ba675SRob Herring temp_ok { 21724ba675SRob Herring label = "temp:green:status"; 22724ba675SRob Herring default-state = "off"; 23724ba675SRob Herring gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>; 24724ba675SRob Herring }; 25724ba675SRob Herring 26724ba675SRob Herring psu_fault { 27724ba675SRob Herring label = "psu:red:status"; 28724ba675SRob Herring default-state = "off"; 29724ba675SRob Herring gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_LOW>; 30724ba675SRob Herring }; 31724ba675SRob Herring 32724ba675SRob Herring psu_ok { 33724ba675SRob Herring label = "psu:green:status"; 34724ba675SRob Herring default-state = "off"; 35724ba675SRob Herring gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>; 36724ba675SRob Herring }; 37724ba675SRob Herring }; 38724ba675SRob Herring}; 39724ba675SRob Herring 40724ba675SRob Herring&gpio { 41724ba675SRob Herring status = "okay"; 42724ba675SRob Herring gpio-line-names = 43724ba675SRob Herring /*A0-A7*/ "CASE_OPEN_DNP","CASE_OPEN_FAULT_RST_DNP","BEZEL_ON_PWR_P3V3","PWM_PWRGD_EXP_EN","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","", 44724ba675SRob Herring /*B0-B7*/ "","","","","","","","", 45724ba675SRob Herring /*C0-C7*/ "","","","","","","","", 46724ba675SRob Herring /*D0-D7*/ "","","","","","","","", 47724ba675SRob Herring /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","LED_TEMP_STATUS_R","LED_TEMP_STATUS_G","LED_PWR_STATUS_R","LED_PWR_STATUS_G", 48724ba675SRob Herring /*F0-F7*/ "NMI_OUT","CPU1_DISABLE_COD","","","SKT0_FAULT_LED_DNP","SKT1_FAULT_LED_DNP","RST_RGMII_PHYRST_DNP","", 49724ba675SRob Herring /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","SPI_BMC_BOOT_HD","IRQ_NMI_EVENT","SPI_BMC_BOOT_WP","SPI_BMC_BOOT_WP1","", 50724ba675SRob Herring /*H0-H7*/ "PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","PWRGD_P3V3_RISER3","","MIO_BIOS_SEL","_SPI_FLASH_HOLD","_SPI_FLASH_WP","FM_240VA_STATUS", 51724ba675SRob Herring /*I0-I7*/ "","","","","","","","", 52724ba675SRob Herring /*J0-J7*/ "","","","","","","","", 53724ba675SRob Herring /*K0-K7*/ "","","","","","","","", 54724ba675SRob Herring /*L0-L7*/ "","","","","","","","", 55724ba675SRob Herring /*M0-M7*/ "SEL_FLASH_SOFT","STATUS_SEL_BMC","","","BMC_WDT_P","ID_BUTTON","PS_PWROK","", 56724ba675SRob Herring /*N0-N7*/ "","","","","","","","", 57724ba675SRob Herring /*O0-O7*/ "","","","","","","","", 58724ba675SRob Herring /*P0-P7*/ "","","","","","","SPI_BIOS_ACTIVE_FLASH_SEL","STATUS_SEL_BIOS", 59724ba675SRob Herring /*Q0-Q7*/ "","","","","","","","", 60724ba675SRob Herring /*R0-R7*/ "_SPI_BMC_BOOT_CS1","","","","","","","", 61724ba675SRob Herring /*S0-S7*/ "_SPI2_BMC_CS1","RSR_A_SMBEXP_RST_INT","RSR_B_SMBEXP_RST_INT","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","", 62724ba675SRob Herring /*T0-T7*/ "","","","","","","","", 63724ba675SRob Herring /*U0-U7*/ "","","","","","","","", 64724ba675SRob Herring /*V0-V7*/ "","","","","","","","", 65724ba675SRob Herring /*W0-W7*/ "","","","","","","","", 66724ba675SRob Herring /*X0-X7*/ "","","","","","","","", 67724ba675SRob Herring /*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","", 68724ba675SRob Herring /*Z0-Z7*/ "FM_BMC_PWR_BTN","SIO_POWER_GOOD","FM_BMC_PWRBTN_OUT","FM_BMC_PCH_SCI_LPC","","","","", 69724ba675SRob Herring /*AA0-AA7*/ "CPU_CLK_MUX_SEL","IRQ_SML1_PMBUS_ALERT","FM_PVCCIN_CPU0_PWR_IN_ALERT","FM_PVCCIN_CPU1_PWR_IN_ALERT","BMC_SYS_PWR_FAULT","BMC_SYS_PWR_OK","SMI","POST_COMPLETE", 70724ba675SRob Herring /*AB0-AB7*/ "FM_CPU_BMCINIT","NMI_BUTTON","BMC_WDT_RST1","BMC_WDT_RST2","","","","", 71724ba675SRob Herring /*AC0-AC7*/ "","","","","","","",""; 72724ba675SRob Herring}; 73724ba675SRob Herring 74724ba675SRob Herring&sgpio { 75724ba675SRob Herring ngpios = <80>; 76724ba675SRob Herring bus-frequency = <2000000>; 77724ba675SRob Herring status = "okay"; 78724ba675SRob Herring /* SGPIO lines. even: input, odd: output */ 79724ba675SRob Herring gpio-line-names = 80724ba675SRob Herring /*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","", 81724ba675SRob Herring /*B0-B7*/ "CPU1_MISMATCH","","CPU1_MEM_THERM_EVENT","","CPU2_PRESENCE","","CPU2_THERMTRIP","","CPU2_VRHOT","","CPU2_FIVR_FAULT","","CPU2_MEM_ABCD_VRHOT","","CPU2_MEM_EFGH_VRHOT","", 82724ba675SRob Herring /*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","", 83724ba675SRob Herring /*D0-D7*/ "","","","","","","","","","","","","","","","", 84724ba675SRob Herring /*E0-E7*/ "","","","","","","","","","","","","","","","", 85724ba675SRob Herring /*F0-F7*/ "SGPIO_PLD_MINOR_REV_BIT0","","SGPIO_PLD_MINOR_REV_BIT1","","SGPIO_PLD_MINOR_REV_BIT2","","SGPIO_PLD_MINOR_REV_BIT3","","SGPIO_PLD_MAJOR_REV_BIT0","","SGPIO_PLD_MAJOR_REV_BIT1","","SGPIO_PLD_MAJOR_REV_BIT2","","SGPIO_PLD_MAJOR_REV_BIT3","", 86724ba675SRob Herring /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","", 87724ba675SRob Herring /*H0-H7*/ "","","","","","","","","","","","","","","","", 88724ba675SRob Herring /*I0-I7*/ "","","","","","","","","","","","","","","","", 89724ba675SRob Herring /*J0-J7*/ "","","","","","","","","","","","","","","",""; 90724ba675SRob Herring}; 91724ba675SRob Herring 92724ba675SRob Herring&i2c11 { 93724ba675SRob Herring /* SMB_BMC_MGMT_LVC3 */ 94724ba675SRob Herring gpio@21 { 95724ba675SRob Herring compatible = "nxp,pcal9535"; 96724ba675SRob Herring reg = <0x21>; 97724ba675SRob Herring gpio-controller; 98724ba675SRob Herring #gpio-cells = <2>; 99724ba675SRob Herring gpio-line-names = 100724ba675SRob Herring /*IO0.0-0.7*/ "ETH3_CLK_REQ", "ETH2_CLK_REQ", "RSR_A_PCIE_X16_2_PRSNT", "RSR_B_PCIE_X16_2_PRSNT", "", "RSR_B_PCIE_X8_3_PRSNT", "RSR_B_PCIE_X8_4_PRSNT", "RSR_B_PCIE_X16_PRSNT_N", 101724ba675SRob Herring /*IO1.0-1.7*/ "RSR_B_PCIE_X8_2_PRSNT", "RSR_B_PCIE_X8_1_PRSNT", "NIC_1_PE_BUF_PRSNT", "RSR_A_PCIE_X16_PRSNT", "RSR_A_PCIE_X8_3_PRSNT", "RSR_A_PCIE_X8_2_PRSNT", "RSR_A_PCIE_X8_1_PRSNT_N", ""; 102724ba675SRob Herring }; 103724ba675SRob Herring gpio@23 { 104724ba675SRob Herring compatible = "nxp,pcal9535"; 105724ba675SRob Herring reg = <0x23>; 106724ba675SRob Herring gpio-controller; 107724ba675SRob Herring #gpio-cells = <2>; 108724ba675SRob Herring gpio-line-names = 109724ba675SRob Herring /*IO0.0-0.7*/ "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "", "", "", 110724ba675SRob Herring /*IO1.0-1.7*/ "", "", "", "", "", "", "", ""; 111724ba675SRob Herring }; 112724ba675SRob Herring gpio@27 { 113724ba675SRob Herring compatible = "nxp,pca9698"; 114724ba675SRob Herring reg = <0x27>; 115724ba675SRob Herring gpio-controller; 116724ba675SRob Herring #gpio-cells = <2>; 117724ba675SRob Herring gpio-line-names = 118724ba675SRob Herring /*IO0.0-0.7*/ "PWRGD_PS_PWROK", "PWRGD_DSW_PWROK", "PWRGD_P5V_AUX", "PWRGD_P3V3_AUX", "PWRGD_P5V", "PWRGD_P3V3", "PWRGD_P1V8_PCH_AUX", "PWRGD_PCH_PVNN_AUX", 119724ba675SRob Herring /*IO1.0-1.7*/ "PWRGD_P1V05_PCH_AUX", "PWRGD_PCH_AUX_VRS", "PWRGD_PVCCIN_CPU0", "PWRGD_PVCCSA_CPU0", "PWRGD_PVCCIO_CPU0", "PWRGD_PVMCP_CPU0", "PWRGD_P1V0_CPU0", "PWRGD_PVDDQ_ABC_CPU0", 120724ba675SRob Herring /*IO2.0-2.7*/ "PWRGD_PVPP_ABC_CPU0", "PWRGD_PVTT_ABC_CPU0", "PWRGD_PVDDQ_DEF_CPU0", "PWRGD_PVPP_DEF_CPU0", "PWRGD_PVTT_DEF_CPU0", "PWRGD_PVCCIN_CPU1", "PWRGD_PVCCSA_CPU1", "PWRGD_PVCCIO_CPU1", 121724ba675SRob Herring /*IO3.0-3.7*/ "PWRGD_PVMCP_CPU1", "PWRGD_P1V0_CPU1", "PWRGD_PVDDQ_GHJ_CPU1", "PWRGD_PVPP_GHJ_CPU1", "PWRGD_PVTT_GHJ_CPU1", "PWRGD_PVDDQ_KLM_CPU1", "PWRGD_PVPP_KLM_CPU1", "PWRGD_PVTT_KLM_CPU1", 122724ba675SRob Herring /*IO4.0-4.7*/ "PCH_PWR_RESET_N", "FM_BOARD_SKU_ID0", "FM_BOARD_SKU_ID1", "FM_BOARD_SKU_ID2", "FM_BOARD_SKU_ID3", "FM_BOARD_SKU_ID4", "FM_BOARD_REV_ID0", "FM_BOARD_REV_ID1"; 123724ba675SRob Herring }; 124724ba675SRob Herring gpio@39 { 125724ba675SRob Herring compatible = "nxp,pca9554"; 126724ba675SRob Herring reg = <0x39>; 127724ba675SRob Herring gpio-controller; 128724ba675SRob Herring #gpio-cells = <2>; 129724ba675SRob Herring gpio-line-names = 130724ba675SRob Herring /*IO0.0-0.7*/ "FAN_FAULT_0", "FAN_FAULT_1", "FAN_FAULT_2", "FAN_FAULT_3", "FAN_FAULT_4", "FAN_FAULT_5", "FAN_FAULT_6", ""; 131724ba675SRob Herring }; 132724ba675SRob Herring}; 133724ba675SRob Herring 134724ba675SRob Herring&i2c13 { 135724ba675SRob Herring /* SMB_PCIE2_STBY_LVC3 */ 136*4b46d86cSGeert Uytterhoeven i2c-mux@70 { 137724ba675SRob Herring compatible = "nxp,pca9548"; 138724ba675SRob Herring reg = <0x70>; 139724ba675SRob Herring #address-cells = <1>; 140724ba675SRob Herring #size-cells = <0>; 141724ba675SRob Herring i2c-mux-idle-disconnect; 142724ba675SRob Herring 143724ba675SRob Herring i2c@2 { 144724ba675SRob Herring #address-cells = <1>; 145724ba675SRob Herring #size-cells = <0>; 146724ba675SRob Herring reg = <2>; 147*4b46d86cSGeert Uytterhoeven i2c-mux@72 { 148724ba675SRob Herring compatible = "nxp,pca9548"; 149724ba675SRob Herring reg = <0x72>; 150724ba675SRob Herring #address-cells = <1>; 151724ba675SRob Herring #size-cells = <0>; 152724ba675SRob Herring 153724ba675SRob Herring i2c@7 { 154724ba675SRob Herring #address-cells = <1>; 155724ba675SRob Herring #size-cells = <0>; 156724ba675SRob Herring reg = <7>; 157724ba675SRob Herring at24@50 { 158724ba675SRob Herring compatible = "atmel,24c64"; 159724ba675SRob Herring reg = <0x50>; 160724ba675SRob Herring pagesize = <32>; 161724ba675SRob Herring size = <8192>; 162724ba675SRob Herring address-width = <16>; 163724ba675SRob Herring }; 164724ba675SRob Herring }; 165724ba675SRob Herring }; 166724ba675SRob Herring }; 167724ba675SRob Herring }; 168*4b46d86cSGeert Uytterhoeven i2c-mux@71 { 169724ba675SRob Herring compatible = "nxp,pca9543"; 170724ba675SRob Herring reg = <0x71>; 171724ba675SRob Herring #address-cells = <1>; 172724ba675SRob Herring #size-cells = <0>; 173724ba675SRob Herring i2c-mux-idle-disconnect; 174724ba675SRob Herring }; 175724ba675SRob Herring}; 176724ba675SRob Herring 177724ba675SRob Herring&i2c2 { 178724ba675SRob Herring /* SMB_PCIE_STBY_LVC3 */ 179*4b46d86cSGeert Uytterhoeven i2c-mux@71 { 180724ba675SRob Herring compatible = "nxp,pca9548"; 181724ba675SRob Herring reg = <0x71>; 182724ba675SRob Herring #address-cells = <1>; 183724ba675SRob Herring #size-cells = <0>; 184724ba675SRob Herring i2c-mux-idle-disconnect; 185724ba675SRob Herring 186724ba675SRob Herring i2c@0 { 187724ba675SRob Herring #address-cells = <1>; 188724ba675SRob Herring #size-cells = <0>; 189724ba675SRob Herring reg = <0>; 190*4b46d86cSGeert Uytterhoeven i2c-mux@72 { 191724ba675SRob Herring compatible = "nxp,pca9548"; 192724ba675SRob Herring reg = <0x72>; 193724ba675SRob Herring #address-cells = <1>; 194724ba675SRob Herring #size-cells = <0>; 195724ba675SRob Herring i2c@7 { 196724ba675SRob Herring #address-cells = <1>; 197724ba675SRob Herring #size-cells = <0>; 198724ba675SRob Herring reg = <7>; 199724ba675SRob Herring at24@50 { 200724ba675SRob Herring compatible = "atmel,24c64"; 201724ba675SRob Herring reg = <0x50>; 202724ba675SRob Herring pagesize = <32>; 203724ba675SRob Herring size = <8192>; 204724ba675SRob Herring address-width = <16>; 205724ba675SRob Herring }; 206724ba675SRob Herring }; 207724ba675SRob Herring }; 208724ba675SRob Herring at24@50 { 209724ba675SRob Herring compatible = "atmel,24c64"; 210724ba675SRob Herring reg = <0x50>; 211724ba675SRob Herring pagesize = <32>; 212724ba675SRob Herring size = <8192>; 213724ba675SRob Herring address-width = <16>; 214724ba675SRob Herring }; 215724ba675SRob Herring }; 216724ba675SRob Herring }; 217724ba675SRob Herring}; 218724ba675SRob Herring 219724ba675SRob Herring&pwm_tacho { 220724ba675SRob Herring status = "okay"; 221724ba675SRob Herring pinctrl-names = "default"; 222724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 223724ba675SRob Herring &pinctrl_pwm2_default &pinctrl_pwm3_default 224724ba675SRob Herring &pinctrl_pwm4_default &pinctrl_pwm5_default 225724ba675SRob Herring &pinctrl_pwm6_default>; 226724ba675SRob Herring 227724ba675SRob Herring fan@0 { 228724ba675SRob Herring reg = <0x00>; 229724ba675SRob Herring aspeed,fan-tach-ch = /bits/ 8 <0x00 0x07>; 230724ba675SRob Herring }; 231724ba675SRob Herring fan@1 { 232724ba675SRob Herring reg = <0x01>; 233724ba675SRob Herring aspeed,fan-tach-ch = /bits/ 8 <0x01 0x08>; 234724ba675SRob Herring }; 235724ba675SRob Herring fan@2 { 236724ba675SRob Herring reg = <0x02>; 237724ba675SRob Herring aspeed,fan-tach-ch = /bits/ 8 <0x02 0x09>; 238724ba675SRob Herring }; 239724ba675SRob Herring fan@3 { 240724ba675SRob Herring reg = <0x03>; 241724ba675SRob Herring aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0A>; 242724ba675SRob Herring }; 243724ba675SRob Herring fan@4 { 244724ba675SRob Herring reg = <0x04>; 245724ba675SRob Herring aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0B>; 246724ba675SRob Herring }; 247724ba675SRob Herring fan@5 { 248724ba675SRob Herring reg = <0x05>; 249724ba675SRob Herring aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0C>; 250724ba675SRob Herring }; 251724ba675SRob Herring fan@6 { 252724ba675SRob Herring reg = <0x06>; 253724ba675SRob Herring aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0D>; 254724ba675SRob Herring }; 255724ba675SRob Herring}; 256