1*9237e0a2SFred Chen// SPDX-License-Identifier: GPL-2.0-or-later 2*9237e0a2SFred Chen// Copyright 2025 Facebook Inc. 3*9237e0a2SFred Chen 4*9237e0a2SFred Chen/dts-v1/; 5*9237e0a2SFred Chen#include "aspeed-g6.dtsi" 6*9237e0a2SFred Chen#include <dt-bindings/gpio/aspeed-gpio.h> 7*9237e0a2SFred Chen#include <dt-bindings/i2c/i2c.h> 8*9237e0a2SFred Chen 9*9237e0a2SFred Chen/ { 10*9237e0a2SFred Chen model = "Facebook Santabarbara BMC"; 11*9237e0a2SFred Chen compatible = "facebook,santabarbara-bmc", "aspeed,ast2600"; 12*9237e0a2SFred Chen 13*9237e0a2SFred Chen aliases { 14*9237e0a2SFred Chen serial0 = &uart1; 15*9237e0a2SFred Chen serial2 = &uart3; 16*9237e0a2SFred Chen serial3 = &uart4; 17*9237e0a2SFred Chen serial4 = &uart5; 18*9237e0a2SFred Chen i2c16 = &i2c4mux0ch0; 19*9237e0a2SFred Chen i2c17 = &i2c4mux0ch1; 20*9237e0a2SFred Chen i2c18 = &i2c4mux0ch2; 21*9237e0a2SFred Chen i2c19 = &i2c4mux0ch3; 22*9237e0a2SFred Chen i2c20 = &i2c4mux0ch4; 23*9237e0a2SFred Chen i2c21 = &i2c4mux0ch5; 24*9237e0a2SFred Chen i2c22 = &i2c4mux0ch6; 25*9237e0a2SFred Chen i2c23 = &i2c4mux0ch7; 26*9237e0a2SFred Chen i2c24 = &i2c5mux0ch0; 27*9237e0a2SFred Chen i2c25 = &i2c5mux0ch1; 28*9237e0a2SFred Chen i2c26 = &i2c5mux0ch2; 29*9237e0a2SFred Chen i2c27 = &i2c5mux0ch3; 30*9237e0a2SFred Chen i2c28 = &i2c5mux1ch0; 31*9237e0a2SFred Chen i2c29 = &i2c5mux1ch1; 32*9237e0a2SFred Chen i2c30 = &i2c5mux1ch2; 33*9237e0a2SFred Chen i2c31 = &i2c5mux1ch3; 34*9237e0a2SFred Chen i2c32 = &i2c12mux0ch0; 35*9237e0a2SFred Chen i2c33 = &i2c12mux0ch1; 36*9237e0a2SFred Chen i2c34 = &i2c12mux0ch2; 37*9237e0a2SFred Chen i2c35 = &i2c12mux0ch3; 38*9237e0a2SFred Chen i2c36 = &i2c12mux0ch4; 39*9237e0a2SFred Chen i2c37 = &i2c12mux0ch5; 40*9237e0a2SFred Chen i2c38 = &i2c12mux0ch6; 41*9237e0a2SFred Chen i2c39 = &i2c12mux0ch7; 42*9237e0a2SFred Chen }; 43*9237e0a2SFred Chen 44*9237e0a2SFred Chen chosen { 45*9237e0a2SFred Chen stdout-path = "serial4:57600n8"; 46*9237e0a2SFred Chen }; 47*9237e0a2SFred Chen 48*9237e0a2SFred Chen iio-hwmon { 49*9237e0a2SFred Chen compatible = "iio-hwmon"; 50*9237e0a2SFred Chen io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, 51*9237e0a2SFred Chen <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, 52*9237e0a2SFred Chen <&adc1 2>; 53*9237e0a2SFred Chen }; 54*9237e0a2SFred Chen 55*9237e0a2SFred Chen leds { 56*9237e0a2SFred Chen compatible = "gpio-leds"; 57*9237e0a2SFred Chen 58*9237e0a2SFred Chen led-0 { 59*9237e0a2SFred Chen label = "bmc_heartbeat_amber"; 60*9237e0a2SFred Chen gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; 61*9237e0a2SFred Chen linux,default-trigger = "heartbeat"; 62*9237e0a2SFred Chen }; 63*9237e0a2SFred Chen 64*9237e0a2SFred Chen led-1 { 65*9237e0a2SFred Chen label = "fp_id_amber"; 66*9237e0a2SFred Chen default-state = "off"; 67*9237e0a2SFred Chen gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>; 68*9237e0a2SFred Chen }; 69*9237e0a2SFred Chen 70*9237e0a2SFred Chen led-2 { 71*9237e0a2SFred Chen label = "power_blue"; 72*9237e0a2SFred Chen default-state = "off"; 73*9237e0a2SFred Chen gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>; 74*9237e0a2SFred Chen }; 75*9237e0a2SFred Chen }; 76*9237e0a2SFred Chen 77*9237e0a2SFred Chen memory@80000000 { 78*9237e0a2SFred Chen device_type = "memory"; 79*9237e0a2SFred Chen reg = <0x80000000 0x80000000>; 80*9237e0a2SFred Chen }; 81*9237e0a2SFred Chen 82*9237e0a2SFred Chen p3v3_bmc_aux: regulator-p3v3-bmc-aux { 83*9237e0a2SFred Chen compatible = "regulator-fixed"; 84*9237e0a2SFred Chen regulator-name = "p3v3_bmc_aux"; 85*9237e0a2SFred Chen regulator-min-microvolt = <3300000>; 86*9237e0a2SFred Chen regulator-max-microvolt = <3300000>; 87*9237e0a2SFred Chen regulator-always-on; 88*9237e0a2SFred Chen }; 89*9237e0a2SFred Chen 90*9237e0a2SFred Chen spi_gpio: spi { 91*9237e0a2SFred Chen compatible = "spi-gpio"; 92*9237e0a2SFred Chen #address-cells = <1>; 93*9237e0a2SFred Chen #size-cells = <0>; 94*9237e0a2SFred Chen 95*9237e0a2SFred Chen sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 96*9237e0a2SFred Chen mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; 97*9237e0a2SFred Chen miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>; 98*9237e0a2SFred Chen num-chipselects = <1>; 99*9237e0a2SFred Chen cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; 100*9237e0a2SFred Chen status = "okay"; 101*9237e0a2SFred Chen 102*9237e0a2SFred Chen tpm@0 { 103*9237e0a2SFred Chen compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; 104*9237e0a2SFred Chen spi-max-frequency = <33000000>; 105*9237e0a2SFred Chen reg = <0>; 106*9237e0a2SFred Chen }; 107*9237e0a2SFred Chen }; 108*9237e0a2SFred Chen}; 109*9237e0a2SFred Chen 110*9237e0a2SFred Chen&adc0 { 111*9237e0a2SFred Chen aspeed,int-vref-microvolt = <2500000>; 112*9237e0a2SFred Chen pinctrl-names = "default"; 113*9237e0a2SFred Chen pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default 114*9237e0a2SFred Chen &pinctrl_adc2_default &pinctrl_adc3_default 115*9237e0a2SFred Chen &pinctrl_adc4_default &pinctrl_adc5_default 116*9237e0a2SFred Chen &pinctrl_adc6_default &pinctrl_adc7_default>; 117*9237e0a2SFred Chen status = "okay"; 118*9237e0a2SFred Chen}; 119*9237e0a2SFred Chen 120*9237e0a2SFred Chen&adc1 { 121*9237e0a2SFred Chen aspeed,int-vref-microvolt = <2500000>; 122*9237e0a2SFred Chen pinctrl-names = "default"; 123*9237e0a2SFred Chen pinctrl-0 = <&pinctrl_adc10_default>; 124*9237e0a2SFred Chen status = "okay"; 125*9237e0a2SFred Chen}; 126*9237e0a2SFred Chen 127*9237e0a2SFred Chen&ehci0 { 128*9237e0a2SFred Chen status = "okay"; 129*9237e0a2SFred Chen}; 130*9237e0a2SFred Chen 131*9237e0a2SFred Chen&ehci1 { 132*9237e0a2SFred Chen status = "okay"; 133*9237e0a2SFred Chen}; 134*9237e0a2SFred Chen 135*9237e0a2SFred Chen&fmc { 136*9237e0a2SFred Chen status = "okay"; 137*9237e0a2SFred Chen 138*9237e0a2SFred Chen flash@0 { 139*9237e0a2SFred Chen status = "okay"; 140*9237e0a2SFred Chen m25p,fast-read; 141*9237e0a2SFred Chen label = "bmc"; 142*9237e0a2SFred Chen spi-max-frequency = <50000000>; 143*9237e0a2SFred Chen#include "openbmc-flash-layout-128.dtsi" 144*9237e0a2SFred Chen }; 145*9237e0a2SFred Chen 146*9237e0a2SFred Chen flash@1 { 147*9237e0a2SFred Chen status = "okay"; 148*9237e0a2SFred Chen m25p,fast-read; 149*9237e0a2SFred Chen label = "alt-bmc"; 150*9237e0a2SFred Chen spi-max-frequency = <50000000>; 151*9237e0a2SFred Chen }; 152*9237e0a2SFred Chen}; 153*9237e0a2SFred Chen 154*9237e0a2SFred Chen&gpio0 { 155*9237e0a2SFred Chen gpio-line-names = 156*9237e0a2SFred Chen /*A0-A7*/ "","","","","","","","", 157*9237e0a2SFred Chen /*B0-B7*/ "rtc-battery-voltage-read-enable","","","BMC_READY", 158*9237e0a2SFred Chen "","led-identify","","", 159*9237e0a2SFred Chen /*C0-C7*/ "","","","","","","","", 160*9237e0a2SFred Chen /*D0-D7*/ "","","","","","","","", 161*9237e0a2SFred Chen /*E0-E7*/ "","","","","","","","", 162*9237e0a2SFred Chen /*F0-F7*/ "","","","","","","","", 163*9237e0a2SFred Chen /*G0-G7*/ "FM_MUX1_SEL_R","","","","","","","", 164*9237e0a2SFred Chen /*H0-H7*/ "","","","","","","","", 165*9237e0a2SFred Chen /*I0-I7*/ "","","","","","","","", 166*9237e0a2SFred Chen /*J0-J7*/ "","","","","","","","", 167*9237e0a2SFred Chen /*K0-K7*/ "","","","","","","","", 168*9237e0a2SFred Chen /*L0-L7*/ "","","","","","","","", 169*9237e0a2SFred Chen /*M0-M7*/ "","","","","","","","", 170*9237e0a2SFred Chen /*N0-N7*/ "led-postcode-0","led-postcode-1", 171*9237e0a2SFred Chen "led-postcode-2","led-postcode-3", 172*9237e0a2SFred Chen "led-postcode-4","led-postcode-5", 173*9237e0a2SFred Chen "led-postcode-6","led-postcode-7", 174*9237e0a2SFred Chen /*O0-O7*/ "","","","","","","","", 175*9237e0a2SFred Chen /*P0-P7*/ "power-button","","reset-button","", 176*9237e0a2SFred Chen "led-power","","","", 177*9237e0a2SFred Chen /*Q0-Q7*/ "","","","","","","","", 178*9237e0a2SFred Chen /*R0-R7*/ "","","","","","","","", 179*9237e0a2SFred Chen /*S0-S7*/ "","","power-host-control","","","","","", 180*9237e0a2SFred Chen /*T0-T7*/ "","","","","","","","", 181*9237e0a2SFred Chen /*U0-U7*/ "","","","","","","","", 182*9237e0a2SFred Chen /*V0-V7*/ "","","","","","","","", 183*9237e0a2SFred Chen /*W0-W7*/ "","","","","","","","", 184*9237e0a2SFred Chen /*X0-X7*/ "","","","","","","","", 185*9237e0a2SFred Chen /*Y0-Y7*/ "","","","","","","","", 186*9237e0a2SFred Chen /*Z0-Z7*/ "","","","","","","",""; 187*9237e0a2SFred Chen}; 188*9237e0a2SFred Chen 189*9237e0a2SFred Chen&gpio1 { 190*9237e0a2SFred Chen gpio-line-names = 191*9237e0a2SFred Chen /*18A0-18A7*/ "","","","","","","","", 192*9237e0a2SFred Chen /*18B0-18B7*/ "","","","", 193*9237e0a2SFred Chen "FM_BOARD_BMC_REV_ID0","FM_BOARD_BMC_REV_ID1", 194*9237e0a2SFred Chen "FM_BOARD_BMC_REV_ID2","", 195*9237e0a2SFred Chen /*18C0-18C7*/ "SPI_BMC_BIOS_ROM_IRQ0_R_N","","","","","","","", 196*9237e0a2SFred Chen /*18D0-18D7*/ "","","","","","","","", 197*9237e0a2SFred Chen /*18E0-18E3*/ "FM_BMC_PROT_LS_EN","AC_PWR_BMC_BTN_R_N","",""; 198*9237e0a2SFred Chen}; 199*9237e0a2SFred Chen 200*9237e0a2SFred Chen&i2c0 { 201*9237e0a2SFred Chen status = "okay"; 202*9237e0a2SFred Chen 203*9237e0a2SFred Chen // MB FRU 204*9237e0a2SFred Chen eeprom@53 { 205*9237e0a2SFred Chen compatible = "atmel,24c128"; 206*9237e0a2SFred Chen reg = <0x53>; 207*9237e0a2SFred Chen }; 208*9237e0a2SFred Chen 209*9237e0a2SFred Chen rtc@68 { 210*9237e0a2SFred Chen compatible = "dallas,ds1339"; 211*9237e0a2SFred Chen reg = <0x68>; 212*9237e0a2SFred Chen }; 213*9237e0a2SFred Chen}; 214*9237e0a2SFred Chen 215*9237e0a2SFred Chen&i2c1 { 216*9237e0a2SFred Chen status = "okay"; 217*9237e0a2SFred Chen 218*9237e0a2SFred Chen gpio@20 { 219*9237e0a2SFred Chen compatible = "nxp,pca9555"; 220*9237e0a2SFred Chen reg = <0x20>; 221*9237e0a2SFred Chen gpio-controller; 222*9237e0a2SFred Chen #gpio-cells = <2>; 223*9237e0a2SFred Chen interrupt-parent = <&sgpiom0>; 224*9237e0a2SFred Chen interrupts = <112 IRQ_TYPE_LEVEL_LOW>; 225*9237e0a2SFred Chen gpio-line-names = 226*9237e0a2SFred Chen "FM_NIC_PPS_IN_OE_N","FM_NIC_PPS_OUT_OE_N", 227*9237e0a2SFred Chen "FM_CPU0_TRIGGERTSC_OE_N","FM_NIC_PPS_IN_MUX_OE_N", 228*9237e0a2SFred Chen "FM_CPU0_CORETYPE0","FM_CPU0_CORETYPE1", 229*9237e0a2SFred Chen "FM_CPU0_CORETYPE2","FM_NIC_PPS_OUT_MUX_OE", 230*9237e0a2SFred Chen "CLKMUX_INPUT_LOSS_U45_R_N","FM_CPU0_SP7R1", 231*9237e0a2SFred Chen "FM_CPU0_SP7R2","FM_CPU0_SP7R3", 232*9237e0a2SFred Chen "FM_CPU0_SP7R4","", 233*9237e0a2SFred Chen "FM_NIC_PPS_IN_S0_R","FM_NIC_PPS_IN_S1_R"; 234*9237e0a2SFred Chen }; 235*9237e0a2SFred Chen 236*9237e0a2SFred Chen fan-controller@21{ 237*9237e0a2SFred Chen compatible = "maxim,max31790"; 238*9237e0a2SFred Chen reg = <0x21>; 239*9237e0a2SFred Chen }; 240*9237e0a2SFred Chen 241*9237e0a2SFred Chen gpio@22 { 242*9237e0a2SFred Chen compatible = "nxp,pca9555"; 243*9237e0a2SFred Chen reg = <0x22>; 244*9237e0a2SFred Chen gpio-controller; 245*9237e0a2SFred Chen #gpio-cells = <2>; 246*9237e0a2SFred Chen interrupt-parent = <&sgpiom0>; 247*9237e0a2SFred Chen interrupts = <116 IRQ_TYPE_LEVEL_LOW>; 248*9237e0a2SFred Chen gpio-line-names = 249*9237e0a2SFred Chen "FM_CBL_PRSNT_0A_N","FM_CBL_PRSNT_0B_N", 250*9237e0a2SFred Chen "FM_CBL_PRSNT_1A_N","FM_CBL_PRSNT_1B_N", 251*9237e0a2SFred Chen "FM_MODULE_PWRGD_0A","FM_MODULE_PWRGD_0B", 252*9237e0a2SFred Chen "CLKMUX_INPUT_LOSS_U88_R_N","FM_MODULE_PWRGD_1B", 253*9237e0a2SFred Chen "","", 254*9237e0a2SFred Chen "CLKMUX_INPUT_LOSS_U83_R_N","CLKMUX_INPUT_LOSS_U84_R_N", 255*9237e0a2SFred Chen "FM_P3V3_E1S_0_FAULT_R_N","FM_P3V3_E1S_1_FAULT_R_N", 256*9237e0a2SFred Chen "E1S_0_P12V_ADC_R_ALERT","E1S_1_P12V_ADC_R_ALERT"; 257*9237e0a2SFred Chen }; 258*9237e0a2SFred Chen 259*9237e0a2SFred Chen gpio@24 { 260*9237e0a2SFred Chen compatible = "nxp,pca9555"; 261*9237e0a2SFred Chen reg = <0x24>; 262*9237e0a2SFred Chen gpio-controller; 263*9237e0a2SFred Chen #gpio-cells = <2>; 264*9237e0a2SFred Chen interrupt-parent = <&sgpiom0>; 265*9237e0a2SFred Chen interrupts = <114 IRQ_TYPE_LEVEL_LOW>; 266*9237e0a2SFred Chen gpio-line-names = 267*9237e0a2SFred Chen "FM_CBL_PRSNT_2A_N","FM_CBL_PRSNT_2B_N", 268*9237e0a2SFred Chen "FM_CBL_PRSNT_3A_N","FM_CBL_PRSNT_3B_N", 269*9237e0a2SFred Chen "FM_CBL_PRSNT_4A_N","FM_CBL_PRSNT_4B_N", 270*9237e0a2SFred Chen "FM_P3V3_NIC_400G_FAULT_R_N","FM_MODULE_PWRGD_2B", 271*9237e0a2SFred Chen "OCP_SFF_P12V_ADC_R_ALERT","FM_MODULE_PWRGD_3B", 272*9237e0a2SFred Chen "FM_THERMAL_ALERT_R_N","FM_MODULE_PWRGD_4B", 273*9237e0a2SFred Chen "FM_CBL_PRSNT_OSFP_A_N","FM_CBL_PRSNT_OSFP_B_N", 274*9237e0a2SFred Chen "FM_JTAG_MCIO_MUX_S0","FM_JTAG_MCIO_MUX_S1"; 275*9237e0a2SFred Chen }; 276*9237e0a2SFred Chen 277*9237e0a2SFred Chen gpio@26 { 278*9237e0a2SFred Chen compatible = "nxp,pca9555"; 279*9237e0a2SFred Chen reg = <0x26>; 280*9237e0a2SFred Chen gpio-controller; 281*9237e0a2SFred Chen #gpio-cells = <2>; 282*9237e0a2SFred Chen interrupt-parent = <&sgpiom0>; 283*9237e0a2SFred Chen interrupts = <118 IRQ_TYPE_LEVEL_LOW>; 284*9237e0a2SFred Chen gpio-line-names = 285*9237e0a2SFred Chen "FAN_0_PRSNT_R1_N","FAN_1_PRSNT_R1_N", 286*9237e0a2SFred Chen "FAN_2_PRSNT_R1_N","FAN_3_PRSNT_R1_N", 287*9237e0a2SFred Chen "P12V_FAN_0_ADC_ALERT","P12V_FAN_1_ADC_ALERT", 288*9237e0a2SFred Chen "P12V_FAN_2_ADC_ALERT","P12V_FAN_3_ADC_ALERT", 289*9237e0a2SFred Chen "P12V_FAN0_PWRGD_R","P12V_FAN1_PWRGD_R", 290*9237e0a2SFred Chen "P12V_FAN2_PWRGD_R","P12V_FAN3_PWRGD_R", 291*9237e0a2SFred Chen "","","",""; 292*9237e0a2SFred Chen }; 293*9237e0a2SFred Chen}; 294*9237e0a2SFred Chen 295*9237e0a2SFred Chen&i2c4 { 296*9237e0a2SFred Chen status = "okay"; 297*9237e0a2SFred Chen 298*9237e0a2SFred Chen i2c-mux@70 { 299*9237e0a2SFred Chen compatible = "nxp,pca9548"; 300*9237e0a2SFred Chen reg = <0x70>; 301*9237e0a2SFred Chen #address-cells = <1>; 302*9237e0a2SFred Chen #size-cells = <0>; 303*9237e0a2SFred Chen i2c-mux-idle-disconnect; 304*9237e0a2SFred Chen 305*9237e0a2SFred Chen i2c4mux0ch0: i2c@0 { 306*9237e0a2SFred Chen reg = <0>; 307*9237e0a2SFred Chen #address-cells = <1>; 308*9237e0a2SFred Chen #size-cells = <0>; 309*9237e0a2SFred Chen 310*9237e0a2SFred Chen // HPM Board ID EEPROM 311*9237e0a2SFred Chen eeprom@51 { 312*9237e0a2SFred Chen compatible = "atmel,24c128"; 313*9237e0a2SFred Chen reg = <0x51>; 314*9237e0a2SFred Chen }; 315*9237e0a2SFred Chen 316*9237e0a2SFred Chen // SCM Board ID EEPROM 317*9237e0a2SFred Chen eeprom@53 { 318*9237e0a2SFred Chen compatible = "atmel,24c128"; 319*9237e0a2SFred Chen reg = <0x53>; 320*9237e0a2SFred Chen }; 321*9237e0a2SFred Chen }; 322*9237e0a2SFred Chen i2c4mux0ch1: i2c@1 { 323*9237e0a2SFred Chen reg = <1>; 324*9237e0a2SFred Chen #address-cells = <1>; 325*9237e0a2SFred Chen #size-cells = <0>; 326*9237e0a2SFred Chen }; 327*9237e0a2SFred Chen i2c4mux0ch2: i2c@2 { 328*9237e0a2SFred Chen reg = <2>; 329*9237e0a2SFred Chen #address-cells = <1>; 330*9237e0a2SFred Chen #size-cells = <0>; 331*9237e0a2SFred Chen }; 332*9237e0a2SFred Chen i2c4mux0ch3: i2c@3 { 333*9237e0a2SFred Chen reg = <3>; 334*9237e0a2SFred Chen #address-cells = <1>; 335*9237e0a2SFred Chen #size-cells = <0>; 336*9237e0a2SFred Chen 337*9237e0a2SFred Chen power-monitor@40 { 338*9237e0a2SFred Chen compatible = "ti,ina230"; 339*9237e0a2SFred Chen reg = <0x40>; 340*9237e0a2SFred Chen shunt-resistor = <2000>; 341*9237e0a2SFred Chen }; 342*9237e0a2SFred Chen 343*9237e0a2SFred Chen power-monitor@42 { 344*9237e0a2SFred Chen compatible = "ti,ina230"; 345*9237e0a2SFred Chen reg = <0x42>; 346*9237e0a2SFred Chen shunt-resistor = <2000>; 347*9237e0a2SFred Chen }; 348*9237e0a2SFred Chen 349*9237e0a2SFred Chen power-monitor@44 { 350*9237e0a2SFred Chen compatible = "ti,ina230"; 351*9237e0a2SFred Chen reg = <0x44>; 352*9237e0a2SFred Chen shunt-resistor = <2000>; 353*9237e0a2SFred Chen }; 354*9237e0a2SFred Chen 355*9237e0a2SFred Chen power-monitor@46 { 356*9237e0a2SFred Chen compatible = "ti,ina230"; 357*9237e0a2SFred Chen reg = <0x46>; 358*9237e0a2SFred Chen shunt-resistor = <2000>; 359*9237e0a2SFred Chen }; 360*9237e0a2SFred Chen 361*9237e0a2SFred Chen voltage-sensor@48 { 362*9237e0a2SFred Chen compatible = "ti,ads7830"; 363*9237e0a2SFred Chen reg = <0x48>; 364*9237e0a2SFred Chen vref-supply = <&p3v3_bmc_aux>; 365*9237e0a2SFred Chen }; 366*9237e0a2SFred Chen 367*9237e0a2SFred Chen voltage-sensor@4a { 368*9237e0a2SFred Chen compatible = "ti,ads7830"; 369*9237e0a2SFred Chen reg = <0x4a>; 370*9237e0a2SFred Chen vref-supply = <&p3v3_bmc_aux>; 371*9237e0a2SFred Chen }; 372*9237e0a2SFred Chen 373*9237e0a2SFred Chen temperature-sensor@4c { 374*9237e0a2SFred Chen compatible = "ti,tmp75"; 375*9237e0a2SFred Chen reg = <0x4c>; 376*9237e0a2SFred Chen }; 377*9237e0a2SFred Chen 378*9237e0a2SFred Chen temperature-sensor@4e { 379*9237e0a2SFred Chen compatible = "ti,tmp75"; 380*9237e0a2SFred Chen reg = <0x4e>; 381*9237e0a2SFred Chen }; 382*9237e0a2SFred Chen }; 383*9237e0a2SFred Chen i2c4mux0ch4: i2c@4 { 384*9237e0a2SFred Chen reg = <4>; 385*9237e0a2SFred Chen #address-cells = <1>; 386*9237e0a2SFred Chen #size-cells = <0>; 387*9237e0a2SFred Chen }; 388*9237e0a2SFred Chen i2c4mux0ch5: i2c@5 { 389*9237e0a2SFred Chen reg = <5>; 390*9237e0a2SFred Chen #address-cells = <1>; 391*9237e0a2SFred Chen #size-cells = <0>; 392*9237e0a2SFred Chen }; 393*9237e0a2SFred Chen i2c4mux0ch6: i2c@6 { 394*9237e0a2SFred Chen reg = <6>; 395*9237e0a2SFred Chen #address-cells = <1>; 396*9237e0a2SFred Chen #size-cells = <0>; 397*9237e0a2SFred Chen 398*9237e0a2SFred Chen power-monitor@40 { 399*9237e0a2SFred Chen compatible = "ti,ina230"; 400*9237e0a2SFred Chen reg = <0x40>; 401*9237e0a2SFred Chen shunt-resistor = <2000>; 402*9237e0a2SFred Chen }; 403*9237e0a2SFred Chen 404*9237e0a2SFred Chen power-monitor@42 { 405*9237e0a2SFred Chen compatible = "ti,ina230"; 406*9237e0a2SFred Chen reg = <0x42>; 407*9237e0a2SFred Chen shunt-resistor = <2000>; 408*9237e0a2SFred Chen }; 409*9237e0a2SFred Chen 410*9237e0a2SFred Chen power-monitor@44 { 411*9237e0a2SFred Chen compatible = "ti,ina230"; 412*9237e0a2SFred Chen reg = <0x44>; 413*9237e0a2SFred Chen shunt-resistor = <2000>; 414*9237e0a2SFred Chen }; 415*9237e0a2SFred Chen 416*9237e0a2SFred Chen power-monitor@46 { 417*9237e0a2SFred Chen compatible = "ti,ina230"; 418*9237e0a2SFred Chen reg = <0x46>; 419*9237e0a2SFred Chen shunt-resistor = <2000>; 420*9237e0a2SFred Chen }; 421*9237e0a2SFred Chen 422*9237e0a2SFred Chen voltage-sensor@48 { 423*9237e0a2SFred Chen compatible = "ti,ads7830"; 424*9237e0a2SFred Chen reg = <0x48>; 425*9237e0a2SFred Chen }; 426*9237e0a2SFred Chen }; 427*9237e0a2SFred Chen i2c4mux0ch7: i2c@7 { 428*9237e0a2SFred Chen reg = <7>; 429*9237e0a2SFred Chen #address-cells = <1>; 430*9237e0a2SFred Chen #size-cells = <0>; 431*9237e0a2SFred Chen 432*9237e0a2SFred Chen temperature-sensor@4b { 433*9237e0a2SFred Chen compatible = "ti,tmp75"; 434*9237e0a2SFred Chen reg = <0x4b>; 435*9237e0a2SFred Chen }; 436*9237e0a2SFred Chen 437*9237e0a2SFred Chen temperature-sensor@4f { 438*9237e0a2SFred Chen compatible = "ti,tmp75"; 439*9237e0a2SFred Chen reg = <0x4f>; 440*9237e0a2SFred Chen }; 441*9237e0a2SFred Chen 442*9237e0a2SFred Chen // FIO FRU 443*9237e0a2SFred Chen eeprom@53 { 444*9237e0a2SFred Chen compatible = "atmel,24c512"; 445*9237e0a2SFred Chen reg = <0x53>; 446*9237e0a2SFred Chen }; 447*9237e0a2SFred Chen }; 448*9237e0a2SFred Chen }; 449*9237e0a2SFred Chen}; 450*9237e0a2SFred Chen 451*9237e0a2SFred Chen&i2c5 { 452*9237e0a2SFred Chen status = "okay"; 453*9237e0a2SFred Chen 454*9237e0a2SFred Chen // E1S BP FRU 455*9237e0a2SFred Chen eeprom@52 { 456*9237e0a2SFred Chen compatible = "atmel,24c64"; 457*9237e0a2SFred Chen reg = <0x52>; 458*9237e0a2SFred Chen }; 459*9237e0a2SFred Chen 460*9237e0a2SFred Chen i2c-mux@71 { 461*9237e0a2SFred Chen compatible = "nxp,pca9546"; 462*9237e0a2SFred Chen reg = <0x71>; 463*9237e0a2SFred Chen #address-cells = <1>; 464*9237e0a2SFred Chen #size-cells = <0>; 465*9237e0a2SFred Chen i2c-mux-idle-disconnect; 466*9237e0a2SFred Chen 467*9237e0a2SFred Chen i2c5mux0ch0: i2c@0 { 468*9237e0a2SFred Chen reg = <0>; 469*9237e0a2SFred Chen #address-cells = <1>; 470*9237e0a2SFred Chen #size-cells = <0>; 471*9237e0a2SFred Chen }; 472*9237e0a2SFred Chen i2c5mux0ch1: i2c@1 { 473*9237e0a2SFred Chen reg = <1>; 474*9237e0a2SFred Chen #address-cells = <1>; 475*9237e0a2SFred Chen #size-cells = <0>; 476*9237e0a2SFred Chen }; 477*9237e0a2SFred Chen i2c5mux0ch2: i2c@2 { 478*9237e0a2SFred Chen reg = <2>; 479*9237e0a2SFred Chen #address-cells = <1>; 480*9237e0a2SFred Chen #size-cells = <0>; 481*9237e0a2SFred Chen }; 482*9237e0a2SFred Chen i2c5mux0ch3: i2c@3 { 483*9237e0a2SFred Chen reg = <3>; 484*9237e0a2SFred Chen #address-cells = <1>; 485*9237e0a2SFred Chen #size-cells = <0>; 486*9237e0a2SFred Chen }; 487*9237e0a2SFred Chen }; 488*9237e0a2SFred Chen 489*9237e0a2SFred Chen i2c-mux@72 { 490*9237e0a2SFred Chen compatible = "nxp,pca9546"; 491*9237e0a2SFred Chen reg = <0x72>; 492*9237e0a2SFred Chen #address-cells = <1>; 493*9237e0a2SFred Chen #size-cells = <0>; 494*9237e0a2SFred Chen i2c-mux-idle-disconnect; 495*9237e0a2SFred Chen 496*9237e0a2SFred Chen i2c5mux1ch0: i2c@0 { 497*9237e0a2SFred Chen reg = <0>; 498*9237e0a2SFred Chen #address-cells = <1>; 499*9237e0a2SFred Chen #size-cells = <0>; 500*9237e0a2SFred Chen 501*9237e0a2SFred Chen voltage-sensor@48 { 502*9237e0a2SFred Chen compatible = "ti,ads7830"; 503*9237e0a2SFred Chen reg = <0x48>; 504*9237e0a2SFred Chen }; 505*9237e0a2SFred Chen }; 506*9237e0a2SFred Chen i2c5mux1ch1: i2c@1 { 507*9237e0a2SFred Chen reg = <1>; 508*9237e0a2SFred Chen #address-cells = <1>; 509*9237e0a2SFred Chen #size-cells = <0>; 510*9237e0a2SFred Chen 511*9237e0a2SFred Chen temperature-sensor@48 { 512*9237e0a2SFred Chen compatible = "ti,tmp75"; 513*9237e0a2SFred Chen reg = <0x48>; 514*9237e0a2SFred Chen }; 515*9237e0a2SFred Chen }; 516*9237e0a2SFred Chen i2c5mux1ch2: i2c@2 { 517*9237e0a2SFred Chen reg = <2>; 518*9237e0a2SFred Chen #address-cells = <1>; 519*9237e0a2SFred Chen #size-cells = <0>; 520*9237e0a2SFred Chen 521*9237e0a2SFred Chen power-monitor@40 { 522*9237e0a2SFred Chen compatible = "ti,ina230"; 523*9237e0a2SFred Chen reg = <0x40>; 524*9237e0a2SFred Chen shunt-resistor = <2000>; 525*9237e0a2SFred Chen }; 526*9237e0a2SFred Chen 527*9237e0a2SFred Chen power-monitor@41 { 528*9237e0a2SFred Chen compatible = "ti,ina230"; 529*9237e0a2SFred Chen reg = <0x41>; 530*9237e0a2SFred Chen shunt-resistor = <2000>; 531*9237e0a2SFred Chen }; 532*9237e0a2SFred Chen 533*9237e0a2SFred Chen power-monitor@44 { 534*9237e0a2SFred Chen compatible = "ti,ina230"; 535*9237e0a2SFred Chen reg = <0x44>; 536*9237e0a2SFred Chen shunt-resistor = <2000>; 537*9237e0a2SFred Chen }; 538*9237e0a2SFred Chen 539*9237e0a2SFred Chen power-monitor@45 { 540*9237e0a2SFred Chen compatible = "ti,ina230"; 541*9237e0a2SFred Chen reg = <0x45>; 542*9237e0a2SFred Chen shunt-resistor = <2000>; 543*9237e0a2SFred Chen }; 544*9237e0a2SFred Chen }; 545*9237e0a2SFred Chen i2c5mux1ch3: i2c@3 { 546*9237e0a2SFred Chen reg = <3>; 547*9237e0a2SFred Chen #address-cells = <1>; 548*9237e0a2SFred Chen #size-cells = <0>; 549*9237e0a2SFred Chen 550*9237e0a2SFred Chen gpio@74 { 551*9237e0a2SFred Chen compatible = "nxp,pca9539"; 552*9237e0a2SFred Chen reg = <0x74>; 553*9237e0a2SFred Chen gpio-controller; 554*9237e0a2SFred Chen #gpio-cells = <2>; 555*9237e0a2SFred Chen gpio-line-names = 556*9237e0a2SFred Chen "P12V_E1S_ADC_ALERT","BUFF0_100M_LOSB_PLD", 557*9237e0a2SFred Chen "E1S_BP_SKU_ID0","E1S_BP_SKU_ID1", 558*9237e0a2SFred Chen "E1S_BP_SKU_ID2","E1S_BP_REV_ID0", 559*9237e0a2SFred Chen "E1S_BP_REV_ID1","E1S_BP_REV_ID2", 560*9237e0a2SFred Chen "P3V3_E1S_1_FAULT_R_N","P3V3_E1S_2_FAULT_R_N", 561*9237e0a2SFred Chen "P3V3_E1S_3_FAULT_R_N","P3V3_E1S_4_FAULT_R_N", 562*9237e0a2SFred Chen "P12V_E1S_1_FAULT_R_N","P12V_E1S_2_FAULT_R_N", 563*9237e0a2SFred Chen "P12V_E1S_3_FAULT_R_N","P12V_E1S_4_FAULT_R_N"; 564*9237e0a2SFred Chen }; 565*9237e0a2SFred Chen }; 566*9237e0a2SFred Chen }; 567*9237e0a2SFred Chen}; 568*9237e0a2SFred Chen 569*9237e0a2SFred Chen&i2c6 { 570*9237e0a2SFred Chen status = "okay"; 571*9237e0a2SFred Chen 572*9237e0a2SFred Chen // Rainbow0 FRU 573*9237e0a2SFred Chen eeprom@52 { 574*9237e0a2SFred Chen compatible = "atmel,24c256"; 575*9237e0a2SFred Chen reg = <0x52>; 576*9237e0a2SFred Chen }; 577*9237e0a2SFred Chen}; 578*9237e0a2SFred Chen 579*9237e0a2SFred Chen&i2c7 { 580*9237e0a2SFred Chen status = "okay"; 581*9237e0a2SFred Chen}; 582*9237e0a2SFred Chen 583*9237e0a2SFred Chen&i2c8 { 584*9237e0a2SFred Chen status = "okay"; 585*9237e0a2SFred Chen 586*9237e0a2SFred Chen // Rainbow2 FRU 587*9237e0a2SFred Chen eeprom@52 { 588*9237e0a2SFred Chen compatible = "atmel,24c256"; 589*9237e0a2SFred Chen reg = <0x52>; 590*9237e0a2SFred Chen }; 591*9237e0a2SFred Chen}; 592*9237e0a2SFred Chen 593*9237e0a2SFred Chen&i2c9 { 594*9237e0a2SFred Chen status = "okay"; 595*9237e0a2SFred Chen 596*9237e0a2SFred Chen temperature-sensor@4b { 597*9237e0a2SFred Chen compatible = "ti,tmp75"; 598*9237e0a2SFred Chen reg = <0x4b>; 599*9237e0a2SFred Chen }; 600*9237e0a2SFred Chen 601*9237e0a2SFred Chen // SCM FRU 602*9237e0a2SFred Chen eeprom@50 { 603*9237e0a2SFred Chen compatible = "atmel,24c128"; 604*9237e0a2SFred Chen reg = <0x50>; 605*9237e0a2SFred Chen }; 606*9237e0a2SFred Chen 607*9237e0a2SFred Chen // BSM FRU 608*9237e0a2SFred Chen eeprom@56 { 609*9237e0a2SFred Chen compatible = "atmel,24c64"; 610*9237e0a2SFred Chen reg = <0x56>; 611*9237e0a2SFred Chen }; 612*9237e0a2SFred Chen}; 613*9237e0a2SFred Chen 614*9237e0a2SFred Chen&i2c10 { 615*9237e0a2SFred Chen status = "okay"; 616*9237e0a2SFred Chen 617*9237e0a2SFred Chen // Rainbow3 FRU 618*9237e0a2SFred Chen eeprom@52 { 619*9237e0a2SFred Chen compatible = "atmel,24c256"; 620*9237e0a2SFred Chen reg = <0x52>; 621*9237e0a2SFred Chen }; 622*9237e0a2SFred Chen}; 623*9237e0a2SFred Chen 624*9237e0a2SFred Chen&i2c11 { 625*9237e0a2SFred Chen status = "okay"; 626*9237e0a2SFred Chen 627*9237e0a2SFred Chen // OCP NIC TEMP 628*9237e0a2SFred Chen temperature-sensor@1f { 629*9237e0a2SFred Chen compatible = "ti,tmp421"; 630*9237e0a2SFred Chen reg = <0x1f>; 631*9237e0a2SFred Chen }; 632*9237e0a2SFred Chen 633*9237e0a2SFred Chen // OCP NIC FRU 634*9237e0a2SFred Chen eeprom@50 { 635*9237e0a2SFred Chen compatible = "atmel,24c64"; 636*9237e0a2SFred Chen reg = <0x50>; 637*9237e0a2SFred Chen }; 638*9237e0a2SFred Chen}; 639*9237e0a2SFred Chen 640*9237e0a2SFred Chen&i2c12 { 641*9237e0a2SFred Chen status = "okay"; 642*9237e0a2SFred Chen 643*9237e0a2SFred Chen // SWB FRU 644*9237e0a2SFred Chen eeprom@52 { 645*9237e0a2SFred Chen compatible = "atmel,24c64"; 646*9237e0a2SFred Chen reg = <0x52>; 647*9237e0a2SFred Chen }; 648*9237e0a2SFred Chen 649*9237e0a2SFred Chen i2c-mux@72 { 650*9237e0a2SFred Chen compatible = "nxp,pca9548"; 651*9237e0a2SFred Chen reg = <0x72>; 652*9237e0a2SFred Chen #address-cells = <1>; 653*9237e0a2SFred Chen #size-cells = <0>; 654*9237e0a2SFred Chen i2c-mux-idle-disconnect; 655*9237e0a2SFred Chen 656*9237e0a2SFred Chen i2c12mux0ch0: i2c@0 { 657*9237e0a2SFred Chen reg = <0>; 658*9237e0a2SFred Chen #address-cells = <1>; 659*9237e0a2SFred Chen #size-cells = <0>; 660*9237e0a2SFred Chen 661*9237e0a2SFred Chen temperature-sensor@48 { 662*9237e0a2SFred Chen compatible = "ti,tmp75"; 663*9237e0a2SFred Chen reg = <0x48>; 664*9237e0a2SFred Chen }; 665*9237e0a2SFred Chen }; 666*9237e0a2SFred Chen i2c12mux0ch1: i2c@1 { 667*9237e0a2SFred Chen reg = <1>; 668*9237e0a2SFred Chen #address-cells = <1>; 669*9237e0a2SFred Chen #size-cells = <0>; 670*9237e0a2SFred Chen 671*9237e0a2SFred Chen power-monitor@42 { 672*9237e0a2SFred Chen compatible = "mps,mp2971"; 673*9237e0a2SFred Chen reg = <0x42>; 674*9237e0a2SFred Chen }; 675*9237e0a2SFred Chen 676*9237e0a2SFred Chen power-monitor@43 { 677*9237e0a2SFred Chen compatible = "mps,mp2971"; 678*9237e0a2SFred Chen reg = <0x43>; 679*9237e0a2SFred Chen }; 680*9237e0a2SFred Chen }; 681*9237e0a2SFred Chen i2c12mux0ch2: i2c@2 { 682*9237e0a2SFred Chen reg = <2>; 683*9237e0a2SFred Chen #address-cells = <1>; 684*9237e0a2SFred Chen #size-cells = <0>; 685*9237e0a2SFred Chen 686*9237e0a2SFred Chen power-monitor@40 { 687*9237e0a2SFred Chen compatible = "ti,ina230"; 688*9237e0a2SFred Chen reg = <0x40>; 689*9237e0a2SFred Chen shunt-resistor = <2000>; 690*9237e0a2SFred Chen }; 691*9237e0a2SFred Chen 692*9237e0a2SFred Chen power-monitor@41 { 693*9237e0a2SFred Chen compatible = "ti,ina230"; 694*9237e0a2SFred Chen reg = <0x41>; 695*9237e0a2SFred Chen shunt-resistor = <2000>; 696*9237e0a2SFred Chen }; 697*9237e0a2SFred Chen }; 698*9237e0a2SFred Chen i2c12mux0ch3: i2c@3 { 699*9237e0a2SFred Chen reg = <3>; 700*9237e0a2SFred Chen #address-cells = <1>; 701*9237e0a2SFred Chen #size-cells = <0>; 702*9237e0a2SFred Chen 703*9237e0a2SFred Chen power-monitor@44 { 704*9237e0a2SFred Chen compatible = "ti,ina230"; 705*9237e0a2SFred Chen reg = <0x44>; 706*9237e0a2SFred Chen shunt-resistor = <2000>; 707*9237e0a2SFred Chen }; 708*9237e0a2SFred Chen 709*9237e0a2SFred Chen power-monitor@45 { 710*9237e0a2SFred Chen compatible = "ti,ina230"; 711*9237e0a2SFred Chen reg = <0x45>; 712*9237e0a2SFred Chen shunt-resistor = <2000>; 713*9237e0a2SFred Chen }; 714*9237e0a2SFred Chen }; 715*9237e0a2SFred Chen i2c12mux0ch4: i2c@4 { 716*9237e0a2SFred Chen reg = <4>; 717*9237e0a2SFred Chen #address-cells = <1>; 718*9237e0a2SFred Chen #size-cells = <0>; 719*9237e0a2SFred Chen 720*9237e0a2SFred Chen voltage-sensor@49 { 721*9237e0a2SFred Chen compatible = "ti,ads7830"; 722*9237e0a2SFred Chen reg = <0x49>; 723*9237e0a2SFred Chen }; 724*9237e0a2SFred Chen }; 725*9237e0a2SFred Chen i2c12mux0ch5: i2c@5 { 726*9237e0a2SFred Chen reg = <5>; 727*9237e0a2SFred Chen #address-cells = <1>; 728*9237e0a2SFred Chen #size-cells = <0>; 729*9237e0a2SFred Chen }; 730*9237e0a2SFred Chen i2c12mux0ch6: i2c@6 { 731*9237e0a2SFred Chen reg = <6>; 732*9237e0a2SFred Chen #address-cells = <1>; 733*9237e0a2SFred Chen #size-cells = <0>; 734*9237e0a2SFred Chen }; 735*9237e0a2SFred Chen i2c12mux0ch7: i2c@7 { 736*9237e0a2SFred Chen reg = <7>; 737*9237e0a2SFred Chen #address-cells = <1>; 738*9237e0a2SFred Chen #size-cells = <0>; 739*9237e0a2SFred Chen }; 740*9237e0a2SFred Chen }; 741*9237e0a2SFred Chen}; 742*9237e0a2SFred Chen 743*9237e0a2SFred Chen&i2c13 { 744*9237e0a2SFred Chen status = "okay"; 745*9237e0a2SFred Chen 746*9237e0a2SFred Chen // Rainbow1 FRU 747*9237e0a2SFred Chen eeprom@52 { 748*9237e0a2SFred Chen compatible = "atmel,24c256"; 749*9237e0a2SFred Chen reg = <0x52>; 750*9237e0a2SFred Chen }; 751*9237e0a2SFred Chen}; 752*9237e0a2SFred Chen 753*9237e0a2SFred Chen&i2c14 { 754*9237e0a2SFred Chen status = "okay"; 755*9237e0a2SFred Chen}; 756*9237e0a2SFred Chen 757*9237e0a2SFred Chen&i2c15 { 758*9237e0a2SFred Chen status = "okay"; 759*9237e0a2SFred Chen}; 760*9237e0a2SFred Chen 761*9237e0a2SFred Chen&kcs2 { 762*9237e0a2SFred Chen aspeed,lpc-io-reg = <0xca8>; 763*9237e0a2SFred Chen status = "okay"; 764*9237e0a2SFred Chen}; 765*9237e0a2SFred Chen 766*9237e0a2SFred Chen&kcs3 { 767*9237e0a2SFred Chen aspeed,lpc-io-reg = <0xca2>; 768*9237e0a2SFred Chen status = "okay"; 769*9237e0a2SFred Chen}; 770*9237e0a2SFred Chen 771*9237e0a2SFred Chen&mac2 { 772*9237e0a2SFred Chen pinctrl-names = "default"; 773*9237e0a2SFred Chen pinctrl-0 = <&pinctrl_rmii3_default>; 774*9237e0a2SFred Chen use-ncsi; 775*9237e0a2SFred Chen status = "okay"; 776*9237e0a2SFred Chen}; 777*9237e0a2SFred Chen 778*9237e0a2SFred Chen&mac3 { 779*9237e0a2SFred Chen pinctrl-names = "default"; 780*9237e0a2SFred Chen pinctrl-0 = <&pinctrl_rmii4_default>; 781*9237e0a2SFred Chen use-ncsi; 782*9237e0a2SFred Chen status = "okay"; 783*9237e0a2SFred Chen}; 784*9237e0a2SFred Chen 785*9237e0a2SFred Chen&sgpiom0 { 786*9237e0a2SFred Chen ngpios = <128>; 787*9237e0a2SFred Chen bus-frequency = <2000000>; 788*9237e0a2SFred Chen gpio-line-names = 789*9237e0a2SFred Chen /*in - out - in - out */ 790*9237e0a2SFred Chen /*A0-A3 line 0-7*/ 791*9237e0a2SFred Chen "PDB1_HSC_PWR_OK","power-chassis-control", 792*9237e0a2SFred Chen "PDB2_HSC_PWR_OK","FM_MODULE_PWRGD_0A_OUT", 793*9237e0a2SFred Chen "PWRGD_P12V_MEM","FM_MODULE_PWRGD_0B_OUT", 794*9237e0a2SFred Chen "PWRGD_P12V_SCM","FM_MODULE_PWRGD_1B_OUT", 795*9237e0a2SFred Chen /*A4-A7 line 8-15*/ 796*9237e0a2SFred Chen "PWRGD_P12V_FAN","FM_MODULE_PWRGD_2B_OUT", 797*9237e0a2SFred Chen "PWRGD_P5V_AUX","FM_MODULE_PWRGD_3B_OUT", 798*9237e0a2SFred Chen "power-chassis-good","FM_MODULE_PWRGD_4B_OUT", 799*9237e0a2SFred Chen "PWRGD_P1V8_LDO","FM_CBL_PRSNT_0A_N_OUT", 800*9237e0a2SFred Chen /*B0-B3 line 16-23*/ 801*9237e0a2SFred Chen "PWRGD_P1V_LDO","FM_CBL_PRSNT_0B_N_OUT", 802*9237e0a2SFred Chen "PWRGD_PVDD33_S5","FM_CBL_PRSNT_1A_N_OUT", 803*9237e0a2SFred Chen "PWRGD_PVDD18_S5_P0","FM_CBL_PRSNT_1B_N_OUT", 804*9237e0a2SFred Chen "CPU0_SLP_S5_N","FM_CBL_PRSNT_2A_N_OUT", 805*9237e0a2SFred Chen /*B4-B7 line 24-31*/ 806*9237e0a2SFred Chen "PWRGD_PVDDIO_MEM_S3_P0","FM_CBL_PRSNT_2B_N_OUT", 807*9237e0a2SFred Chen "CPU0_SLP_S3_N","FM_CBL_PRSNT_3A_N_OUT", 808*9237e0a2SFred Chen "FM_MODULE_PWRGD_1B","FM_CBL_PRSNT_3B_N_OUT", 809*9237e0a2SFred Chen "FM_MODULE_PWRGD_2B","FM_CBL_PRSNT_4A_N_OUT", 810*9237e0a2SFred Chen /*C0-C3 line 32-39*/ 811*9237e0a2SFred Chen "FM_MODULE_PWRGD_3B","FM_CBL_PRSNT_4B_N_OUT", 812*9237e0a2SFred Chen "FM_MODULE_PWRGD_4B","P12V_FAN0_PWRGD_OUT", 813*9237e0a2SFred Chen "FM_MODULE_PWRGD_0B","P12V_FAN1_PWRGD_OUT", 814*9237e0a2SFred Chen "PWRGD_PVDDIO_P0","P12V_FAN2_PWRGD_OUT", 815*9237e0a2SFred Chen /*C4-C7 line 40-47*/ 816*9237e0a2SFred Chen "PWRGD_PVDDCR_SOC_P0","P12V_FAN3_PWRGD_OUT", 817*9237e0a2SFred Chen "PWRGD_PVDDCR_CPU0_P0","P12V_FAN4_PWRGD_OUT", 818*9237e0a2SFred Chen "PWRGD_PVDDCR_CPU1_P0","P12V_FAN5_PWRGD_OUT", 819*9237e0a2SFred Chen "FM_CPU0_PWR_GOOD","P12V_FAN6_PWRGD_OUT", 820*9237e0a2SFred Chen /*D0-D3 line 48-55*/ 821*9237e0a2SFred Chen "host0-ready","P12V_FAN7_PWRGD_OUT", 822*9237e0a2SFred Chen "FM_PWRGD_CPU0_PWROK","FAN_0_PRSNT_R1_N_OUT", 823*9237e0a2SFred Chen "FM_RST_CPU0_RESETL_N","FAN_1_PRSNT_R1_N_OUT", 824*9237e0a2SFred Chen "RST_CPU0_PERST0_R_N","FAN_2_PRSNT_R1_N_OUT", 825*9237e0a2SFred Chen /*D4-D7 line 56-63*/ 826*9237e0a2SFred Chen "RST_CPU0_PERST1_R_N","FAN_3_PRSNT_R1_N_OUT", 827*9237e0a2SFred Chen "BIOS_POST_CMPLT","FAN_4_PRSNT_R1_N_OUT", 828*9237e0a2SFred Chen "","FAN_5_PRSNT_R1_N_OUT", 829*9237e0a2SFred Chen "","FAN_6_PRSNT_R1_N_OUT", 830*9237e0a2SFred Chen /*E0-E3 line 64-71*/ 831*9237e0a2SFred Chen "FM_PWRGD_CHAD_CPU0","FAN_7_PRSNT_R1_N_OUT", 832*9237e0a2SFred Chen "FM_PWRGD_CHEH_CPU0","TRAY_SLOT_ID0_OUT", 833*9237e0a2SFred Chen "FM_PWRGD_CHIL_CPU0","TRAY_SLOT_ID1_OUT", 834*9237e0a2SFred Chen "FM_PWRGD_CHMP_CPU0","TRAY_SLOT_ID2_OUT", 835*9237e0a2SFred Chen /*E4-E7 line 72-79*/ 836*9237e0a2SFred Chen "P12V_E1S_0_PWRGD","TRAY_SLOT_ID3_OUT", 837*9237e0a2SFred Chen "P12V_E1S_1_PWRGD","TRAY_SLOT_ID4_OUT", 838*9237e0a2SFred Chen "P3V3_E1S_0_PWRGD","SCM_JTAG_MUX_S0_R", 839*9237e0a2SFred Chen "P3V3_E1S_1_PWRGD","SCM_JTAG_MUX_S1_R", 840*9237e0a2SFred Chen /*F0-F3 line 80-87*/ 841*9237e0a2SFred Chen "FM_MODULE_PWRGD_0A","BMC_SGPIO_READY", 842*9237e0a2SFred Chen "OCP_V3_1_P3V3_PLD_R_PWRGD","CPU0_SYS_RESET_N", 843*9237e0a2SFred Chen "P12V_OCP_V3_1_PLD_PWRGD","RST_CPU0_KBRST_N", 844*9237e0a2SFred Chen "PWRGD_OCP_SFF_PWR_GOOD","BIOS_DEBUG_MODE", 845*9237e0a2SFred Chen /*F4-F7 line 88-95*/ 846*9237e0a2SFred Chen "","CLR_CMOS", 847*9237e0a2SFred Chen "","I3C_SPD_MUX_FORCE_SEL", 848*9237e0a2SFred Chen "","FM_JTAG_HOST_SEL", 849*9237e0a2SFred Chen "","TRAY_PRESENT_N", 850*9237e0a2SFred Chen /*G0-G3 line 96-103*/ 851*9237e0a2SFred Chen "MB_REV_ID_0","UART_BMC_SEL0", 852*9237e0a2SFred Chen "MB_REV_ID_1","UART_BMC_SEL1", 853*9237e0a2SFred Chen "MB_REV_ID_2","SCM_USB_SEL", 854*9237e0a2SFred Chen "MB_SKU_ID_0","FORCE_ALL_PWRON", 855*9237e0a2SFred Chen /*G4-G7 line 104-111*/ 856*9237e0a2SFred Chen "MB_SKU_ID_1","PASSWORD_CLEAR", 857*9237e0a2SFred Chen "MB_SKU_ID_2","", 858*9237e0a2SFred Chen "MB_SKU_ID_3","", 859*9237e0a2SFred Chen "","BIOS_DEBUG_MODE", 860*9237e0a2SFred Chen /*H0-H3 line 112-119*/ 861*9237e0a2SFred Chen "FM_IOEXP_U538_INT_N","", 862*9237e0a2SFred Chen "FM_IOEXP_U539_INT_N","", 863*9237e0a2SFred Chen "FM_IOEXP_U540_INT_N","", 864*9237e0a2SFred Chen "FM_IOEXP_U541_INT_N","", 865*9237e0a2SFred Chen /*H4-H7 line 120-127*/ 866*9237e0a2SFred Chen "FM_IOEXP_PDB2_U1003_INT_N","", 867*9237e0a2SFred Chen "","","","","","", 868*9237e0a2SFred Chen /*I0-I3 line 128-135*/ 869*9237e0a2SFred Chen "","","","", 870*9237e0a2SFred Chen "PDB_IRQ_PMBUS_ALERT_ISO_R_N","", 871*9237e0a2SFred Chen "PDB_UV_ALERT_ISO_R_N","", 872*9237e0a2SFred Chen /*I4-I7 line 136-143*/ 873*9237e0a2SFred Chen "P12V_SCM_ADC_ALERT","", 874*9237e0a2SFred Chen "CPU0_REGS_I2C_ALERT_N","", 875*9237e0a2SFred Chen "FM_RTC_ALERT_N","", 876*9237e0a2SFred Chen "APML_CPU0_ALERT_R_N","", 877*9237e0a2SFred Chen /*J0-J3 line 144-151*/ 878*9237e0a2SFred Chen "SMB_RJ45_FIO_TMP_ALERT","", 879*9237e0a2SFred Chen "FM_SMB_ALERT_MCIO_0A_N","", 880*9237e0a2SFred Chen "I3C_MCIO_0B_ALERT_ISO_R_N","", 881*9237e0a2SFred Chen "FM_SMB_ALERT_MCIO_1A_N","", 882*9237e0a2SFred Chen /*J4-J7 line 152-159*/ 883*9237e0a2SFred Chen "I3C_MCIO_1B_ALERT_ISO_R_N","", 884*9237e0a2SFred Chen "FM_SMB_ALERT_MCIO_2A_N","", 885*9237e0a2SFred Chen "I3C_MCIO_2B_ALERT_ISO_R_N","", 886*9237e0a2SFred Chen "FM_SMB_ALERT_MCIO_3A_N","", 887*9237e0a2SFred Chen /*K0-K3 line 160-167*/ 888*9237e0a2SFred Chen "I3C_MCIO_3B_ALERT_ISO_R_N","", 889*9237e0a2SFred Chen "FM_SMB_ALERT_MCIO_4A_N","", 890*9237e0a2SFred Chen "I3C_MCIO_4B_ALERT_ISO_R_N","", 891*9237e0a2SFred Chen "","", 892*9237e0a2SFred Chen /*K4-K7 line 168-175*/ 893*9237e0a2SFred Chen "","","","","","","","", 894*9237e0a2SFred Chen /*L0-L3 line 176-183*/ 895*9237e0a2SFred Chen "FM_CPU0_THERMTRIP_N","", 896*9237e0a2SFred Chen "FM_CPU0_PROCHOT_N","", 897*9237e0a2SFred Chen "FM_CPU0_SMERR_N","", 898*9237e0a2SFred Chen "FM_PVDDCR_CPU0_P0_OCP_N","", 899*9237e0a2SFred Chen /*L4-L7 line 184-191*/ 900*9237e0a2SFred Chen "FM_PVDDCR_CPU1_P0_OCP_N","", 901*9237e0a2SFred Chen "FM_PVDDCR_SOC_P0_OCP_N","", 902*9237e0a2SFred Chen "FM_OCP_PWRBRK_R_N","", 903*9237e0a2SFred Chen "PMIC_ERROR_N","", 904*9237e0a2SFred Chen /*M0-M3 line 192-199*/ 905*9237e0a2SFred Chen "","","","","","","","", 906*9237e0a2SFred Chen /*M4-M7 line 200-207*/ 907*9237e0a2SFred Chen "","","","","","","","", 908*9237e0a2SFred Chen /*N0-N3 line 208-215*/ 909*9237e0a2SFred Chen "FM_PRSNT_CPU0_N","", 910*9237e0a2SFred Chen "OCP_SFF_PRSNT_N","", 911*9237e0a2SFred Chen "E1S_0_PRSNT_R_N","", 912*9237e0a2SFred Chen "E1S_BP_0_PRSNT_R_N","", 913*9237e0a2SFred Chen /*N4-N7 line 216-223*/ 914*9237e0a2SFred Chen "E1S_BP_1_PRSNT_R_N","", 915*9237e0a2SFred Chen "E1S_BP_2_PRSNT_R_N","", 916*9237e0a2SFred Chen "E1S_BP_3_PRSNT_R_N","", 917*9237e0a2SFred Chen "PDB_PRSNT_J311_N","", 918*9237e0a2SFred Chen /*O0-O3 line 224-231*/ 919*9237e0a2SFred Chen "PDB_PRSNT_J312_N","", 920*9237e0a2SFred Chen "PDB_PRSNT_J313_N","", 921*9237e0a2SFred Chen "PDB_PRSNT_J314_N","", 922*9237e0a2SFred Chen "PRSNT_RJ45_FIO_N_R","", 923*9237e0a2SFred Chen /*O4-O7 line 232-239*/ 924*9237e0a2SFred Chen "PRSNT_LEAK_CABLE_1_R_N","", 925*9237e0a2SFred Chen "PRSNT_LEAK_CABLE_2_R_N","", 926*9237e0a2SFred Chen "PRSNT_HDT_N","", 927*9237e0a2SFred Chen "","", 928*9237e0a2SFred Chen /*P0-P3 line 240-247*/ 929*9237e0a2SFred Chen "","","","","","","","", 930*9237e0a2SFred Chen /*P4-P7 line 248-255*/ 931*9237e0a2SFred Chen "","","","","","","",""; 932*9237e0a2SFred Chen status = "okay"; 933*9237e0a2SFred Chen}; 934*9237e0a2SFred Chen 935*9237e0a2SFred Chen// BIOS Flash 936*9237e0a2SFred Chen&spi2 { 937*9237e0a2SFred Chen pinctrl-names = "default"; 938*9237e0a2SFred Chen pinctrl-0 = <&pinctrl_spi2_default>; 939*9237e0a2SFred Chen status = "okay"; 940*9237e0a2SFred Chen 941*9237e0a2SFred Chen flash@0 { 942*9237e0a2SFred Chen m25p,fast-read; 943*9237e0a2SFred Chen label = "pnor"; 944*9237e0a2SFred Chen spi-max-frequency = <12000000>; 945*9237e0a2SFred Chen spi-tx-bus-width = <2>; 946*9237e0a2SFred Chen spi-rx-bus-width = <2>; 947*9237e0a2SFred Chen status = "okay"; 948*9237e0a2SFred Chen }; 949*9237e0a2SFred Chen}; 950*9237e0a2SFred Chen 951*9237e0a2SFred Chen// HOST BIOS Debug 952*9237e0a2SFred Chen&uart1 { 953*9237e0a2SFred Chen status = "okay"; 954*9237e0a2SFred Chen}; 955*9237e0a2SFred Chen 956*9237e0a2SFred Chen&uart3 { 957*9237e0a2SFred Chen status = "okay"; 958*9237e0a2SFred Chen}; 959*9237e0a2SFred Chen 960*9237e0a2SFred Chen&uart4 { 961*9237e0a2SFred Chen status = "okay"; 962*9237e0a2SFred Chen}; 963*9237e0a2SFred Chen 964*9237e0a2SFred Chen// BMC Debug Console 965*9237e0a2SFred Chen&uart5 { 966*9237e0a2SFred Chen status = "okay"; 967*9237e0a2SFred Chen}; 968*9237e0a2SFred Chen 969*9237e0a2SFred Chen&uart_routing { 970*9237e0a2SFred Chen status = "okay"; 971*9237e0a2SFred Chen}; 972*9237e0a2SFred Chen 973*9237e0a2SFred Chen&wdt1 { 974*9237e0a2SFred Chen pinctrl-names = "default"; 975*9237e0a2SFred Chen pinctrl-0 = <&pinctrl_wdtrst1_default>; 976*9237e0a2SFred Chen aspeed,reset-type = "soc"; 977*9237e0a2SFred Chen aspeed,external-signal; 978*9237e0a2SFred Chen aspeed,ext-push-pull; 979*9237e0a2SFred Chen aspeed,ext-active-high; 980*9237e0a2SFred Chen aspeed,ext-pulse-duration = <256>; 981*9237e0a2SFred Chen status = "okay"; 982*9237e0a2SFred Chen}; 983