1*12b7b2bfSNeil Cheng// SPDX-License-Identifier: GPL-2.0+ 2*12b7b2bfSNeil Cheng// Copyright (c) 2026 Facebook Inc. 3*12b7b2bfSNeil Cheng 4*12b7b2bfSNeil Cheng/dts-v1/; 5*12b7b2bfSNeil Cheng#include "aspeed-g6.dtsi" 6*12b7b2bfSNeil Cheng#include <dt-bindings/gpio/aspeed-gpio.h> 7*12b7b2bfSNeil Cheng#include <dt-bindings/i2c/i2c.h> 8*12b7b2bfSNeil Cheng 9*12b7b2bfSNeil Cheng/ { 10*12b7b2bfSNeil Cheng model = "Facebook Rainier BMC"; 11*12b7b2bfSNeil Cheng compatible = "facebook,rainiera6-bmc", "aspeed,ast2600"; 12*12b7b2bfSNeil Cheng 13*12b7b2bfSNeil Cheng aliases { 14*12b7b2bfSNeil Cheng i2c16 = &i2c5mux0ch0; 15*12b7b2bfSNeil Cheng i2c17 = &i2c5mux0ch1; 16*12b7b2bfSNeil Cheng i2c18 = &i2c5mux1ch0; 17*12b7b2bfSNeil Cheng i2c19 = &i2c5mux1ch1; 18*12b7b2bfSNeil Cheng i2c20 = &i2c6mux0ch0; 19*12b7b2bfSNeil Cheng i2c21 = &i2c6mux0ch1; 20*12b7b2bfSNeil Cheng i2c22 = &i2c6mux0ch2; 21*12b7b2bfSNeil Cheng i2c23 = &i2c6mux0ch3; 22*12b7b2bfSNeil Cheng i2c24 = &i2c8mux0ch0; 23*12b7b2bfSNeil Cheng i2c25 = &i2c8mux0ch1; 24*12b7b2bfSNeil Cheng i2c26 = &i2c8mux0ch2; 25*12b7b2bfSNeil Cheng i2c27 = &i2c8mux0ch3; 26*12b7b2bfSNeil Cheng i2c28 = &i2c26mux0ch0; 27*12b7b2bfSNeil Cheng i2c29 = &i2c26mux0ch1; 28*12b7b2bfSNeil Cheng i2c30 = &i2c26mux0ch2; 29*12b7b2bfSNeil Cheng i2c31 = &i2c26mux0ch3; 30*12b7b2bfSNeil Cheng serial0 = &uart1; 31*12b7b2bfSNeil Cheng serial2 = &uart3; 32*12b7b2bfSNeil Cheng serial3 = &uart4; 33*12b7b2bfSNeil Cheng serial4 = &uart5; 34*12b7b2bfSNeil Cheng }; 35*12b7b2bfSNeil Cheng 36*12b7b2bfSNeil Cheng chosen { 37*12b7b2bfSNeil Cheng stdout-path = "serial4:57600n8"; 38*12b7b2bfSNeil Cheng }; 39*12b7b2bfSNeil Cheng 40*12b7b2bfSNeil Cheng iio-hwmon { 41*12b7b2bfSNeil Cheng compatible = "iio-hwmon"; 42*12b7b2bfSNeil Cheng io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, 43*12b7b2bfSNeil Cheng <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, 44*12b7b2bfSNeil Cheng <&adc1 2>; 45*12b7b2bfSNeil Cheng }; 46*12b7b2bfSNeil Cheng 47*12b7b2bfSNeil Cheng leds { 48*12b7b2bfSNeil Cheng compatible = "gpio-leds"; 49*12b7b2bfSNeil Cheng 50*12b7b2bfSNeil Cheng led-0 { 51*12b7b2bfSNeil Cheng label = "bmc_heartbeat_amber"; 52*12b7b2bfSNeil Cheng gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; 53*12b7b2bfSNeil Cheng linux,default-trigger = "heartbeat"; 54*12b7b2bfSNeil Cheng }; 55*12b7b2bfSNeil Cheng 56*12b7b2bfSNeil Cheng led-1 { 57*12b7b2bfSNeil Cheng label = "fp_id_amber"; 58*12b7b2bfSNeil Cheng default-state = "off"; 59*12b7b2bfSNeil Cheng gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>; 60*12b7b2bfSNeil Cheng }; 61*12b7b2bfSNeil Cheng 62*12b7b2bfSNeil Cheng led-2 { 63*12b7b2bfSNeil Cheng label = "power_fault_amber"; 64*12b7b2bfSNeil Cheng default-state = "off"; 65*12b7b2bfSNeil Cheng gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>; 66*12b7b2bfSNeil Cheng }; 67*12b7b2bfSNeil Cheng }; 68*12b7b2bfSNeil Cheng 69*12b7b2bfSNeil Cheng memory@80000000 { 70*12b7b2bfSNeil Cheng device_type = "memory"; 71*12b7b2bfSNeil Cheng reg = <0x80000000 0x80000000>; 72*12b7b2bfSNeil Cheng }; 73*12b7b2bfSNeil Cheng 74*12b7b2bfSNeil Cheng p1v8_adc_vref: regulator-p1v8-aux { 75*12b7b2bfSNeil Cheng compatible = "regulator-fixed"; 76*12b7b2bfSNeil Cheng regulator-name = "p1v8_adc_vref"; 77*12b7b2bfSNeil Cheng regulator-min-microvolt = <1800000>; 78*12b7b2bfSNeil Cheng regulator-max-microvolt = <1800000>; 79*12b7b2bfSNeil Cheng regulator-always-on; 80*12b7b2bfSNeil Cheng }; 81*12b7b2bfSNeil Cheng 82*12b7b2bfSNeil Cheng spi_gpio: spi { 83*12b7b2bfSNeil Cheng compatible = "spi-gpio"; 84*12b7b2bfSNeil Cheng #address-cells = <1>; 85*12b7b2bfSNeil Cheng #size-cells = <0>; 86*12b7b2bfSNeil Cheng 87*12b7b2bfSNeil Cheng sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 88*12b7b2bfSNeil Cheng mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; 89*12b7b2bfSNeil Cheng miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>; 90*12b7b2bfSNeil Cheng cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; 91*12b7b2bfSNeil Cheng num-chipselects = <1>; 92*12b7b2bfSNeil Cheng status = "okay"; 93*12b7b2bfSNeil Cheng 94*12b7b2bfSNeil Cheng tpm@0 { 95*12b7b2bfSNeil Cheng compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; 96*12b7b2bfSNeil Cheng spi-max-frequency = <33000000>; 97*12b7b2bfSNeil Cheng reg = <0>; 98*12b7b2bfSNeil Cheng }; 99*12b7b2bfSNeil Cheng }; 100*12b7b2bfSNeil Cheng}; 101*12b7b2bfSNeil Cheng 102*12b7b2bfSNeil Cheng&adc0 { 103*12b7b2bfSNeil Cheng vref-supply = <&p1v8_adc_vref>; 104*12b7b2bfSNeil Cheng pinctrl-names = "default"; 105*12b7b2bfSNeil Cheng pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default 106*12b7b2bfSNeil Cheng &pinctrl_adc2_default &pinctrl_adc3_default 107*12b7b2bfSNeil Cheng &pinctrl_adc4_default &pinctrl_adc5_default 108*12b7b2bfSNeil Cheng &pinctrl_adc6_default &pinctrl_adc7_default>; 109*12b7b2bfSNeil Cheng status = "okay"; 110*12b7b2bfSNeil Cheng}; 111*12b7b2bfSNeil Cheng 112*12b7b2bfSNeil Cheng&adc1 { 113*12b7b2bfSNeil Cheng aspeed,int-vref-microvolt = <2500000>; 114*12b7b2bfSNeil Cheng pinctrl-names = "default"; 115*12b7b2bfSNeil Cheng pinctrl-0 = <&pinctrl_adc10_default>; 116*12b7b2bfSNeil Cheng status = "okay"; 117*12b7b2bfSNeil Cheng}; 118*12b7b2bfSNeil Cheng 119*12b7b2bfSNeil Cheng&ehci0 { 120*12b7b2bfSNeil Cheng status = "okay"; 121*12b7b2bfSNeil Cheng}; 122*12b7b2bfSNeil Cheng 123*12b7b2bfSNeil Cheng&ehci1 { 124*12b7b2bfSNeil Cheng status = "okay"; 125*12b7b2bfSNeil Cheng}; 126*12b7b2bfSNeil Cheng 127*12b7b2bfSNeil Cheng&fmc { 128*12b7b2bfSNeil Cheng status = "okay"; 129*12b7b2bfSNeil Cheng 130*12b7b2bfSNeil Cheng flash@0 { 131*12b7b2bfSNeil Cheng status = "okay"; 132*12b7b2bfSNeil Cheng m25p,fast-read; 133*12b7b2bfSNeil Cheng label = "bmc"; 134*12b7b2bfSNeil Cheng spi-max-frequency = <50000000>; 135*12b7b2bfSNeil Cheng#include "openbmc-flash-layout-128.dtsi" 136*12b7b2bfSNeil Cheng }; 137*12b7b2bfSNeil Cheng 138*12b7b2bfSNeil Cheng flash@1 { 139*12b7b2bfSNeil Cheng status = "okay"; 140*12b7b2bfSNeil Cheng m25p,fast-read; 141*12b7b2bfSNeil Cheng label = "alt-bmc"; 142*12b7b2bfSNeil Cheng spi-max-frequency = <50000000>; 143*12b7b2bfSNeil Cheng }; 144*12b7b2bfSNeil Cheng}; 145*12b7b2bfSNeil Cheng 146*12b7b2bfSNeil Cheng&gpio0 { 147*12b7b2bfSNeil Cheng gpio-line-names = 148*12b7b2bfSNeil Cheng /*A0-A7*/ "","","","","","","","", 149*12b7b2bfSNeil Cheng /*B0-B7*/ "BATTERY_DETECT","","BMC_I2C1_FPGA_ALERT_L","BMC_READY_R", 150*12b7b2bfSNeil Cheng "IOEXP_INT_3V3_L_R1","FM_ID_LED","","", 151*12b7b2bfSNeil Cheng /*C0-C7*/ "BMC_GPIOC0","","","","PMBUS_REQ_N","PSU_FW_UPDATE_REQ_N","", 152*12b7b2bfSNeil Cheng "BMC_I2C_SSIF_ALERT_L", 153*12b7b2bfSNeil Cheng /*D0-D7*/ "","","","","BMC_GPIOD4","","","", 154*12b7b2bfSNeil Cheng /*E0-E7*/ "BMC_GPIOE0","BMC_GPIOE1","","","","","","", 155*12b7b2bfSNeil Cheng /*F0-F7*/ "","","","","","","","", 156*12b7b2bfSNeil Cheng /*G0-G7*/ "FM_BMC_MUX1_SEL_R","","","","","","FM_DEBUG_PORT_PRSNT_R1_N", 157*12b7b2bfSNeil Cheng "FM_BMC_DBP_PRESENT_R_N", 158*12b7b2bfSNeil Cheng /*H0-H7*/ "","","","","","","","", 159*12b7b2bfSNeil Cheng /*I0-I7*/ "","","","","","FLASH_WP_STATUS_R1","BMC_JTAG_MUX_SEL","", 160*12b7b2bfSNeil Cheng /*J0-J7*/ "","","","","","","","", 161*12b7b2bfSNeil Cheng /*K0-K7*/ "","","","","","","","", 162*12b7b2bfSNeil Cheng /*L0-L7*/ "","","","","","","","", 163*12b7b2bfSNeil Cheng /*M0-M7*/ "PCIE_EP_RST_EN","BMC_FRU_WP","SCM_HPM_STBY_RST_N", 164*12b7b2bfSNeil Cheng "SCM_HPM_STBY_R_EN","STBY_POWER_PG_3V3_R","TH500_SHDN_OK_L","","", 165*12b7b2bfSNeil Cheng /*N0-N7*/ "LED_POSTCODE_0","LED_POSTCODE_1","LED_POSTCODE_2", 166*12b7b2bfSNeil Cheng "LED_POSTCODE_3","LED_POSTCODE_4","LED_POSTCODE_5", 167*12b7b2bfSNeil Cheng "LED_POSTCODE_6","LED_POSTCODE_7", 168*12b7b2bfSNeil Cheng /*O0-O7*/ "RUN_POWER_PG","PWR_BRAKE_L","CHASSIS_AC_LOSS_L", 169*12b7b2bfSNeil Cheng "BSM_PRSNT_R_N","PSU_SMB_ALERT_L","FM_TPM_PRSNT_0_N", 170*12b7b2bfSNeil Cheng "PSU_FW_UPDATING_N","DEBUG_CARD_BYPASS", 171*12b7b2bfSNeil Cheng /*P0-P7*/ "PWR_BTN_BMC_R1_N","IPEX_CABLE_PRSNT_L","ID_RST_BTN_BMC_R_N", 172*12b7b2bfSNeil Cheng "RST_BMC_RSTBTN_OUT_R_N","BMC_PWR_LED","RUN_POWER_EN", 173*12b7b2bfSNeil Cheng "SHDN_FORCE_L","BMC_HEARTBEAT_N", 174*12b7b2bfSNeil Cheng /*Q0-Q7*/ "IRQ_PCH_TPM_SPI_LV3_N","USB_OC0_REAR_R_N","UART_MUX_SEL", 175*12b7b2bfSNeil Cheng "I2C_MUX_RESET_L","RSVD_NV_PLT_DETECT","SPI_TPM_INT_L", 176*12b7b2bfSNeil Cheng "CPU_JTAG_MUX_SELECT","THERM_BB_OVERT_L", 177*12b7b2bfSNeil Cheng /*R0-R7*/ "THERM_BB_WARN_L","SPI_BMC_FPGA_INT_L","CPU_BOOT_DONE", 178*12b7b2bfSNeil Cheng "PMBUS_GNT_L","CHASSIS_PWR_BRK_L","PCIE_WAKE_L","PDB_THERM_OVERT_L", 179*12b7b2bfSNeil Cheng "SHDN_REQ_L", 180*12b7b2bfSNeil Cheng /*S0-S7*/ "","","SYS_BMC_PWRBTN_R_N","FM_TPM_PRSNT_1_N", 181*12b7b2bfSNeil Cheng "FM_BMC_DEBUG_SW_N","UID_LED_N","SYS_FAULT_LED_N", 182*12b7b2bfSNeil Cheng "RUN_POWER_FAULT_L", 183*12b7b2bfSNeil Cheng /*T0-T7*/ "","","","","","","","", 184*12b7b2bfSNeil Cheng /*U0-U7*/ "","","","","","","","", 185*12b7b2bfSNeil Cheng /*V0-V7*/ "L2_RST_REQ_OUT_L","L0L1_RST_REQ_OUT_L","BMC_ID_BEEP_SEL_R1", 186*12b7b2bfSNeil Cheng "BMC_I2C0_FPGA_ALERT_L","SMB_BMC_TMP_ALERT","PWR_LED_N", 187*12b7b2bfSNeil Cheng "SYS_RST_OUT_L","IRQ_TPM_SPI_N", 188*12b7b2bfSNeil Cheng /*W0-W7*/ "","","","","","","","", 189*12b7b2bfSNeil Cheng /*X0-X7*/ "","FM_DBP_CPU_PREQ_GF_N_R1","","","","","","", 190*12b7b2bfSNeil Cheng /*Y0-Y7*/ "","RST_BMC_SELF_HW_R1","FM_FLASH_LATCH_N_R1","", 191*12b7b2bfSNeil Cheng "BMC_GPIOY4_R","BMC_GPIOY5_R","","", 192*12b7b2bfSNeil Cheng /*Z0-Z7*/ "","","","","","","BMC_GPIOZ6_R","BMC_GPIOZ7_R"; 193*12b7b2bfSNeil Cheng}; 194*12b7b2bfSNeil Cheng 195*12b7b2bfSNeil Cheng&gpio1 { 196*12b7b2bfSNeil Cheng gpio-line-names = 197*12b7b2bfSNeil Cheng /*18A0-18A7*/ "","","","","","","","", 198*12b7b2bfSNeil Cheng /*18B0-18B7*/ "","","","","FM_BOARD_BMC_REV_ID0","FM_BOARD_BMC_REV_ID1", 199*12b7b2bfSNeil Cheng "FM_BOARD_BMC_REV_ID2","", 200*12b7b2bfSNeil Cheng /*18C0-18C7*/ "","","SPI_BMC_BIOS_ROM_IRQ0_R_N","","","","","", 201*12b7b2bfSNeil Cheng /*18D0-18D7*/ "","","","","","","","", 202*12b7b2bfSNeil Cheng /*18E0-18E3*/ "FM_BMC_PROT_LS_EN","AC_PWR_BMC_BTN_R_N","",""; 203*12b7b2bfSNeil Cheng}; 204*12b7b2bfSNeil Cheng 205*12b7b2bfSNeil Cheng/* Rainiera6 SoC SSIF */ 206*12b7b2bfSNeil Cheng&i2c1 { 207*12b7b2bfSNeil Cheng status = "okay"; 208*12b7b2bfSNeil Cheng 209*12b7b2bfSNeil Cheng ssif_bmc: ssif-bmc@10 { 210*12b7b2bfSNeil Cheng compatible = "ssif-bmc"; 211*12b7b2bfSNeil Cheng reg = <0x10>; 212*12b7b2bfSNeil Cheng status = "okay"; 213*12b7b2bfSNeil Cheng }; 214*12b7b2bfSNeil Cheng}; 215*12b7b2bfSNeil Cheng 216*12b7b2bfSNeil Cheng/* MCIO 2A I2C */ 217*12b7b2bfSNeil Cheng&i2c2 { 218*12b7b2bfSNeil Cheng status = "okay"; 219*12b7b2bfSNeil Cheng}; 220*12b7b2bfSNeil Cheng 221*12b7b2bfSNeil Cheng&i2c4 { 222*12b7b2bfSNeil Cheng multi-master; 223*12b7b2bfSNeil Cheng mctp-controller; 224*12b7b2bfSNeil Cheng clock-frequency = <400000>; 225*12b7b2bfSNeil Cheng status = "okay"; 226*12b7b2bfSNeil Cheng 227*12b7b2bfSNeil Cheng mctp@10 { 228*12b7b2bfSNeil Cheng compatible = "mctp-i2c-controller"; 229*12b7b2bfSNeil Cheng reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 230*12b7b2bfSNeil Cheng }; 231*12b7b2bfSNeil Cheng 232*12b7b2bfSNeil Cheng /* OCP NIC TEMP */ 233*12b7b2bfSNeil Cheng temperature-sensor@1f { 234*12b7b2bfSNeil Cheng compatible = "ti,tmp421"; 235*12b7b2bfSNeil Cheng reg = <0x1f>; 236*12b7b2bfSNeil Cheng }; 237*12b7b2bfSNeil Cheng 238*12b7b2bfSNeil Cheng /* OCP NIC FRU EEPROM */ 239*12b7b2bfSNeil Cheng eeprom@50 { 240*12b7b2bfSNeil Cheng compatible = "atmel,24c64"; 241*12b7b2bfSNeil Cheng reg = <0x50>; 242*12b7b2bfSNeil Cheng }; 243*12b7b2bfSNeil Cheng}; 244*12b7b2bfSNeil Cheng 245*12b7b2bfSNeil Cheng&i2c5 { 246*12b7b2bfSNeil Cheng status = "okay"; 247*12b7b2bfSNeil Cheng 248*12b7b2bfSNeil Cheng gpio-expander@22 { 249*12b7b2bfSNeil Cheng compatible = "nxp,pca9535"; 250*12b7b2bfSNeil Cheng reg = <0x22>; 251*12b7b2bfSNeil Cheng gpio-controller; 252*12b7b2bfSNeil Cheng #gpio-cells = <2>; 253*12b7b2bfSNeil Cheng gpio-line-names = 254*12b7b2bfSNeil Cheng "JTAG_BMC_IOEXP_MUX_OE", "JTAG_BMC_MCIO_MUX_S1", 255*12b7b2bfSNeil Cheng "JTAG_BMC_MCIO_MUX_S0", "JTAG_IOEXP_BMC_MUX_SEL", 256*12b7b2bfSNeil Cheng "FM_USB_MUX_1_OE_N", "FM_USB_MUX_2_OE_N", 257*12b7b2bfSNeil Cheng "PROGRAMN_CPLD", "", 258*12b7b2bfSNeil Cheng "", "", 259*12b7b2bfSNeil Cheng "", "", 260*12b7b2bfSNeil Cheng "", "", 261*12b7b2bfSNeil Cheng "", ""; 262*12b7b2bfSNeil Cheng }; 263*12b7b2bfSNeil Cheng 264*12b7b2bfSNeil Cheng /* I2C MUX for MCIO 1A */ 265*12b7b2bfSNeil Cheng i2c-mux@70 { 266*12b7b2bfSNeil Cheng compatible = "nxp,pca9546"; 267*12b7b2bfSNeil Cheng reg = <0x70>; 268*12b7b2bfSNeil Cheng #address-cells = <1>; 269*12b7b2bfSNeil Cheng #size-cells = <0>; 270*12b7b2bfSNeil Cheng i2c-mux-idle-disconnect; 271*12b7b2bfSNeil Cheng 272*12b7b2bfSNeil Cheng i2c5mux0ch0: i2c@0 { 273*12b7b2bfSNeil Cheng reg = <0>; 274*12b7b2bfSNeil Cheng #address-cells = <1>; 275*12b7b2bfSNeil Cheng #size-cells = <0>; 276*12b7b2bfSNeil Cheng }; 277*12b7b2bfSNeil Cheng 278*12b7b2bfSNeil Cheng i2c5mux0ch1: i2c@1 { 279*12b7b2bfSNeil Cheng reg = <1>; 280*12b7b2bfSNeil Cheng #address-cells = <1>; 281*12b7b2bfSNeil Cheng #size-cells = <0>; 282*12b7b2bfSNeil Cheng }; 283*12b7b2bfSNeil Cheng }; 284*12b7b2bfSNeil Cheng 285*12b7b2bfSNeil Cheng /* I2C MUX for MCIO 0A */ 286*12b7b2bfSNeil Cheng i2c-mux@77 { 287*12b7b2bfSNeil Cheng compatible = "nxp,pca9546"; 288*12b7b2bfSNeil Cheng reg = <0x77>; 289*12b7b2bfSNeil Cheng #address-cells = <1>; 290*12b7b2bfSNeil Cheng #size-cells = <0>; 291*12b7b2bfSNeil Cheng i2c-mux-idle-disconnect; 292*12b7b2bfSNeil Cheng 293*12b7b2bfSNeil Cheng i2c5mux1ch0: i2c@0 { 294*12b7b2bfSNeil Cheng reg = <0>; 295*12b7b2bfSNeil Cheng #address-cells = <1>; 296*12b7b2bfSNeil Cheng #size-cells = <0>; 297*12b7b2bfSNeil Cheng }; 298*12b7b2bfSNeil Cheng 299*12b7b2bfSNeil Cheng i2c5mux1ch1: i2c@1 { 300*12b7b2bfSNeil Cheng reg = <1>; 301*12b7b2bfSNeil Cheng #address-cells = <1>; 302*12b7b2bfSNeil Cheng #size-cells = <0>; 303*12b7b2bfSNeil Cheng }; 304*12b7b2bfSNeil Cheng }; 305*12b7b2bfSNeil Cheng}; 306*12b7b2bfSNeil Cheng 307*12b7b2bfSNeil Cheng&i2c6 { 308*12b7b2bfSNeil Cheng status = "okay"; 309*12b7b2bfSNeil Cheng 310*12b7b2bfSNeil Cheng /* I2C MUX for PWRPIC #13 ~ #16 */ 311*12b7b2bfSNeil Cheng i2c-mux@77 { 312*12b7b2bfSNeil Cheng compatible = "nxp,pca9546"; 313*12b7b2bfSNeil Cheng reg = <0x77>; 314*12b7b2bfSNeil Cheng #address-cells = <1>; 315*12b7b2bfSNeil Cheng #size-cells = <0>; 316*12b7b2bfSNeil Cheng i2c-mux-idle-disconnect; 317*12b7b2bfSNeil Cheng 318*12b7b2bfSNeil Cheng /* PWRPIC #13 */ 319*12b7b2bfSNeil Cheng i2c6mux0ch0: i2c@0 { 320*12b7b2bfSNeil Cheng reg = <0>; 321*12b7b2bfSNeil Cheng #address-cells = <1>; 322*12b7b2bfSNeil Cheng #size-cells = <0>; 323*12b7b2bfSNeil Cheng }; 324*12b7b2bfSNeil Cheng 325*12b7b2bfSNeil Cheng /* PWRPIC #14 */ 326*12b7b2bfSNeil Cheng i2c6mux0ch1: i2c@1 { 327*12b7b2bfSNeil Cheng reg = <1>; 328*12b7b2bfSNeil Cheng #address-cells = <1>; 329*12b7b2bfSNeil Cheng #size-cells = <0>; 330*12b7b2bfSNeil Cheng }; 331*12b7b2bfSNeil Cheng 332*12b7b2bfSNeil Cheng /* PWRPIC #16 */ 333*12b7b2bfSNeil Cheng i2c6mux0ch2: i2c@2 { 334*12b7b2bfSNeil Cheng reg = <2>; 335*12b7b2bfSNeil Cheng #address-cells = <1>; 336*12b7b2bfSNeil Cheng #size-cells = <0>; 337*12b7b2bfSNeil Cheng }; 338*12b7b2bfSNeil Cheng 339*12b7b2bfSNeil Cheng /* PWRPIC #15 */ 340*12b7b2bfSNeil Cheng i2c6mux0ch3: i2c@3 { 341*12b7b2bfSNeil Cheng reg = <3>; 342*12b7b2bfSNeil Cheng #address-cells = <1>; 343*12b7b2bfSNeil Cheng #size-cells = <0>; 344*12b7b2bfSNeil Cheng }; 345*12b7b2bfSNeil Cheng }; 346*12b7b2bfSNeil Cheng}; 347*12b7b2bfSNeil Cheng 348*12b7b2bfSNeil Cheng&i2c7 { 349*12b7b2bfSNeil Cheng multi-master; 350*12b7b2bfSNeil Cheng status = "okay"; 351*12b7b2bfSNeil Cheng 352*12b7b2bfSNeil Cheng ipmb@10 { 353*12b7b2bfSNeil Cheng compatible = "ipmb-dev"; 354*12b7b2bfSNeil Cheng reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 355*12b7b2bfSNeil Cheng i2c-protocol; 356*12b7b2bfSNeil Cheng }; 357*12b7b2bfSNeil Cheng}; 358*12b7b2bfSNeil Cheng 359*12b7b2bfSNeil Cheng&i2c8 { 360*12b7b2bfSNeil Cheng status = "okay"; 361*12b7b2bfSNeil Cheng 362*12b7b2bfSNeil Cheng power-monitor@14 { 363*12b7b2bfSNeil Cheng compatible = "infineon,xdp710"; 364*12b7b2bfSNeil Cheng reg = <0x14>; 365*12b7b2bfSNeil Cheng }; 366*12b7b2bfSNeil Cheng 367*12b7b2bfSNeil Cheng adc@1d { 368*12b7b2bfSNeil Cheng compatible = "ti,adc128d818"; 369*12b7b2bfSNeil Cheng reg = <0x1d>; 370*12b7b2bfSNeil Cheng ti,mode = /bits/ 8 <1>; 371*12b7b2bfSNeil Cheng }; 372*12b7b2bfSNeil Cheng 373*12b7b2bfSNeil Cheng /* PDB IOEXP0 */ 374*12b7b2bfSNeil Cheng pdb_io_expander0: gpio-expander@24 { 375*12b7b2bfSNeil Cheng compatible = "nxp,pca9555"; 376*12b7b2bfSNeil Cheng reg = <0x24>; 377*12b7b2bfSNeil Cheng interrupt-parent = <&sgpiom0>; 378*12b7b2bfSNeil Cheng interrupts = <92 IRQ_TYPE_LEVEL_LOW>; 379*12b7b2bfSNeil Cheng interrupt-controller; 380*12b7b2bfSNeil Cheng #interrupt-cells = <2>; 381*12b7b2bfSNeil Cheng gpio-controller; 382*12b7b2bfSNeil Cheng #gpio-cells = <2>; 383*12b7b2bfSNeil Cheng gpio-line-names = 384*12b7b2bfSNeil Cheng "FM_P52V_AUX_FLT_N","FM_P12V_AUX_ALERT_N", 385*12b7b2bfSNeil Cheng "FM_SLOT1_HSC_FAULT","FM_SLOT2_HSC_FAULT", 386*12b7b2bfSNeil Cheng "FM_SLOT3_HSC_FAULT","FM_SLOT4_HSC_FAULT", 387*12b7b2bfSNeil Cheng "FM_SLOT5_HSC_FAULT","FM_SLOT6_HSC_FAULT", 388*12b7b2bfSNeil Cheng "PRSNT_FAN0","PRSNT_FAN1", 389*12b7b2bfSNeil Cheng "PRSNT_FAN2","PRSNT_FAN3", 390*12b7b2bfSNeil Cheng "","", 391*12b7b2bfSNeil Cheng "","INT_SLOT"; 392*12b7b2bfSNeil Cheng }; 393*12b7b2bfSNeil Cheng 394*12b7b2bfSNeil Cheng /* PDB IOEXP1 */ 395*12b7b2bfSNeil Cheng gpio-expander@25 { 396*12b7b2bfSNeil Cheng compatible = "nxp,pca9555"; 397*12b7b2bfSNeil Cheng reg = <0x25>; 398*12b7b2bfSNeil Cheng interrupt-parent = <&pdb_io_expander0>; 399*12b7b2bfSNeil Cheng interrupts = <15 IRQ_TYPE_LEVEL_LOW>; 400*12b7b2bfSNeil Cheng gpio-controller; 401*12b7b2bfSNeil Cheng #gpio-cells = <2>; 402*12b7b2bfSNeil Cheng gpio-line-names = 403*12b7b2bfSNeil Cheng "SLOT1_CM_UPDATE","SLOT2_CM_UPDATE", 404*12b7b2bfSNeil Cheng "SLOT3_CM_UPDATE","SLOT4_CM_UPDATE", 405*12b7b2bfSNeil Cheng "SLOT5_CM_UPDATE","SLOT6_CM_UPDATE", 406*12b7b2bfSNeil Cheng "","", 407*12b7b2bfSNeil Cheng "","", 408*12b7b2bfSNeil Cheng "","", 409*12b7b2bfSNeil Cheng "","", 410*12b7b2bfSNeil Cheng "",""; 411*12b7b2bfSNeil Cheng }; 412*12b7b2bfSNeil Cheng 413*12b7b2bfSNeil Cheng power-sensor@40 { 414*12b7b2bfSNeil Cheng compatible = "ti,ina238"; 415*12b7b2bfSNeil Cheng reg = <0x40>; 416*12b7b2bfSNeil Cheng shunt-resistor = <1000>; 417*12b7b2bfSNeil Cheng }; 418*12b7b2bfSNeil Cheng 419*12b7b2bfSNeil Cheng /* PADDLE BD IOEXP */ 420*12b7b2bfSNeil Cheng gpio-expander@41 { 421*12b7b2bfSNeil Cheng compatible = "nxp,pca9536"; 422*12b7b2bfSNeil Cheng reg = <0x41>; 423*12b7b2bfSNeil Cheng gpio-controller; 424*12b7b2bfSNeil Cheng #gpio-cells = <2>; 425*12b7b2bfSNeil Cheng gpio-line-names = 426*12b7b2bfSNeil Cheng "HSC_OC_GPIO0", "HSC_OC_GPIO1", 427*12b7b2bfSNeil Cheng "HSC_OC_GPIO2", "HSC_OC_GPIO3"; 428*12b7b2bfSNeil Cheng }; 429*12b7b2bfSNeil Cheng 430*12b7b2bfSNeil Cheng power-sensor@42 { 431*12b7b2bfSNeil Cheng compatible = "ti,ina238"; 432*12b7b2bfSNeil Cheng reg = <0x42>; 433*12b7b2bfSNeil Cheng shunt-resistor = <1000>; 434*12b7b2bfSNeil Cheng }; 435*12b7b2bfSNeil Cheng 436*12b7b2bfSNeil Cheng power-monitor@43 { 437*12b7b2bfSNeil Cheng compatible = "lltc,ltc4287"; 438*12b7b2bfSNeil Cheng reg = <0x43>; 439*12b7b2bfSNeil Cheng shunt-resistor-micro-ohms = <100>; 440*12b7b2bfSNeil Cheng }; 441*12b7b2bfSNeil Cheng 442*12b7b2bfSNeil Cheng power-sensor@44 { 443*12b7b2bfSNeil Cheng compatible = "ti,ina238"; 444*12b7b2bfSNeil Cheng reg = <0x44>; 445*12b7b2bfSNeil Cheng shunt-resistor = <1000>; 446*12b7b2bfSNeil Cheng }; 447*12b7b2bfSNeil Cheng 448*12b7b2bfSNeil Cheng power-sensor@45 { 449*12b7b2bfSNeil Cheng compatible = "ti,ina238"; 450*12b7b2bfSNeil Cheng reg = <0x45>; 451*12b7b2bfSNeil Cheng shunt-resistor = <1000>; 452*12b7b2bfSNeil Cheng }; 453*12b7b2bfSNeil Cheng 454*12b7b2bfSNeil Cheng power-monitor@46 { 455*12b7b2bfSNeil Cheng compatible = "mps,mp5998"; 456*12b7b2bfSNeil Cheng reg = <0x46>; 457*12b7b2bfSNeil Cheng }; 458*12b7b2bfSNeil Cheng 459*12b7b2bfSNeil Cheng power-monitor@47 { 460*12b7b2bfSNeil Cheng compatible = "ti,tps25990"; 461*12b7b2bfSNeil Cheng reg = <0x47>; 462*12b7b2bfSNeil Cheng ti,rimon-micro-ohms = <430000000>; 463*12b7b2bfSNeil Cheng }; 464*12b7b2bfSNeil Cheng 465*12b7b2bfSNeil Cheng temperature-sensor@48 { 466*12b7b2bfSNeil Cheng compatible = "ti,tmp75"; 467*12b7b2bfSNeil Cheng reg = <0x48>; 468*12b7b2bfSNeil Cheng }; 469*12b7b2bfSNeil Cheng 470*12b7b2bfSNeil Cheng temperature-sensor@49 { 471*12b7b2bfSNeil Cheng compatible = "ti,tmp75"; 472*12b7b2bfSNeil Cheng reg = <0x49>; 473*12b7b2bfSNeil Cheng }; 474*12b7b2bfSNeil Cheng 475*12b7b2bfSNeil Cheng /* PDB FRU */ 476*12b7b2bfSNeil Cheng eeprom@56 { 477*12b7b2bfSNeil Cheng compatible = "atmel,24c128"; 478*12b7b2bfSNeil Cheng reg = <0x56>; 479*12b7b2bfSNeil Cheng }; 480*12b7b2bfSNeil Cheng 481*12b7b2bfSNeil Cheng /* Paddle BD FRU */ 482*12b7b2bfSNeil Cheng eeprom@57 { 483*12b7b2bfSNeil Cheng compatible = "atmel,24c128"; 484*12b7b2bfSNeil Cheng reg = <0x57>; 485*12b7b2bfSNeil Cheng }; 486*12b7b2bfSNeil Cheng 487*12b7b2bfSNeil Cheng power-monitor@58 { 488*12b7b2bfSNeil Cheng compatible = "renesas,isl28022"; 489*12b7b2bfSNeil Cheng reg = <0x58>; 490*12b7b2bfSNeil Cheng shunt-resistor-micro-ohms = <10000>; 491*12b7b2bfSNeil Cheng }; 492*12b7b2bfSNeil Cheng 493*12b7b2bfSNeil Cheng power-monitor@59 { 494*12b7b2bfSNeil Cheng compatible = "renesas,isl28022"; 495*12b7b2bfSNeil Cheng reg = <0x59>; 496*12b7b2bfSNeil Cheng shunt-resistor-micro-ohms = <10000>; 497*12b7b2bfSNeil Cheng }; 498*12b7b2bfSNeil Cheng 499*12b7b2bfSNeil Cheng power-monitor@5a { 500*12b7b2bfSNeil Cheng compatible = "renesas,isl28022"; 501*12b7b2bfSNeil Cheng reg = <0x5a>; 502*12b7b2bfSNeil Cheng shunt-resistor-micro-ohms = <10000>; 503*12b7b2bfSNeil Cheng }; 504*12b7b2bfSNeil Cheng 505*12b7b2bfSNeil Cheng power-monitor@5b { 506*12b7b2bfSNeil Cheng compatible = "renesas,isl28022"; 507*12b7b2bfSNeil Cheng reg = <0x5b>; 508*12b7b2bfSNeil Cheng shunt-resistor-micro-ohms = <10000>; 509*12b7b2bfSNeil Cheng }; 510*12b7b2bfSNeil Cheng 511*12b7b2bfSNeil Cheng psu@5c { 512*12b7b2bfSNeil Cheng compatible = "renesas,raa228006"; 513*12b7b2bfSNeil Cheng reg = <0x5c>; 514*12b7b2bfSNeil Cheng }; 515*12b7b2bfSNeil Cheng 516*12b7b2bfSNeil Cheng fan-controller@5e{ 517*12b7b2bfSNeil Cheng compatible = "maxim,max31790"; 518*12b7b2bfSNeil Cheng reg = <0x5e>; 519*12b7b2bfSNeil Cheng }; 520*12b7b2bfSNeil Cheng 521*12b7b2bfSNeil Cheng /* I2C MUX for PWRPIC #1, #2, #11, #12 */ 522*12b7b2bfSNeil Cheng i2c-mux@77 { 523*12b7b2bfSNeil Cheng compatible = "nxp,pca9546"; 524*12b7b2bfSNeil Cheng reg = <0x77>; 525*12b7b2bfSNeil Cheng #address-cells = <1>; 526*12b7b2bfSNeil Cheng #size-cells = <0>; 527*12b7b2bfSNeil Cheng i2c-mux-idle-disconnect; 528*12b7b2bfSNeil Cheng 529*12b7b2bfSNeil Cheng /* PWRPIC #1 */ 530*12b7b2bfSNeil Cheng i2c8mux0ch0: i2c@0 { 531*12b7b2bfSNeil Cheng reg = <0>; 532*12b7b2bfSNeil Cheng #address-cells = <1>; 533*12b7b2bfSNeil Cheng #size-cells = <0>; 534*12b7b2bfSNeil Cheng }; 535*12b7b2bfSNeil Cheng 536*12b7b2bfSNeil Cheng /* PWRPIC #2 */ 537*12b7b2bfSNeil Cheng i2c8mux0ch1: i2c@1 { 538*12b7b2bfSNeil Cheng reg = <1>; 539*12b7b2bfSNeil Cheng #address-cells = <1>; 540*12b7b2bfSNeil Cheng #size-cells = <0>; 541*12b7b2bfSNeil Cheng }; 542*12b7b2bfSNeil Cheng 543*12b7b2bfSNeil Cheng /* PWRPIC #12 (Connector to CXL BD) */ 544*12b7b2bfSNeil Cheng i2c8mux0ch2: i2c@2 { 545*12b7b2bfSNeil Cheng reg = <2>; 546*12b7b2bfSNeil Cheng #address-cells = <1>; 547*12b7b2bfSNeil Cheng #size-cells = <0>; 548*12b7b2bfSNeil Cheng i2c-mux@70 { 549*12b7b2bfSNeil Cheng compatible = "nxp,pca9546"; 550*12b7b2bfSNeil Cheng reg = <0x70>; 551*12b7b2bfSNeil Cheng #address-cells = <1>; 552*12b7b2bfSNeil Cheng #size-cells = <0>; 553*12b7b2bfSNeil Cheng i2c-mux-idle-disconnect; 554*12b7b2bfSNeil Cheng i2c26mux0ch0: i2c@0 { 555*12b7b2bfSNeil Cheng reg = <0>; 556*12b7b2bfSNeil Cheng #address-cells = <1>; 557*12b7b2bfSNeil Cheng #size-cells = <0>; 558*12b7b2bfSNeil Cheng }; 559*12b7b2bfSNeil Cheng i2c26mux0ch1: i2c@1 { 560*12b7b2bfSNeil Cheng reg = <1>; 561*12b7b2bfSNeil Cheng #address-cells = <1>; 562*12b7b2bfSNeil Cheng #size-cells = <0>; 563*12b7b2bfSNeil Cheng }; 564*12b7b2bfSNeil Cheng i2c26mux0ch2: i2c@2 { 565*12b7b2bfSNeil Cheng reg = <2>; 566*12b7b2bfSNeil Cheng #address-cells = <1>; 567*12b7b2bfSNeil Cheng #size-cells = <0>; 568*12b7b2bfSNeil Cheng /* CXL FRU */ 569*12b7b2bfSNeil Cheng eeprom@50 { 570*12b7b2bfSNeil Cheng compatible = "atmel,24c64"; 571*12b7b2bfSNeil Cheng reg = <0x50>; 572*12b7b2bfSNeil Cheng }; 573*12b7b2bfSNeil Cheng }; 574*12b7b2bfSNeil Cheng i2c26mux0ch3: i2c@3 { 575*12b7b2bfSNeil Cheng reg = <3>; 576*12b7b2bfSNeil Cheng #address-cells = <1>; 577*12b7b2bfSNeil Cheng #size-cells = <0>; 578*12b7b2bfSNeil Cheng }; 579*12b7b2bfSNeil Cheng }; 580*12b7b2bfSNeil Cheng }; 581*12b7b2bfSNeil Cheng 582*12b7b2bfSNeil Cheng /* PWRPIC #11 */ 583*12b7b2bfSNeil Cheng i2c8mux0ch3: i2c@3 { 584*12b7b2bfSNeil Cheng reg = <3>; 585*12b7b2bfSNeil Cheng #address-cells = <1>; 586*12b7b2bfSNeil Cheng #size-cells = <0>; 587*12b7b2bfSNeil Cheng }; 588*12b7b2bfSNeil Cheng }; 589*12b7b2bfSNeil Cheng}; 590*12b7b2bfSNeil Cheng 591*12b7b2bfSNeil Cheng&i2c9 { 592*12b7b2bfSNeil Cheng status = "okay"; 593*12b7b2bfSNeil Cheng 594*12b7b2bfSNeil Cheng temperature-sensor@4b { 595*12b7b2bfSNeil Cheng compatible = "ti,tmp75"; 596*12b7b2bfSNeil Cheng reg = <0x4b>; 597*12b7b2bfSNeil Cheng }; 598*12b7b2bfSNeil Cheng 599*12b7b2bfSNeil Cheng /* SCM FRU */ 600*12b7b2bfSNeil Cheng eeprom@51 { 601*12b7b2bfSNeil Cheng compatible = "atmel,24c128"; 602*12b7b2bfSNeil Cheng reg = <0x51>; 603*12b7b2bfSNeil Cheng }; 604*12b7b2bfSNeil Cheng 605*12b7b2bfSNeil Cheng /* BSM FRU */ 606*12b7b2bfSNeil Cheng eeprom@56 { 607*12b7b2bfSNeil Cheng compatible = "atmel,24c64"; 608*12b7b2bfSNeil Cheng reg = <0x56>; 609*12b7b2bfSNeil Cheng }; 610*12b7b2bfSNeil Cheng}; 611*12b7b2bfSNeil Cheng 612*12b7b2bfSNeil Cheng/* MCIO 0A I2C */ 613*12b7b2bfSNeil Cheng&i2c10 { 614*12b7b2bfSNeil Cheng status = "okay"; 615*12b7b2bfSNeil Cheng}; 616*12b7b2bfSNeil Cheng 617*12b7b2bfSNeil Cheng&i2c11 { 618*12b7b2bfSNeil Cheng status = "okay"; 619*12b7b2bfSNeil Cheng 620*12b7b2bfSNeil Cheng /* I2C11_IOEXP_3 */ 621*12b7b2bfSNeil Cheng gpio-expander@20 { 622*12b7b2bfSNeil Cheng compatible = "nxp,pca9535"; 623*12b7b2bfSNeil Cheng reg = <0x20>; 624*12b7b2bfSNeil Cheng gpio-controller; 625*12b7b2bfSNeil Cheng #gpio-cells = <2>; 626*12b7b2bfSNeil Cheng gpio-line-names = 627*12b7b2bfSNeil Cheng "IRQ_INA230_FAN0_ALERT_N_CPLD", "IRQ_INA230_FAN1_ALERT_N_CPLD", 628*12b7b2bfSNeil Cheng "IRQ_INA230_FAN2_ALERT_N_CPLD", "IRQ_INA230_FAN3_ALERT_N_CPLD", 629*12b7b2bfSNeil Cheng "IRQ_INA230_P12V_DIMM_0_ALERT_N", "IRQ_INA230_P12V_DIMM_1_ALERT_N", 630*12b7b2bfSNeil Cheng "IRQ_P3V3_E1S_0_FLT_N", "P12V_E1S_0_FAULT_R_N", 631*12b7b2bfSNeil Cheng "IRQ_P3V3_E1S_1_FLT_N", "P12V_E1S_1_FAULT_R_N", 632*12b7b2bfSNeil Cheng "IRQ_P3V3_NIC_FLT_N", "P12V_NIC_FAULT_R_N", 633*12b7b2bfSNeil Cheng "SMB_SENSOR_ALERT_N", "FW_CPLD_RST_RTC_RST_R1", 634*12b7b2bfSNeil Cheng "RTC_CLR", "RTC_U11_ALRT_N"; 635*12b7b2bfSNeil Cheng }; 636*12b7b2bfSNeil Cheng 637*12b7b2bfSNeil Cheng /* I2C11_IOEXP_2 */ 638*12b7b2bfSNeil Cheng gpio-expander@21 { 639*12b7b2bfSNeil Cheng compatible = "nxp,pca9535"; 640*12b7b2bfSNeil Cheng reg = <0x21>; 641*12b7b2bfSNeil Cheng gpio-controller; 642*12b7b2bfSNeil Cheng #gpio-cells = <2>; 643*12b7b2bfSNeil Cheng gpio-line-names = 644*12b7b2bfSNeil Cheng "FAN_0_PRESENT_CPLD", "FAN_1_PRESENT_CPLD", 645*12b7b2bfSNeil Cheng "FAN_2_PRESENT_CPLD", "FAN_3_PRESENT_CPLD", 646*12b7b2bfSNeil Cheng "FAN_FAIL_L_CPLD", "FULL_SPEED_N_R_CPLD", 647*12b7b2bfSNeil Cheng "P12V_FAN0_PWRGD_CPLD", "P12V_FAN1_PWRGD_CPLD", 648*12b7b2bfSNeil Cheng "P12V_FAN2_PWRGD_CPLD", "P12V_FAN3_PWRGD_CPLD", 649*12b7b2bfSNeil Cheng "FM_P12V_FAN0_FLTB_N_CPLD", "FM_P12V_FAN1_FLTB_N_CPLD", 650*12b7b2bfSNeil Cheng "FM_P12V_FAN2_FLTB_N_CPLD", "FM_P12V_FAN3_FLTB_N_CPLD", 651*12b7b2bfSNeil Cheng "P12V_FAN_EN_R_CPLD", ""; 652*12b7b2bfSNeil Cheng }; 653*12b7b2bfSNeil Cheng 654*12b7b2bfSNeil Cheng /* I2C11_IOEXP_1 */ 655*12b7b2bfSNeil Cheng gpio-expander@27 { 656*12b7b2bfSNeil Cheng compatible = "nxp,pca9535"; 657*12b7b2bfSNeil Cheng reg = <0x27>; 658*12b7b2bfSNeil Cheng gpio-controller; 659*12b7b2bfSNeil Cheng #gpio-cells = <2>; 660*12b7b2bfSNeil Cheng gpio-line-names = 661*12b7b2bfSNeil Cheng "PWRGD_P12V_SCM", "PWRGD_P5V_STBY", 662*12b7b2bfSNeil Cheng "PWRGD_P3V3_STBY", "PWRGD_P1V8_STBY", 663*12b7b2bfSNeil Cheng "PWRGD_P1V2_STBY", "PWRGD_P1V1_STBY", 664*12b7b2bfSNeil Cheng "PWRGD_P1V0_STBY", "", 665*12b7b2bfSNeil Cheng "", "", 666*12b7b2bfSNeil Cheng "", "", 667*12b7b2bfSNeil Cheng "", "", 668*12b7b2bfSNeil Cheng "", ""; 669*12b7b2bfSNeil Cheng }; 670*12b7b2bfSNeil Cheng 671*12b7b2bfSNeil Cheng power-sensor@40 { 672*12b7b2bfSNeil Cheng compatible = "ti,ina230"; 673*12b7b2bfSNeil Cheng reg = <0x40>; 674*12b7b2bfSNeil Cheng shunt-resistor = <1000>; 675*12b7b2bfSNeil Cheng }; 676*12b7b2bfSNeil Cheng 677*12b7b2bfSNeil Cheng power-sensor@41 { 678*12b7b2bfSNeil Cheng compatible = "ti,ina230"; 679*12b7b2bfSNeil Cheng reg = <0x41>; 680*12b7b2bfSNeil Cheng shunt-resistor = <1000>; 681*12b7b2bfSNeil Cheng }; 682*12b7b2bfSNeil Cheng 683*12b7b2bfSNeil Cheng power-sensor@42 { 684*12b7b2bfSNeil Cheng compatible = "ti,ina230"; 685*12b7b2bfSNeil Cheng reg = <0x42>; 686*12b7b2bfSNeil Cheng shunt-resistor = <2000>; 687*12b7b2bfSNeil Cheng }; 688*12b7b2bfSNeil Cheng 689*12b7b2bfSNeil Cheng power-sensor@43 { 690*12b7b2bfSNeil Cheng compatible = "ti,ina230"; 691*12b7b2bfSNeil Cheng reg = <0x43>; 692*12b7b2bfSNeil Cheng shunt-resistor = <2000>; 693*12b7b2bfSNeil Cheng }; 694*12b7b2bfSNeil Cheng 695*12b7b2bfSNeil Cheng power-sensor@44 { 696*12b7b2bfSNeil Cheng compatible = "ti,ina230"; 697*12b7b2bfSNeil Cheng reg = <0x44>; 698*12b7b2bfSNeil Cheng shunt-resistor = <2000>; 699*12b7b2bfSNeil Cheng }; 700*12b7b2bfSNeil Cheng 701*12b7b2bfSNeil Cheng power-sensor@45 { 702*12b7b2bfSNeil Cheng compatible = "ti,ina230"; 703*12b7b2bfSNeil Cheng reg = <0x45>; 704*12b7b2bfSNeil Cheng shunt-resistor = <2000>; 705*12b7b2bfSNeil Cheng }; 706*12b7b2bfSNeil Cheng 707*12b7b2bfSNeil Cheng adc@49 { 708*12b7b2bfSNeil Cheng compatible = "ti,ads7830"; 709*12b7b2bfSNeil Cheng reg = <0x49>; 710*12b7b2bfSNeil Cheng }; 711*12b7b2bfSNeil Cheng 712*12b7b2bfSNeil Cheng adc@4a { 713*12b7b2bfSNeil Cheng compatible = "ti,ads7830"; 714*12b7b2bfSNeil Cheng reg = <0x4a>; 715*12b7b2bfSNeil Cheng }; 716*12b7b2bfSNeil Cheng 717*12b7b2bfSNeil Cheng adc@4b { 718*12b7b2bfSNeil Cheng compatible = "ti,ads7830"; 719*12b7b2bfSNeil Cheng reg = <0x4b>; 720*12b7b2bfSNeil Cheng }; 721*12b7b2bfSNeil Cheng rtc@6f { 722*12b7b2bfSNeil Cheng compatible = "nuvoton,nct3018y"; 723*12b7b2bfSNeil Cheng reg = <0x6f>; 724*12b7b2bfSNeil Cheng status = "okay"; 725*12b7b2bfSNeil Cheng }; 726*12b7b2bfSNeil Cheng}; 727*12b7b2bfSNeil Cheng 728*12b7b2bfSNeil Cheng/* MCIO 4A I2C */ 729*12b7b2bfSNeil Cheng&i2c12 { 730*12b7b2bfSNeil Cheng multi-master; 731*12b7b2bfSNeil Cheng mctp-controller; 732*12b7b2bfSNeil Cheng clock-frequency = <400000>; 733*12b7b2bfSNeil Cheng status = "okay"; 734*12b7b2bfSNeil Cheng 735*12b7b2bfSNeil Cheng mctp@10 { 736*12b7b2bfSNeil Cheng compatible = "mctp-i2c-controller"; 737*12b7b2bfSNeil Cheng reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 738*12b7b2bfSNeil Cheng }; 739*12b7b2bfSNeil Cheng}; 740*12b7b2bfSNeil Cheng 741*12b7b2bfSNeil Cheng&i2c13 { 742*12b7b2bfSNeil Cheng status = "okay"; 743*12b7b2bfSNeil Cheng 744*12b7b2bfSNeil Cheng fan-controller@20 { 745*12b7b2bfSNeil Cheng compatible = "maxim,max31790"; 746*12b7b2bfSNeil Cheng reg = <0x20>; 747*12b7b2bfSNeil Cheng }; 748*12b7b2bfSNeil Cheng 749*12b7b2bfSNeil Cheng power-sensor@40 { 750*12b7b2bfSNeil Cheng compatible = "ti,ina230"; 751*12b7b2bfSNeil Cheng reg = <0x40>; 752*12b7b2bfSNeil Cheng shunt-resistor = <2000>; 753*12b7b2bfSNeil Cheng }; 754*12b7b2bfSNeil Cheng 755*12b7b2bfSNeil Cheng power-sensor@41 { 756*12b7b2bfSNeil Cheng compatible = "ti,ina230"; 757*12b7b2bfSNeil Cheng reg = <0x41>; 758*12b7b2bfSNeil Cheng shunt-resistor = <2000>; 759*12b7b2bfSNeil Cheng }; 760*12b7b2bfSNeil Cheng 761*12b7b2bfSNeil Cheng power-sensor@44 { 762*12b7b2bfSNeil Cheng compatible = "ti,ina230"; 763*12b7b2bfSNeil Cheng reg = <0x44>; 764*12b7b2bfSNeil Cheng shunt-resistor = <2000>; 765*12b7b2bfSNeil Cheng }; 766*12b7b2bfSNeil Cheng 767*12b7b2bfSNeil Cheng power-sensor@45 { 768*12b7b2bfSNeil Cheng compatible = "ti,ina230"; 769*12b7b2bfSNeil Cheng reg = <0x45>; 770*12b7b2bfSNeil Cheng shunt-resistor = <2000>; 771*12b7b2bfSNeil Cheng }; 772*12b7b2bfSNeil Cheng 773*12b7b2bfSNeil Cheng temperature-sensor@48 { 774*12b7b2bfSNeil Cheng compatible = "national,lm75b"; 775*12b7b2bfSNeil Cheng reg = <0x48>; 776*12b7b2bfSNeil Cheng }; 777*12b7b2bfSNeil Cheng 778*12b7b2bfSNeil Cheng temperature-sensor@49 { 779*12b7b2bfSNeil Cheng compatible = "national,lm75b"; 780*12b7b2bfSNeil Cheng reg = <0x49>; 781*12b7b2bfSNeil Cheng }; 782*12b7b2bfSNeil Cheng 783*12b7b2bfSNeil Cheng /* MB FRU */ 784*12b7b2bfSNeil Cheng eeprom@51 { 785*12b7b2bfSNeil Cheng compatible = "atmel,24c128"; 786*12b7b2bfSNeil Cheng reg = <0x51>; 787*12b7b2bfSNeil Cheng }; 788*12b7b2bfSNeil Cheng}; 789*12b7b2bfSNeil Cheng 790*12b7b2bfSNeil Cheng/* PROT reserve */ 791*12b7b2bfSNeil Cheng&i2c14 { 792*12b7b2bfSNeil Cheng status = "okay"; 793*12b7b2bfSNeil Cheng}; 794*12b7b2bfSNeil Cheng 795*12b7b2bfSNeil Cheng/* MCIO 3A I2C */ 796*12b7b2bfSNeil Cheng&i2c15 { 797*12b7b2bfSNeil Cheng status = "okay"; 798*12b7b2bfSNeil Cheng}; 799*12b7b2bfSNeil Cheng 800*12b7b2bfSNeil Cheng&mac2 { 801*12b7b2bfSNeil Cheng pinctrl-names = "default"; 802*12b7b2bfSNeil Cheng pinctrl-0 = <&pinctrl_ncsi3_default>; 803*12b7b2bfSNeil Cheng use-ncsi; 804*12b7b2bfSNeil Cheng status = "okay"; 805*12b7b2bfSNeil Cheng}; 806*12b7b2bfSNeil Cheng 807*12b7b2bfSNeil Cheng&pinctrl { 808*12b7b2bfSNeil Cheng pinctrl_ncsi3_default: ncsi3_default { 809*12b7b2bfSNeil Cheng function = "RMII3"; 810*12b7b2bfSNeil Cheng groups = "NCSI3"; 811*12b7b2bfSNeil Cheng }; 812*12b7b2bfSNeil Cheng}; 813*12b7b2bfSNeil Cheng 814*12b7b2bfSNeil Cheng&sgpiom0 { 815*12b7b2bfSNeil Cheng status = "okay"; 816*12b7b2bfSNeil Cheng ngpios = <128>; 817*12b7b2bfSNeil Cheng bus-frequency = <2000000>; 818*12b7b2bfSNeil Cheng gpio-line-names = 819*12b7b2bfSNeil Cheng /*"input pin","output pin"*/ 820*12b7b2bfSNeil Cheng "SOC_ERROR_N_CPLD","RST_SOC_SRST_N_CPLD", 821*12b7b2bfSNeil Cheng "SOC_ELASTOPCLK_N","SOC_BMC_READY_CPLD", 822*12b7b2bfSNeil Cheng "SOC_LINKSTOP_N","wIBB_BMC_SRST_OUT", 823*12b7b2bfSNeil Cheng "SOC_POST_COMPLETE_CPLD","I3C_MUX_SEL_DIMM_C0_024", 824*12b7b2bfSNeil Cheng "SOC_RESETREQ","I3C_MUX_SEL_DIMM_C0_135", 825*12b7b2bfSNeil Cheng "SOC_SYS_PWRDN_CPLD","I3C_MUX_SEL_DIMM_C1_024", 826*12b7b2bfSNeil Cheng "SOC_PORQ","I3C_MUX_SEL_DIMM_C1_135", 827*12b7b2bfSNeil Cheng "SOC_HOT_N_CPLD","BOOT_PWRDIS_CPLD", 828*12b7b2bfSNeil Cheng // IOB0-IOB7 bit8-15 829*12b7b2bfSNeil Cheng "PWRGD_V1P8_CPU","HDD0_PERST_N_CPLD", 830*12b7b2bfSNeil Cheng "PWRGD_V1P26_CPLD","HDD1_PERST_N_CPLD", 831*12b7b2bfSNeil Cheng "PWRGD_V1P2","MCIO_1A_PWRDIS_R", 832*12b7b2bfSNeil Cheng "","", 833*12b7b2bfSNeil Cheng "FM_CONFIG_ID","P3V_BAT_SCALED_EN", 834*12b7b2bfSNeil Cheng "wALL_POWER_OK","PERST_CEM0_N_CPLD", 835*12b7b2bfSNeil Cheng "wANDGATE_ALL_POWER_GD","PERST_CEM1_N_CPLD", 836*12b7b2bfSNeil Cheng "wAC_CYCLE_12V","PERST_PLD_TUSB7340_N", 837*12b7b2bfSNeil Cheng // IOC0-IOC7 bit16-23 838*12b7b2bfSNeil Cheng "wAC_CYCLE_54V","FM_USB_MUX_SEL_CPLD", 839*12b7b2bfSNeil Cheng "FM_PLD_CLKS_DEV_EN","SMB_BOOT_RST_N_CPLD", 840*12b7b2bfSNeil Cheng "PWRGD_P1V2_STBY","SMB_MCIO_0A_RST_R_N", 841*12b7b2bfSNeil Cheng "wIBB_BMC_SRST","RST_SMB_NIC_R_N", 842*12b7b2bfSNeil Cheng "PWRGD_P12V_E1S_0","FM_PPS_NIC_IN_BUF_OE_N_R", 843*12b7b2bfSNeil Cheng "PWRGD_P12V_E1S_1","FM_BUF_PPS_NIC_IN_EN_CPLD", 844*12b7b2bfSNeil Cheng "","FM_NIC_PPS_IN_OE_CPLD", 845*12b7b2bfSNeil Cheng "PWRGD_P12V_NIC","FM_PPS_NIC_IN_S0_CPLD", 846*12b7b2bfSNeil Cheng // IOD0-IOD7 bit24-31 847*12b7b2bfSNeil Cheng "wALL_POWER_OK_1","FM_NIC_PPS_IN_S1", 848*12b7b2bfSNeil Cheng "wALL_POWER_OK_2","FM_PPS_NIC_OUT_CPU_OE_N", 849*12b7b2bfSNeil Cheng "PWRGD_EAST_DIMM_CPLD","", 850*12b7b2bfSNeil Cheng "PWRGD_WEST_DIMM_CPLD","FM_BUF_PPS_NIC_OUT_EN_CPLD", 851*12b7b2bfSNeil Cheng "PWRGD_NIC_CPLD","", 852*12b7b2bfSNeil Cheng "","PMBUS_MUX_SEL_C0", 853*12b7b2bfSNeil Cheng "PHOENIX_PWRBTN_N_CPLD","PMBUS_MUX_SEL_C1", 854*12b7b2bfSNeil Cheng "IRQ_INA230_E1S_0_ALERT_N","", 855*12b7b2bfSNeil Cheng // IOE0-IOE7 bit32-39 856*12b7b2bfSNeil Cheng "IRQ_INA230_E1S_1_ALERT_N","PWR_ON_RST_TUSB7340_CPLD", 857*12b7b2bfSNeil Cheng "","RST_PCIE_BOOT_PERST_N_CPLD", 858*12b7b2bfSNeil Cheng "FM_NIC_WAKE_N_CPLD","RST_PCIE_CPLD_NIC_N_CPLD", 859*12b7b2bfSNeil Cheng "FM_TPM_CONN_PRSNT_N","RST_PCIE_MCIO_0A_PERST_N_CPLD", 860*12b7b2bfSNeil Cheng "HDD0_PRSNT_N_CPLD","RST_PCIE_MCIO_0B_PERST_N_CPLD", 861*12b7b2bfSNeil Cheng "IRQ_INA230_P12V_NIC_ALERT_N","RST_PCIE_MCIO_1A_PERST_N_CPLD", 862*12b7b2bfSNeil Cheng "IRQ_INA230_P12V_SCM_ALERT_N","RST_PCIE_MCIO_1A_SA_PERST_N_CPL", 863*12b7b2bfSNeil Cheng "IRQ_PMBUS_ALERT_PWR11_R_N","RST_PCIE_MCIO_1B_PERST_N_CPLD", 864*12b7b2bfSNeil Cheng // IOF0-IOF7 bit40-47 865*12b7b2bfSNeil Cheng "CHASSIS_LEAK_2A_R_N","RST_PCIE_MCIO_2A_PERST_N_CPLD", 866*12b7b2bfSNeil Cheng "CHASSIS_LEAK_3A_R_N","RST_PCIE_MCIO_2B_PERST_N_CPLD", 867*12b7b2bfSNeil Cheng "CHASSIS_LEAK_4A_R_N","RST_PCIE_MCIO_3A_PERST_N_CPLD", 868*12b7b2bfSNeil Cheng "OC_ALERT_PADDLE_R_N","RST_PCIE_MCIO_3B_PERST_N_CPLD", 869*12b7b2bfSNeil Cheng "OC_ALERT_PWR2_R_N","RST_PCIE_MCIO_4A_PERST_N_CPLD", 870*12b7b2bfSNeil Cheng "OC_ALERT_PWR11_R_N","RST_PCIE_MCIO_4B_PERST_N_CPLD", 871*12b7b2bfSNeil Cheng "FM_IOE_ALT_N","RST_PERST1_N_CPLD", 872*12b7b2bfSNeil Cheng "LEAK_DETECT_1_PWR14_R_N","RST_PERST2_N_CPLD", 873*12b7b2bfSNeil Cheng // IOG0-IOG7 bit48-55 874*12b7b2bfSNeil Cheng "LEAK_DETECT_2_PWR14_R_N","RST_PERST3_N_CPLD", 875*12b7b2bfSNeil Cheng "LEAK_DETECT_1_PWR15_R_N","RST_SMB_MUX_MCIO_0A_R_N", 876*12b7b2bfSNeil Cheng "LEAK_DETECT_2_PWR15_R_N","RST_SMB_MUX_MCIO_1A_R_N", 877*12b7b2bfSNeil Cheng "MCIO_0A_SMB_ALERT_N","RST_SOC_EXTWARMRESET_CPLD", 878*12b7b2bfSNeil Cheng "MCIO_1A_SMB_ALERT_N","RST_SOC_PORESET_N_BMC", 879*12b7b2bfSNeil Cheng "MCIO_2A_SMB_ALERT_N","RST_USB_HUB_R_N", 880*12b7b2bfSNeil Cheng "MCIO_2B_SMB_ALERT_N","SMB_MM7_MUX_RESET_N", 881*12b7b2bfSNeil Cheng "MCIO_3A_SMB_ALERT_N","SMB_MUX_RESET_N_CPLD", 882*12b7b2bfSNeil Cheng // IOH0-IOH7 bit56-63 883*12b7b2bfSNeil Cheng "MCIO_3B_SMB_ALERT_N","SOC_I2C_0_ALERT_CPLD", 884*12b7b2bfSNeil Cheng "MCIO_4A_SMB_ALERT_N","SOC_LINKSTOP_OUT_N", 885*12b7b2bfSNeil Cheng "MCIO_4B_SMB_ALERT_N","SPI_TPM_RST_R_N", 886*12b7b2bfSNeil Cheng "MCIO_1A_THERMTRIP_N","", 887*12b7b2bfSNeil Cheng "MCIO_2A_THERMTRIP_N","", 888*12b7b2bfSNeil Cheng "MCIO_3A_THERMTRIP_N","", 889*12b7b2bfSNeil Cheng "MCIO_4A_THERMTRIP_N_CPLD","", 890*12b7b2bfSNeil Cheng "UV_ALERT_PADDLE_R_N","wFM_USB_MUX_OE_N", 891*12b7b2bfSNeil Cheng // IOI0-IOI7 bit64-71 892*12b7b2bfSNeil Cheng "UV_ALERT_PWR2_R_N","wFM_USB_MUX_SEL", 893*12b7b2bfSNeil Cheng "UV_ALERT_PWR11_R_N","", 894*12b7b2bfSNeil Cheng "SOC_PMBUS_0_ALERT_R_CPLD","FM_BIOS_DEBUG_MODE_N", 895*12b7b2bfSNeil Cheng "HDD1_PRSNT_N_CPLD","", 896*12b7b2bfSNeil Cheng "","", 897*12b7b2bfSNeil Cheng "SOC_DRAM_0_HOT_N_CPLD","", 898*12b7b2bfSNeil Cheng "SOC_DRAM_1_HOT_N_CPLD","RST_PLTRST_PLD_B_N", 899*12b7b2bfSNeil Cheng "SOC_DRAM_2_HOT_N_CPLD","FM_TPM_MUX6_SEL", 900*12b7b2bfSNeil Cheng // IOJ0-IOJ7 bit72-79 901*12b7b2bfSNeil Cheng "SOC_DRAM_3_HOT_N_CPLD","CPLD_MUX6_EN_N", 902*12b7b2bfSNeil Cheng "IRQ_P3V3_NIC_FLT_MOS_N_CPLD","", 903*12b7b2bfSNeil Cheng "VRHOT_V0P75_PCIE_VDDQ_N","", 904*12b7b2bfSNeil Cheng "P12V_SCM_FAULT_R_N","", 905*12b7b2bfSNeil Cheng "SOC_I2C_1_ALERT_CPLD","", 906*12b7b2bfSNeil Cheng "","", 907*12b7b2bfSNeil Cheng "SOC_PLATHOT_N_CPLD","", 908*12b7b2bfSNeil Cheng "SOC_THRMTRIP_N_CPLD","", 909*12b7b2bfSNeil Cheng // IOK0-IOK7 bit80-87 910*12b7b2bfSNeil Cheng "VRHOT_VCPUC1_VCPUMC1_N","", 911*12b7b2bfSNeil Cheng "VRHOT_VSYSC0_VSOCC0_N","", 912*12b7b2bfSNeil Cheng "VRHOT_VSYSC1_VSOCC1_N","", 913*12b7b2bfSNeil Cheng "VRHOT_VCPUC0_VCPUMC0_N","", 914*12b7b2bfSNeil Cheng "","", 915*12b7b2bfSNeil Cheng "INT_IOEXP_N","", 916*12b7b2bfSNeil Cheng "RSVD_IOEXP_0A_SB1_R","", 917*12b7b2bfSNeil Cheng "RSVD_IOEXP_0A_SB2_R","", 918*12b7b2bfSNeil Cheng // IOL0-IOL7 bit88-95 919*12b7b2bfSNeil Cheng "IRQ_PMBUS_PWR2_ALERT_R_N","", 920*12b7b2bfSNeil Cheng "FM_BORD_REV_ID0","", 921*12b7b2bfSNeil Cheng "FM_BORD_REV_ID1","", 922*12b7b2bfSNeil Cheng "FM_BORD_REV_ID2","", 923*12b7b2bfSNeil Cheng "FM_VR_TYPE_0","", 924*12b7b2bfSNeil Cheng "FM_VR_TYPE_1","", 925*12b7b2bfSNeil Cheng "","", 926*12b7b2bfSNeil Cheng "MCIO_0B_SMB_ALERT_N","", 927*12b7b2bfSNeil Cheng // IOM0-IOM7 bit96-103 928*12b7b2bfSNeil Cheng "MCIO_1B_SMB_ALERT_N","", 929*12b7b2bfSNeil Cheng "PRSNT_BOOT_N","", 930*12b7b2bfSNeil Cheng "PRSNT_MCIO_1A_N","", 931*12b7b2bfSNeil Cheng "wPRSNT_NIC_N","", 932*12b7b2bfSNeil Cheng "","", 933*12b7b2bfSNeil Cheng "SOC_TEST_MODE0","", 934*12b7b2bfSNeil Cheng "PWRGD_V0P75_PCIE","", 935*12b7b2bfSNeil Cheng "PWRGD_VDDQ","", 936*12b7b2bfSNeil Cheng // ION0-ION7 bit104-111 937*12b7b2bfSNeil Cheng "PWRGD_VCPUC0","", 938*12b7b2bfSNeil Cheng "PWRGD_VCPUMC0","", 939*12b7b2bfSNeil Cheng "PWRGD_VCPUMC1","", 940*12b7b2bfSNeil Cheng "PWRGD_VCPUC1","", 941*12b7b2bfSNeil Cheng "PWRGD_VSYSC0","", 942*12b7b2bfSNeil Cheng "PWRGD_VSOCC0","", 943*12b7b2bfSNeil Cheng "PWRGD_VSYSC1","", 944*12b7b2bfSNeil Cheng "PWRGD_VSOCC1","", 945*12b7b2bfSNeil Cheng // IOO0-IOO7 bit112-119 946*12b7b2bfSNeil Cheng "SOC_PMBUS_1_ALERT_R_CPLD","", 947*12b7b2bfSNeil Cheng "SOC_GPIO_15","", 948*12b7b2bfSNeil Cheng "C0_POSTCODE_0_CPLD","", 949*12b7b2bfSNeil Cheng "C0_POSTCODE_1_CPLD","", 950*12b7b2bfSNeil Cheng "C0_POSTCODE_2_CPLD","", 951*12b7b2bfSNeil Cheng "C0_POSTCODE_3_CPLD","", 952*12b7b2bfSNeil Cheng "C0_POSTCODE_4_CPLD","", 953*12b7b2bfSNeil Cheng "C1_POSTCODE_0_CPLD","", 954*12b7b2bfSNeil Cheng // IOP0-IOP7 bit 120-127 955*12b7b2bfSNeil Cheng "C1_POSTCODE_1_CPLD","", 956*12b7b2bfSNeil Cheng "C1_POSTCODE_2_CPLD","", 957*12b7b2bfSNeil Cheng "C1_POSTCODE_3_CPLD","", 958*12b7b2bfSNeil Cheng "C1_POSTCODE_4_CPLD","", 959*12b7b2bfSNeil Cheng "","", 960*12b7b2bfSNeil Cheng "SOC_GPIO_17","", 961*12b7b2bfSNeil Cheng "SOC_GPIO_18","", 962*12b7b2bfSNeil Cheng "SOC_GPIO_37",""; 963*12b7b2bfSNeil Cheng}; 964*12b7b2bfSNeil Cheng 965*12b7b2bfSNeil Cheng/* BIOS Flash */ 966*12b7b2bfSNeil Cheng&spi2 { 967*12b7b2bfSNeil Cheng pinctrl-names = "default"; 968*12b7b2bfSNeil Cheng pinctrl-0 = <&pinctrl_spi2_default>; 969*12b7b2bfSNeil Cheng status = "okay"; 970*12b7b2bfSNeil Cheng 971*12b7b2bfSNeil Cheng flash@0 { 972*12b7b2bfSNeil Cheng m25p,fast-read; 973*12b7b2bfSNeil Cheng label = "pnor"; 974*12b7b2bfSNeil Cheng spi-max-frequency = <12000000>; 975*12b7b2bfSNeil Cheng spi-tx-bus-width = <2>; 976*12b7b2bfSNeil Cheng spi-rx-bus-width = <2>; 977*12b7b2bfSNeil Cheng status = "okay"; 978*12b7b2bfSNeil Cheng }; 979*12b7b2bfSNeil Cheng}; 980*12b7b2bfSNeil Cheng 981*12b7b2bfSNeil Cheng&uart1 { 982*12b7b2bfSNeil Cheng status = "okay"; 983*12b7b2bfSNeil Cheng}; 984*12b7b2bfSNeil Cheng 985*12b7b2bfSNeil Cheng&uart2 { 986*12b7b2bfSNeil Cheng status = "okay"; 987*12b7b2bfSNeil Cheng}; 988*12b7b2bfSNeil Cheng 989*12b7b2bfSNeil Cheng/* SOL */ 990*12b7b2bfSNeil Cheng&uart3 { 991*12b7b2bfSNeil Cheng status = "okay"; 992*12b7b2bfSNeil Cheng}; 993*12b7b2bfSNeil Cheng 994*12b7b2bfSNeil Cheng&uart4 { 995*12b7b2bfSNeil Cheng status = "okay"; 996*12b7b2bfSNeil Cheng}; 997*12b7b2bfSNeil Cheng 998*12b7b2bfSNeil Cheng/* BMC Console */ 999*12b7b2bfSNeil Cheng&uart5 { 1000*12b7b2bfSNeil Cheng status = "okay"; 1001*12b7b2bfSNeil Cheng}; 1002*12b7b2bfSNeil Cheng 1003*12b7b2bfSNeil Cheng&wdt1 { 1004*12b7b2bfSNeil Cheng pinctrl-names = "default"; 1005*12b7b2bfSNeil Cheng pinctrl-0 = <&pinctrl_wdtrst1_default>; 1006*12b7b2bfSNeil Cheng aspeed,reset-type = "soc"; 1007*12b7b2bfSNeil Cheng aspeed,external-signal; 1008*12b7b2bfSNeil Cheng aspeed,ext-push-pull; 1009*12b7b2bfSNeil Cheng aspeed,ext-active-high; 1010*12b7b2bfSNeil Cheng aspeed,ext-pulse-duration = <256>; 1011*12b7b2bfSNeil Cheng status = "okay"; 1012*12b7b2bfSNeil Cheng}; 1013