1// SPDX-License-Identifier: GPL-2.0-only 2// Copyright (c) 2022, Ampere Computing LLC 3 4/dts-v1/; 5 6#include "aspeed-g6.dtsi" 7#include <dt-bindings/i2c/i2c.h> 8#include <dt-bindings/gpio/aspeed-gpio.h> 9 10/ { 11 model = "Ampere Mt.Mitchell BMC"; 12 compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600"; 13 14 aliases { 15 serial7 = &uart8; 16 serial8 = &uart9; 17 18 /* 19 * i2c bus 30-31 assigned to OCP slot 0-1 20 */ 21 i2c30 = &ocpslot_0; 22 i2c31 = &ocpslot_1; 23 24 /* 25 * I2C NVMe alias port 26 */ 27 i2c100 = &backplane_0; 28 i2c48 = &nvmeslot_0; 29 i2c49 = &nvmeslot_1; 30 i2c50 = &nvmeslot_2; 31 i2c51 = &nvmeslot_3; 32 i2c52 = &nvmeslot_4; 33 i2c53 = &nvmeslot_5; 34 i2c54 = &nvmeslot_6; 35 i2c55 = &nvmeslot_7; 36 37 i2c101 = &backplane_1; 38 i2c56 = &nvmeslot_8; 39 i2c57 = &nvmeslot_9; 40 i2c58 = &nvmeslot_10; 41 i2c59 = &nvmeslot_11; 42 i2c60 = &nvmeslot_12; 43 i2c61 = &nvmeslot_13; 44 i2c62 = &nvmeslot_14; 45 i2c63 = &nvmeslot_15; 46 47 i2c102 = &backplane_2; 48 i2c64 = &nvmeslot_16; 49 i2c65 = &nvmeslot_17; 50 i2c66 = &nvmeslot_18; 51 i2c67 = &nvmeslot_19; 52 i2c68 = &nvmeslot_20; 53 i2c69 = &nvmeslot_21; 54 i2c70 = &nvmeslot_22; 55 i2c71 = &nvmeslot_23; 56 57 i2c80 = &nvme_m2_0; 58 i2c81 = &nvme_m2_1; 59 }; 60 61 chosen { 62 stdout-path = &uart5; 63 }; 64 65 memory@80000000 { 66 device_type = "memory"; 67 reg = <0x80000000 0x80000000>; 68 }; 69 70 reserved-memory { 71 #address-cells = <1>; 72 #size-cells = <1>; 73 ranges; 74 75 gfx_memory: framebuffer { 76 size = <0x01000000>; 77 alignment = <0x01000000>; 78 compatible = "shared-dma-pool"; 79 reusable; 80 }; 81 82 video_engine_memory: video { 83 size = <0x04000000>; 84 alignment = <0x01000000>; 85 compatible = "shared-dma-pool"; 86 reusable; 87 }; 88 89 vga_memory: region@bf000000 { 90 no-map; 91 compatible = "shared-dma-pool"; 92 reg = <0xbf000000 0x01000000>; /* 16M */ 93 }; 94 }; 95 96 voltage_mon_reg: voltage-mon-regulator { 97 compatible = "regulator-fixed"; 98 regulator-name = "ltc2497_reg"; 99 regulator-min-microvolt = <3300000>; 100 regulator-max-microvolt = <3300000>; 101 regulator-always-on; 102 }; 103 104 gpioI5mux: mux-controller { 105 compatible = "gpio-mux"; 106 #mux-control-cells = <0>; 107 mux-gpios = <&gpio0 ASPEED_GPIO(I, 5) GPIO_ACTIVE_HIGH>; 108 }; 109 110 adc0mux: adc0mux { 111 compatible = "io-channel-mux"; 112 io-channels = <&adc_i2c_0 0>; 113 #io-channel-cells = <1>; 114 io-channel-names = "parent"; 115 mux-controls = <&gpioI5mux>; 116 settle-time-us = <10000>; 117 channels = "s0", "s1"; 118 }; 119 120 adc1mux: adc1mux { 121 compatible = "io-channel-mux"; 122 io-channels = <&adc_i2c_0 1>; 123 #io-channel-cells = <1>; 124 io-channel-names = "parent"; 125 mux-controls = <&gpioI5mux>; 126 settle-time-us = <10000>; 127 channels = "s0", "s1"; 128 }; 129 130 adc2mux: adc2mux { 131 compatible = "io-channel-mux"; 132 io-channels = <&adc_i2c_0 2>; 133 #io-channel-cells = <1>; 134 io-channel-names = "parent"; 135 mux-controls = <&gpioI5mux>; 136 settle-time-us = <10000>; 137 channels = "s0", "s1"; 138 }; 139 140 adc3mux: adc3mux { 141 compatible = "io-channel-mux"; 142 io-channels = <&adc_i2c_0 3>; 143 #io-channel-cells = <1>; 144 io-channel-names = "parent"; 145 mux-controls = <&gpioI5mux>; 146 settle-time-us = <10000>; 147 channels = "s0", "s1"; 148 }; 149 150 adc4mux: adc4mux { 151 compatible = "io-channel-mux"; 152 io-channels = <&adc_i2c_0 4>; 153 #io-channel-cells = <1>; 154 io-channel-names = "parent"; 155 mux-controls = <&gpioI5mux>; 156 settle-time-us = <10000>; 157 channels = "s0", "s1"; 158 }; 159 160 adc5mux: adc5mux { 161 compatible = "io-channel-mux"; 162 io-channels = <&adc_i2c_0 5>; 163 #io-channel-cells = <1>; 164 io-channel-names = "parent"; 165 mux-controls = <&gpioI5mux>; 166 settle-time-us = <10000>; 167 channels = "s0", "s1"; 168 }; 169 170 adc6mux: adc6mux { 171 compatible = "io-channel-mux"; 172 io-channels = <&adc_i2c_0 6>; 173 #io-channel-cells = <1>; 174 io-channel-names = "parent"; 175 mux-controls = <&gpioI5mux>; 176 settle-time-us = <10000>; 177 channels = "s0", "s1"; 178 }; 179 180 adc7mux: adc7mux { 181 compatible = "io-channel-mux"; 182 io-channels = <&adc_i2c_0 7>; 183 #io-channel-cells = <1>; 184 io-channel-names = "parent"; 185 mux-controls = <&gpioI5mux>; 186 settle-time-us = <10000>; 187 channels = "s0", "s1"; 188 }; 189 190 adc8mux: adc8mux { 191 compatible = "io-channel-mux"; 192 io-channels = <&adc_i2c_0 8>; 193 #io-channel-cells = <1>; 194 io-channel-names = "parent"; 195 mux-controls = <&gpioI5mux>; 196 settle-time-us = <10000>; 197 channels = "s0", "s1"; 198 }; 199 200 adc9mux: adc9mux { 201 compatible = "io-channel-mux"; 202 io-channels = <&adc_i2c_0 9>; 203 #io-channel-cells = <1>; 204 io-channel-names = "parent"; 205 mux-controls = <&gpioI5mux>; 206 settle-time-us = <10000>; 207 channels = "s0", "s1"; 208 }; 209 210 adc10mux: adc10mux { 211 compatible = "io-channel-mux"; 212 io-channels = <&adc_i2c_0 10>; 213 #io-channel-cells = <1>; 214 io-channel-names = "parent"; 215 mux-controls = <&gpioI5mux>; 216 settle-time-us = <10000>; 217 channels = "s0", "s1"; 218 }; 219 220 adc11mux: adc11mux { 221 compatible = "io-channel-mux"; 222 io-channels = <&adc_i2c_0 11>; 223 #io-channel-cells = <1>; 224 io-channel-names = "parent"; 225 mux-controls = <&gpioI5mux>; 226 settle-time-us = <10000>; 227 channels = "s0", "s1"; 228 }; 229 230 adc12mux: adc12mux { 231 compatible = "io-channel-mux"; 232 io-channels = <&adc_i2c_0 12>; 233 #io-channel-cells = <1>; 234 io-channel-names = "parent"; 235 mux-controls = <&gpioI5mux>; 236 settle-time-us = <10000>; 237 channels = "s0", "s1"; 238 }; 239 240 adc13mux: adc13mux { 241 compatible = "io-channel-mux"; 242 io-channels = <&adc_i2c_0 13>; 243 #io-channel-cells = <1>; 244 io-channel-names = "parent"; 245 mux-controls = <&gpioI5mux>; 246 settle-time-us = <10000>; 247 channels = "s0", "s1"; 248 }; 249 250 adc14mux: adc14mux { 251 compatible = "io-channel-mux"; 252 io-channels = <&adc_i2c_0 14>; 253 #io-channel-cells = <1>; 254 io-channel-names = "parent"; 255 mux-controls = <&gpioI5mux>; 256 settle-time-us = <10000>; 257 channels = "s0", "s1"; 258 }; 259 260 adc15mux: adc15mux { 261 compatible = "io-channel-mux"; 262 io-channels = <&adc_i2c_0 15>; 263 #io-channel-cells = <1>; 264 io-channel-names = "parent"; 265 mux-controls = <&gpioI5mux>; 266 settle-time-us = <10000>; 267 channels = "s0", "s1"; 268 }; 269 270 iio-hwmon { 271 compatible = "iio-hwmon"; 272 io-channels = <&adc0mux 0>, <&adc0mux 1>, 273 <&adc1mux 0>, <&adc1mux 1>, 274 <&adc2mux 0>, <&adc2mux 1>, 275 <&adc3mux 0>, <&adc3mux 1>, 276 <&adc4mux 0>, <&adc4mux 1>, 277 <&adc5mux 0>, <&adc5mux 1>, 278 <&adc6mux 0>, <&adc6mux 1>, 279 <&adc7mux 0>, <&adc7mux 1>, 280 <&adc8mux 0>, <&adc8mux 1>, 281 <&adc9mux 0>, <&adc9mux 1>, 282 <&adc10mux 0>, <&adc10mux 1>, 283 <&adc11mux 0>, <&adc11mux 1>, 284 <&adc12mux 0>, <&adc12mux 1>, 285 <&adc13mux 0>, <&adc13mux 1>, 286 <&adc14mux 0>, <&adc14mux 1>, 287 <&adc15mux 0>, <&adc15mux 1>, 288 <&adc_i2c_1 0>, <&adc_i2c_1 1>, 289 <&adc_i2c_1 2>, <&adc_i2c_1 3>, 290 <&adc_i2c_1 4>, <&adc_i2c_1 5>, 291 <&adc_i2c_1 6>, <&adc_i2c_1 7>, 292 <&adc_i2c_1 8>, <&adc_i2c_1 9>, 293 <&adc_i2c_1 10>, <&adc_i2c_1 11>, 294 <&adc_i2c_1 12>, <&adc_i2c_1 13>, 295 <&adc_i2c_1 14>, <&adc_i2c_1 15>, 296 <&adc0 0>, <&adc0 1>, 297 <&adc0 2>; 298 }; 299}; 300 301&mdio0 { 302 status = "okay"; 303 304 ethphy0: ethernet-phy@0 { 305 compatible = "ethernet-phy-ieee802.3-c22"; 306 reg = <0>; 307 }; 308}; 309 310&mac0 { 311 status = "okay"; 312 313 phy-mode = "rgmii"; 314 phy-handle = <ðphy0>; 315 316 pinctrl-names = "default"; 317 pinctrl-0 = <&pinctrl_rgmii1_default>; 318}; 319 320&mac3 { 321 status = "okay"; 322 pinctrl-names = "default"; 323 pinctrl-0 = <&pinctrl_rmii4_default>; 324 clock-names = "MACCLK", "RCLK"; 325 use-ncsi; 326}; 327 328&fmc { 329 status = "okay"; 330 flash@0 { 331 status = "okay"; 332 m25p,fast-read; 333 label = "bmc"; 334 spi-max-frequency = <50000000>; 335#include "openbmc-flash-layout-64.dtsi" 336 }; 337 338 flash@1 { 339 status = "okay"; 340 m25p,fast-read; 341 label = "alt-bmc"; 342 spi-max-frequency = <50000000>; 343#include "openbmc-flash-layout-64-alt.dtsi" 344 }; 345}; 346 347&spi1 { 348 status = "okay"; 349 pinctrl-names = "default"; 350 pinctrl-0 = <&pinctrl_spi1_default>; 351 352 flash@0 { 353 status = "okay"; 354 m25p,fast-read; 355 label = "pnor"; 356 spi-max-frequency = <20000000>; 357 }; 358}; 359 360&uart1 { 361 status = "okay"; 362}; 363 364&uart2 { 365 status = "okay"; 366}; 367 368&uart3 { 369 status = "okay"; 370}; 371 372&uart4 { 373 status = "okay"; 374}; 375 376&uart8 { 377 status = "okay"; 378}; 379 380&uart9 { 381 status = "okay"; 382}; 383 384&i2c0 { 385 status = "okay"; 386 387 temperature-sensor@2e { 388 compatible = "adi,adt7490"; 389 reg = <0x2e>; 390 }; 391}; 392 393&i2c1 { 394 status = "okay"; 395}; 396 397&i2c2 { 398 status = "okay"; 399 400 psu@58 { 401 compatible = "pmbus"; 402 reg = <0x58>; 403 }; 404 405 psu@59 { 406 compatible = "pmbus"; 407 reg = <0x59>; 408 }; 409}; 410 411&i2c3 { 412 status = "okay"; 413 bus-frequency = <1000000>; 414 multi-master; 415 mctp-controller; 416 417 mctp@10 { 418 compatible = "mctp-i2c-controller"; 419 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 420 }; 421}; 422 423&i2c4 { 424 status = "okay"; 425 426 adc_i2c_0: adc@14 { 427 compatible = "lltc,ltc2497"; 428 reg = <0x14>; 429 vref-supply = <&voltage_mon_reg>; 430 #io-channel-cells = <1>; 431 }; 432 433 adc_i2c_1: adc@16 { 434 compatible = "lltc,ltc2497"; 435 reg = <0x16>; 436 vref-supply = <&voltage_mon_reg>; 437 #io-channel-cells = <1>; 438 }; 439 440 eeprom@50 { 441 compatible = "atmel,24c64"; 442 reg = <0x50>; 443 pagesize = <32>; 444 }; 445 446 i2c-mux@70 { 447 compatible = "nxp,pca9545"; 448 #address-cells = <1>; 449 #size-cells = <0>; 450 reg = <0x70>; 451 i2c-mux-idle-disconnect; 452 453 i2c4_bus70_chn0: i2c@0 { 454 #address-cells = <1>; 455 #size-cells = <0>; 456 reg = <0x0>; 457 458 outlet_temp1: temperature-sensor@48 { 459 compatible = "ti,tmp75"; 460 reg = <0x48>; 461 }; 462 psu1_inlet_temp2: temperature-sensor@49 { 463 compatible = "ti,tmp75"; 464 reg = <0x49>; 465 }; 466 }; 467 468 i2c4_bus70_chn1: i2c@1 { 469 #address-cells = <1>; 470 #size-cells = <0>; 471 reg = <0x1>; 472 473 pcie_zone_temp1: temperature-sensor@48 { 474 compatible = "ti,tmp75"; 475 reg = <0x48>; 476 }; 477 psu0_inlet_temp2: temperature-sensor@49 { 478 compatible = "ti,tmp75"; 479 reg = <0x49>; 480 }; 481 }; 482 483 i2c4_bus70_chn2: i2c@2 { 484 #address-cells = <1>; 485 #size-cells = <0>; 486 reg = <0x2>; 487 488 pcie_zone_temp2: temperature-sensor@48 { 489 compatible = "ti,tmp75"; 490 reg = <0x48>; 491 }; 492 outlet_temp2: temperature-sensor@49 { 493 compatible = "ti,tmp75"; 494 reg = <0x49>; 495 }; 496 }; 497 498 i2c4_bus70_chn3: i2c@3 { 499 #address-cells = <1>; 500 #size-cells = <0>; 501 reg = <0x3>; 502 503 mb_inlet_temp1: temperature-sensor@7c { 504 compatible = "microchip,emc1413"; 505 reg = <0x7c>; 506 }; 507 mb_inlet_temp2: temperature-sensor@4c { 508 compatible = "microchip,emc1413"; 509 reg = <0x4c>; 510 }; 511 }; 512 }; 513}; 514 515&i2c5 { 516 status = "okay"; 517 518 i2c-mux@70 { 519 compatible = "nxp,pca9548"; 520 #address-cells = <1>; 521 #size-cells = <0>; 522 reg = <0x70>; 523 i2c-mux-idle-disconnect; 524 525 ocpslot_0: i2c@0 { 526 #address-cells = <1>; 527 #size-cells = <0>; 528 reg = <0x0>; 529 530 ocpslot_0_temp: temperature-sensor@1f { 531 compatible = "ti,tmp421"; 532 reg = <0x1f>; 533 }; 534 }; 535 536 ocpslot_1: i2c@1 { 537 #address-cells = <1>; 538 #size-cells = <0>; 539 reg = <0x1>; 540 541 ocpslot_1_temp: temperature-sensor@1f { 542 compatible = "ti,tmp421"; 543 reg = <0x1f>; 544 }; 545 }; 546 }; 547}; 548 549&i2c6 { 550 status = "okay"; 551 rtc@51 { 552 compatible = "nxp,pcf85063a"; 553 reg = <0x51>; 554 }; 555}; 556 557&i2c7 { 558 status = "okay"; 559}; 560 561&i2c8 { 562 status = "okay"; 563 564 temperature-sensor@48 { 565 compatible = "ti,tmp112"; 566 reg = <0x48>; 567 }; 568 569 gpio@77 { 570 compatible = "nxp,pca9539"; 571 reg = <0x77>; 572 gpio-controller; 573 #address-cells = <1>; 574 #size-cells = <0>; 575 #gpio-cells = <2>; 576 577 bmc-ocp0-en-hog { 578 gpio-hog; 579 gpios = <7 GPIO_ACTIVE_LOW>; 580 output-high; 581 line-name = "bmc-ocp0-en-n"; 582 }; 583 }; 584}; 585 586&i2c9 { 587 status = "okay"; 588 i2c-mux@70 { 589 compatible = "nxp,pca9548"; 590 #address-cells = <1>; 591 #size-cells = <0>; 592 reg = <0x70>; 593 i2c-mux-idle-disconnect; 594 595 backplane_1: i2c@0 { 596 #address-cells = <1>; 597 #size-cells = <0>; 598 reg = <0x0>; 599 600 eeprom@50 { 601 compatible = "atmel,24c64"; 602 reg = <0x50>; 603 pagesize = <32>; 604 }; 605 606 i2c-mux@71 { 607 compatible = "nxp,pca9548"; 608 #address-cells = <1>; 609 #size-cells = <0>; 610 reg = <0x71>; 611 i2c-mux-idle-disconnect; 612 613 nvmeslot_8: i2c@0 { 614 #address-cells = <1>; 615 #size-cells = <0>; 616 reg = <0x0>; 617 }; 618 nvmeslot_9: i2c@1 { 619 #address-cells = <1>; 620 #size-cells = <0>; 621 reg = <0x1>; 622 }; 623 nvmeslot_10: i2c@2 { 624 #address-cells = <1>; 625 #size-cells = <0>; 626 reg = <0x2>; 627 }; 628 nvmeslot_11: i2c@3 { 629 #address-cells = <1>; 630 #size-cells = <0>; 631 reg = <0x3>; 632 }; 633 nvmeslot_12: i2c@4 { 634 #address-cells = <1>; 635 #size-cells = <0>; 636 reg = <0x4>; 637 }; 638 nvmeslot_13: i2c@5 { 639 #address-cells = <1>; 640 #size-cells = <0>; 641 reg = <0x5>; 642 }; 643 nvmeslot_14: i2c@6 { 644 #address-cells = <1>; 645 #size-cells = <0>; 646 reg = <0x6>; 647 }; 648 nvmeslot_15: i2c@7 { 649 #address-cells = <1>; 650 #size-cells = <0>; 651 reg = <0x7>; 652 }; 653 }; 654 655 tmp432@4c { 656 compatible = "ti,tmp75"; 657 reg = <0x4c>; 658 }; 659 }; 660 661 backplane_2: i2c@2 { 662 #address-cells = <1>; 663 #size-cells = <0>; 664 reg = <0x2>; 665 666 eeprom@50 { 667 compatible = "atmel,24c64"; 668 reg = <0x50>; 669 pagesize = <32>; 670 }; 671 672 i2c-mux@71 { 673 compatible = "nxp,pca9548"; 674 #address-cells = <1>; 675 #size-cells = <0>; 676 reg = <0x71>; 677 i2c-mux-idle-disconnect; 678 679 nvmeslot_16: i2c@0 { 680 #address-cells = <1>; 681 #size-cells = <0>; 682 reg = <0x0>; 683 }; 684 nvmeslot_17: i2c@1 { 685 #address-cells = <1>; 686 #size-cells = <0>; 687 reg = <0x1>; 688 }; 689 nvmeslot_18: i2c@2 { 690 #address-cells = <1>; 691 #size-cells = <0>; 692 reg = <0x2>; 693 }; 694 nvmeslot_19: i2c@3 { 695 #address-cells = <1>; 696 #size-cells = <0>; 697 reg = <0x3>; 698 }; 699 nvmeslot_20: i2c@4 { 700 #address-cells = <1>; 701 #size-cells = <0>; 702 reg = <0x4>; 703 }; 704 nvmeslot_21: i2c@5 { 705 #address-cells = <1>; 706 #size-cells = <0>; 707 reg = <0x5>; 708 }; 709 nvmeslot_22: i2c@6 { 710 #address-cells = <1>; 711 #size-cells = <0>; 712 reg = <0x6>; 713 }; 714 nvmeslot_23: i2c@7 { 715 #address-cells = <1>; 716 #size-cells = <0>; 717 reg = <0x7>; 718 }; 719 }; 720 721 tmp432@4c { 722 compatible = "ti,tmp75"; 723 reg = <0x4c>; 724 }; 725 }; 726 727 backplane_0: i2c@4 { 728 #address-cells = <1>; 729 #size-cells = <0>; 730 reg = <0x4>; 731 732 eeprom@50 { 733 compatible = "atmel,24c64"; 734 reg = <0x50>; 735 pagesize = <32>; 736 }; 737 738 i2c-mux@71 { 739 compatible = "nxp,pca9548"; 740 #address-cells = <1>; 741 #size-cells = <0>; 742 reg = <0x71>; 743 i2c-mux-idle-disconnect; 744 745 nvmeslot_0: i2c@0 { 746 #address-cells = <1>; 747 #size-cells = <0>; 748 reg = <0x0>; 749 }; 750 nvmeslot_1: i2c@1 { 751 #address-cells = <1>; 752 #size-cells = <0>; 753 reg = <0x1>; 754 }; 755 nvmeslot_2: i2c@2 { 756 #address-cells = <1>; 757 #size-cells = <0>; 758 reg = <0x2>; 759 }; 760 nvmeslot_3: i2c@3 { 761 #address-cells = <1>; 762 #size-cells = <0>; 763 reg = <0x3>; 764 }; 765 nvmeslot_4: i2c@4 { 766 #address-cells = <1>; 767 #size-cells = <0>; 768 reg = <0x4>; 769 }; 770 nvmeslot_5: i2c@5 { 771 #address-cells = <1>; 772 #size-cells = <0>; 773 reg = <0x5>; 774 }; 775 nvmeslot_6: i2c@6 { 776 #address-cells = <1>; 777 #size-cells = <0>; 778 reg = <0x6>; 779 }; 780 nvmeslot_7: i2c@7 { 781 #address-cells = <1>; 782 #size-cells = <0>; 783 reg = <0x7>; 784 }; 785 }; 786 787 tmp432@4c { 788 compatible = "ti,tmp75"; 789 reg = <0x4c>; 790 }; 791 }; 792 793 i2c@7 { 794 #address-cells = <1>; 795 #size-cells = <0>; 796 reg = <0x7>; 797 798 i2c-mux@71 { 799 compatible = "nxp,pca9546"; 800 #address-cells = <1>; 801 #size-cells = <0>; 802 reg = <0x71>; 803 i2c-mux-idle-disconnect; 804 805 nvme_m2_0: i2c@0 { 806 #address-cells = <1>; 807 #size-cells = <0>; 808 reg = <0x0>; 809 }; 810 811 nvme_m2_1: i2c@1 { 812 #address-cells = <1>; 813 #size-cells = <0>; 814 reg = <0x1>; 815 }; 816 }; 817 }; 818 }; 819}; 820 821&i2c11 { 822 status = "okay"; 823 ssif-bmc@10 { 824 compatible = "ssif-bmc"; 825 reg = <0x10>; 826 }; 827}; 828 829&i2c14 { 830 status = "okay"; 831 eeprom@50 { 832 compatible = "atmel,24c64"; 833 reg = <0x50>; 834 pagesize = <32>; 835 }; 836 837 bmc_ast2600_cpu: temperature-sensor@35 { 838 compatible = "ti,tmp175"; 839 reg = <0x35>; 840 }; 841}; 842 843&adc0 { 844 status = "okay"; 845 846 pinctrl-names = "default"; 847 pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default 848 &pinctrl_adc2_default>; 849}; 850 851&vhub { 852 status = "okay"; 853}; 854 855&video { 856 status = "okay"; 857 memory-region = <&video_engine_memory>; 858}; 859 860&gpio0 { 861 gpio-line-names = 862 /*A0-A7*/ "","","","","","i2c2-reset-n","i2c6-reset-n","i2c4-reset-n", 863 /*B0-B7*/ "","","","","host0-sysreset-n","host0-pmin-n","","", 864 /*C0-C7*/ "s0-vrd-fault-n","s1-vrd-fault-n","bmc-debug-mode","", 865 "irq-n","","vrd-sel","spd-sel", 866 /*D0-D7*/ "presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n", 867 "","bmc-ncsi-txen","","", 868 /*E0-E7*/ "","eth-phy-int-n","clk50m-bmc-ncsi","","","","","", 869 /*F0-F7*/ "s0-pcp-oc-warn-n","s1-pcp-oc-warn-n","power-chassis-control", 870 "cpu-bios-recover","s0-heartbeat","hs-csout-prochot", 871 "s0-vr-hot-n","s1-vr-hot-n", 872 /*G0-G7*/ "","","hsc-12vmain-alt1-n","","","","","", 873 /*H0-H7*/ "jtag-program-sel","fpga-program-b","wd-disable-n", 874 "power-chassis-good","","","","", 875 /*I0-I7*/ "","","","","","adc-sw","power-button","rtc-battery-voltage-read-enable", 876 /*J0-J7*/ "","","","","","","","", 877 /*K0-K7*/ "","","","","","","","", 878 /*L0-L7*/ "","","","","","","","", 879 /*M0-M7*/ "","s0-ddr-save","soc-spi-nor-access","presence-cpu0", 880 "s0-rtc-lock","","","", 881 /*N0-N7*/ "hpm-fw-recovery","hpm-stby-rst-n","jtag-sel-s0","led-sw-hb", 882 "jtag-dbgr-prsnt-n","s1-heartbeat","","", 883 /*O0-O7*/ "","","","","","","","", 884 /*P0-P7*/ "ps0-ac-loss-n","ps1-ac-loss-n","","", 885 "led-fault","cpld-user-mode","jtag-srst-n","led-bmc-hb", 886 /*Q0-Q7*/ "","","","","","","","", 887 /*R0-R7*/ "","","","","","","","", 888 /*S0-S7*/ "","","identify-button","led-identify", 889 "s1-ddr-save","spi-nor-access","host0-ready","presence-cpu1", 890 /*T0-T7*/ "","","","","","","","", 891 /*U0-U7*/ "","","","","","","","", 892 /*V0-V7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n", 893 "host0-reboot-ack-n","s0-fw-boot-ok","host0-shd-req-n", 894 "host0-shd-ack-n","s0-overtemp-n", 895 /*W0-W7*/ "ocp-aux-pwren","ocp-main-pwren","ocp-pgood","s1-pcp-pgood", 896 "bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel", 897 /*X0-X7*/ "i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok", 898 "s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n", 899 "s1-overtemp-n","cpld-s1-spi-auth-fail-n", 900 /*Y0-Y7*/ "","","","","","","","host0-special-boot", 901 /*Z0-Z7*/ "reset-button","ps0-pgood","ps1-pgood","","","","",""; 902 903 ocp-aux-pwren-hog { 904 gpio-hog; 905 gpios = <ASPEED_GPIO(W, 0) GPIO_ACTIVE_HIGH>; 906 output-high; 907 line-name = "ocp-aux-pwren"; 908 }; 909}; 910 911&gpio1 { 912 gpio-line-names = 913 /*18A0-18A7*/ "","","","","","","","", 914 /*18B0-18B7*/ "","","","","","","s0-soc-pgood","", 915 /*18C0-18C7*/ "uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1", 916 "uart3-mode0","uart3-mode1","uart4-mode0","uart4-mode1", 917 /*18D0-18D7*/ "","","","","","","","", 918 /*18E0-18E3*/ "","","",""; 919}; 920