1/* 2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8/dts-v1/; 9 10/include/ "skeleton_hs.dtsi" 11 12/ { 13 compatible = "snps,nsimosci_hs"; 14 #address-cells = <1>; 15 #size-cells = <1>; 16 interrupt-parent = <&core_intc>; 17 18 chosen { 19 /* this is for console on PGU */ 20 /* bootargs = "console=tty0 consoleblank=0"; */ 21 /* this is for console on serial */ 22 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug"; 23 }; 24 25 aliases { 26 serial0 = &uart0; 27 }; 28 29 fpga { 30 compatible = "simple-bus"; 31 #address-cells = <1>; 32 #size-cells = <1>; 33 34 /* child and parent address space 1:1 mapped */ 35 ranges; 36 37 core_clk: core_clk { 38 #clock-cells = <0>; 39 compatible = "fixed-clock"; 40 clock-frequency = <20000000>; 41 }; 42 43 core_intc: core-interrupt-controller { 44 compatible = "snps,archs-intc"; 45 interrupt-controller; 46 #interrupt-cells = <1>; 47 }; 48 49 uart0: serial@f0000000 { 50 compatible = "ns8250"; 51 reg = <0xf0000000 0x2000>; 52 interrupts = <24>; 53 clock-frequency = <3686400>; 54 baud = <115200>; 55 reg-shift = <2>; 56 reg-io-width = <4>; 57 no-loopback-test = <1>; 58 }; 59 60 pgu0: pgu@f9000000 { 61 compatible = "snps,arcpgufb"; 62 reg = <0xf9000000 0x400>; 63 }; 64 65 ps2: ps2@f9001000 { 66 compatible = "snps,arc_ps2"; 67 reg = <0xf9000400 0x14>; 68 interrupts = <27>; 69 interrupt-names = "arc_ps2_irq"; 70 }; 71 72 eth0: ethernet@f0003000 { 73 compatible = "ezchip,nps-mgt-enet"; 74 reg = <0xf0003000 0x44>; 75 interrupts = <25>; 76 }; 77 78 arcpct0: pct { 79 compatible = "snps,archs-pct"; 80 #interrupt-cells = <1>; 81 interrupts = <20>; 82 }; 83 }; 84}; 85