xref: /linux/scripts/Makefile.build (revision e26207a3819684e9b4450a2d30bdd065fa92d9c7)
1# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7PHONY := __build
8__build:
9
10# Init all relevant variables used in kbuild files so
11# 1) they have correct type
12# 2) they do not inherit any value from the environment
13obj-y :=
14obj-m :=
15lib-y :=
16lib-m :=
17always :=
18targets :=
19subdir-y :=
20subdir-m :=
21EXTRA_AFLAGS   :=
22EXTRA_CFLAGS   :=
23EXTRA_CPPFLAGS :=
24EXTRA_LDFLAGS  :=
25asflags-y  :=
26ccflags-y  :=
27cppflags-y :=
28ldflags-y  :=
29
30subdir-asflags-y :=
31subdir-ccflags-y :=
32
33# Read auto.conf if it exists, otherwise ignore
34-include include/config/auto.conf
35
36include scripts/Kbuild.include
37
38# For backward compatibility check that these variables do not change
39save-cflags := $(CFLAGS)
40
41# The filename Kbuild has precedence over Makefile
42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44include $(kbuild-file)
45
46# If the save-* variables changed error out
47ifeq ($(KBUILD_NOPEDANTIC),)
48        ifneq ("$(save-cflags)","$(CFLAGS)")
49                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
50        endif
51endif
52include scripts/Makefile.lib
53
54ifdef host-progs
55ifneq ($(hostprogs-y),$(host-progs))
56$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
57hostprogs-y += $(host-progs)
58endif
59endif
60
61# Do not include host rules unless needed
62ifneq ($(hostprogs-y)$(hostprogs-m),)
63include scripts/Makefile.host
64endif
65
66ifneq ($(KBUILD_SRC),)
67# Create output directory if not already present
68_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
69
70# Create directories for object files if directory does not exist
71# Needed when obj-y := dir/file.o syntax is used
72_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
73endif
74
75ifndef obj
76$(warning kbuild: Makefile.build is included improperly)
77endif
78
79# ===========================================================================
80
81ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
82lib-target := $(obj)/lib.a
83endif
84
85ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
86builtin-target := $(obj)/built-in.o
87endif
88
89modorder-target := $(obj)/modules.order
90
91# We keep a list of all modules in $(MODVERDIR)
92
93__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
94	 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
95	 $(subdir-ym) $(always)
96	@:
97
98# Linus' kernel sanity checking tool
99ifneq ($(KBUILD_CHECKSRC),0)
100  ifeq ($(KBUILD_CHECKSRC),2)
101    quiet_cmd_force_checksrc = CHECK   $<
102          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
103  else
104      quiet_cmd_checksrc     = CHECK   $<
105            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
106  endif
107endif
108
109# Do section mismatch analysis for each module/built-in.o
110ifdef CONFIG_DEBUG_SECTION_MISMATCH
111  cmd_secanalysis = ; scripts/mod/modpost $@
112endif
113
114# Compile C sources (.c)
115# ---------------------------------------------------------------------------
116
117# Default is built-in, unless we know otherwise
118modkern_cflags = $(if $(part-of-module), $(CFLAGS_MODULE), $(CFLAGS_KERNEL))
119quiet_modtag := $(empty)   $(empty)
120
121$(real-objs-m)        : part-of-module := y
122$(real-objs-m:.o=.i)  : part-of-module := y
123$(real-objs-m:.o=.s)  : part-of-module := y
124$(real-objs-m:.o=.lst): part-of-module := y
125
126$(real-objs-m)        : quiet_modtag := [M]
127$(real-objs-m:.o=.i)  : quiet_modtag := [M]
128$(real-objs-m:.o=.s)  : quiet_modtag := [M]
129$(real-objs-m:.o=.lst): quiet_modtag := [M]
130
131$(obj-m)              : quiet_modtag := [M]
132
133# Default for not multi-part modules
134modname = $(basetarget)
135
136$(multi-objs-m)         : modname = $(modname-multi)
137$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
138$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
139$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
140$(multi-objs-y)         : modname = $(modname-multi)
141$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
142$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
143$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
144
145quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
146cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
147
148$(obj)/%.s: $(src)/%.c FORCE
149	$(call if_changed_dep,cc_s_c)
150
151quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
152cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
153
154$(obj)/%.i: $(src)/%.c FORCE
155	$(call if_changed_dep,cc_i_c)
156
157cmd_gensymtypes =                                                           \
158    $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
159    $(GENKSYMS) -T $@ -a $(ARCH)                                            \
160     $(if $(KBUILD_PRESERVE),-p)                                            \
161     $(if $(1),-r $(firstword $(wildcard $(@:.symtypes=.symref) /dev/null)))
162
163quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
164cmd_cc_symtypes_c =                                                         \
165    set -e;                                                                 \
166    $(call cmd_gensymtypes, true) >/dev/null;                               \
167    test -s $@ || rm -f $@
168
169$(obj)/%.symtypes : $(src)/%.c FORCE
170	$(call cmd,cc_symtypes_c)
171
172# C (.c) files
173# The C file is compiled and updated dependency information is generated.
174# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
175
176quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
177
178ifndef CONFIG_MODVERSIONS
179cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
180
181else
182# When module versioning is enabled the following steps are executed:
183# o compile a .tmp_<file>.o from <file>.c
184# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
185#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
186#   are done.
187# o otherwise, we calculate symbol versions using the good old
188#   genksyms on the preprocessed source and postprocess them in a way
189#   that they are usable as a linker script
190# o generate <file>.o from .tmp_<file>.o using the linker to
191#   replace the unresolved symbols __crc_exported_symbol with
192#   the actual value of the checksum generated by genksyms
193
194cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
195cmd_modversions =							\
196	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then	\
197		$(call cmd_gensymtypes, $(KBUILD_SYMTYPES))		\
198		    > $(@D)/.tmp_$(@F:.o=.ver);				\
199									\
200		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 		\
201			-T $(@D)/.tmp_$(@F:.o=.ver);			\
202		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);	\
203	else								\
204		mv -f $(@D)/.tmp_$(@F) $@;				\
205	fi;
206endif
207
208ifdef CONFIG_FTRACE_MCOUNT_RECORD
209cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
210	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
211	"$(if $(CONFIG_64BIT),64,32)" \
212	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC)" "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
213	"$(if $(part-of-module),1,0)" "$(@)";
214endif
215
216define rule_cc_o_c
217	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
218	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c);				  \
219	$(cmd_modversions)						  \
220	$(call echo-cmd,record_mcount)					  \
221	$(cmd_record_mcount)						  \
222	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
223	                                              $(dot-target).tmp;  \
224	rm -f $(depfile);						  \
225	mv -f $(dot-target).tmp $(dot-target).cmd
226endef
227
228# Built-in and composite module parts
229$(obj)/%.o: $(src)/%.c FORCE
230	$(call cmd,force_checksrc)
231	$(call if_changed_rule,cc_o_c)
232
233# Single-part modules are special since we need to mark them in $(MODVERDIR)
234
235$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
236	$(call cmd,force_checksrc)
237	$(call if_changed_rule,cc_o_c)
238	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
239
240quiet_cmd_cc_lst_c = MKLST   $@
241      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
242		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
243				     System.map $(OBJDUMP) > $@
244
245$(obj)/%.lst: $(src)/%.c FORCE
246	$(call if_changed_dep,cc_lst_c)
247
248# Compile assembler sources (.S)
249# ---------------------------------------------------------------------------
250
251modkern_aflags := $(AFLAGS_KERNEL)
252
253$(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
254$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
255
256quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
257cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
258
259$(obj)/%.s: $(src)/%.S FORCE
260	$(call if_changed_dep,as_s_S)
261
262quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
263cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
264
265$(obj)/%.o: $(src)/%.S FORCE
266	$(call if_changed_dep,as_o_S)
267
268targets += $(real-objs-y) $(real-objs-m) $(lib-y)
269targets += $(extra-y) $(MAKECMDGOALS) $(always)
270
271# Linker scripts preprocessor (.lds.S -> .lds)
272# ---------------------------------------------------------------------------
273quiet_cmd_cpp_lds_S = LDS     $@
274      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
275	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
276
277$(obj)/%.lds: $(src)/%.lds.S FORCE
278	$(call if_changed_dep,cpp_lds_S)
279
280# Build the compiled-in targets
281# ---------------------------------------------------------------------------
282
283# To build objects in subdirs, we need to descend into the directories
284$(sort $(subdir-obj-y)): $(subdir-ym) ;
285
286#
287# Rule to compile a set of .o files into one .o file
288#
289ifdef builtin-target
290quiet_cmd_link_o_target = LD      $@
291# If the list of objects to link is empty, just create an empty built-in.o
292cmd_link_o_target = $(if $(strip $(obj-y)),\
293		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
294		      $(cmd_secanalysis),\
295		      rm -f $@; $(AR) rcs $@)
296
297$(builtin-target): $(obj-y) FORCE
298	$(call if_changed,link_o_target)
299
300targets += $(builtin-target)
301endif # builtin-target
302
303#
304# Rule to create modules.order file
305#
306# Create commands to either record .ko file or cat modules.order from
307# a subdirectory
308modorder-cmds =						\
309	$(foreach m, $(modorder),			\
310		$(if $(filter %/modules.order, $m),	\
311			cat $m;, echo kernel/$m;))
312
313$(modorder-target): $(subdir-ym) FORCE
314	$(Q)(cat /dev/null; $(modorder-cmds)) > $@
315
316#
317# Rule to compile a set of .o files into one .a file
318#
319ifdef lib-target
320quiet_cmd_link_l_target = AR      $@
321cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
322
323$(lib-target): $(lib-y) FORCE
324	$(call if_changed,link_l_target)
325
326targets += $(lib-target)
327endif
328
329#
330# Rule to link composite objects
331#
332#  Composite objects are specified in kbuild makefile as follows:
333#    <composite-object>-objs := <list of .o files>
334#  or
335#    <composite-object>-y    := <list of .o files>
336link_multi_deps =                     \
337$(filter $(addprefix $(obj)/,         \
338$($(subst $(obj)/,,$(@:.o=-objs)))    \
339$($(subst $(obj)/,,$(@:.o=-y)))), $^)
340
341quiet_cmd_link_multi-y = LD      $@
342cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
343
344quiet_cmd_link_multi-m = LD [M]  $@
345cmd_link_multi-m = $(cmd_link_multi-y)
346
347# We would rather have a list of rules like
348# 	foo.o: $(foo-objs)
349# but that's not so easy, so we rather make all composite objects depend
350# on the set of all their parts
351$(multi-used-y) : %.o: $(multi-objs-y) FORCE
352	$(call if_changed,link_multi-y)
353
354$(multi-used-m) : %.o: $(multi-objs-m) FORCE
355	$(call if_changed,link_multi-m)
356	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
357
358targets += $(multi-used-y) $(multi-used-m)
359
360
361# Descending
362# ---------------------------------------------------------------------------
363
364PHONY += $(subdir-ym)
365$(subdir-ym):
366	$(Q)$(MAKE) $(build)=$@
367
368# Add FORCE to the prequisites of a target to force it to be always rebuilt.
369# ---------------------------------------------------------------------------
370
371PHONY += FORCE
372
373FORCE:
374
375# Read all saved command lines and dependencies for the $(targets) we
376# may be building above, using $(if_changed{,_dep}). As an
377# optimization, we don't need to read them if the target does not
378# exist, we will rebuild anyway in that case.
379
380targets := $(wildcard $(sort $(targets)))
381cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
382
383ifneq ($(cmd_files),)
384  include $(cmd_files)
385endif
386
387
388# Declare the contents of the .PHONY variable as phony.  We keep that
389# information in a variable se we can use it in if_changed and friends.
390
391.PHONY: $(PHONY)
392