1*dc3bf49eSMasahiro Yamada /* SPDX-License-Identifier: GPL-2.0 */ 2d61fc96fSGerd Hoffmann /* 3d61fc96fSGerd Hoffmann * Simple pci display device. 4d61fc96fSGerd Hoffmann * 5d61fc96fSGerd Hoffmann * Framebuffer memory is pci bar 0. 6d61fc96fSGerd Hoffmann * Configuration (read-only) is in pci config space. 7d61fc96fSGerd Hoffmann * Format field uses drm fourcc codes. 8d61fc96fSGerd Hoffmann * ATM only DRM_FORMAT_XRGB8888 is supported. 9d61fc96fSGerd Hoffmann */ 10d61fc96fSGerd Hoffmann 11d61fc96fSGerd Hoffmann /* pci ids */ 12d61fc96fSGerd Hoffmann #define MDPY_PCI_VENDOR_ID 0x1b36 /* redhat */ 13d61fc96fSGerd Hoffmann #define MDPY_PCI_DEVICE_ID 0x000f 14d61fc96fSGerd Hoffmann #define MDPY_PCI_SUBVENDOR_ID PCI_SUBVENDOR_ID_REDHAT_QUMRANET 15d61fc96fSGerd Hoffmann #define MDPY_PCI_SUBDEVICE_ID PCI_SUBDEVICE_ID_QEMU 16d61fc96fSGerd Hoffmann 17d61fc96fSGerd Hoffmann /* pci cfg space offsets for fb config (dword) */ 18d61fc96fSGerd Hoffmann #define MDPY_VENDORCAP_OFFSET 0x40 19d61fc96fSGerd Hoffmann #define MDPY_VENDORCAP_SIZE 0x10 20d61fc96fSGerd Hoffmann #define MDPY_FORMAT_OFFSET (MDPY_VENDORCAP_OFFSET + 0x04) 21d61fc96fSGerd Hoffmann #define MDPY_WIDTH_OFFSET (MDPY_VENDORCAP_OFFSET + 0x08) 22d61fc96fSGerd Hoffmann #define MDPY_HEIGHT_OFFSET (MDPY_VENDORCAP_OFFSET + 0x0c) 23