1 // SPDX-License-Identifier: GPL-2.0 2 3 #include <asm/barrier.h> 4 #include <asm/rwonce.h> 5 #include <linux/atomic.h> 6 7 __rust_helper s8 rust_helper_atomic_i8_read(s8 *ptr) 8 { 9 return READ_ONCE(*ptr); 10 } 11 12 __rust_helper s8 rust_helper_atomic_i8_read_acquire(s8 *ptr) 13 { 14 return smp_load_acquire(ptr); 15 } 16 17 __rust_helper s16 rust_helper_atomic_i16_read(s16 *ptr) 18 { 19 return READ_ONCE(*ptr); 20 } 21 22 __rust_helper s16 rust_helper_atomic_i16_read_acquire(s16 *ptr) 23 { 24 return smp_load_acquire(ptr); 25 } 26 27 __rust_helper void rust_helper_atomic_i8_set(s8 *ptr, s8 val) 28 { 29 WRITE_ONCE(*ptr, val); 30 } 31 32 __rust_helper void rust_helper_atomic_i8_set_release(s8 *ptr, s8 val) 33 { 34 smp_store_release(ptr, val); 35 } 36 37 __rust_helper void rust_helper_atomic_i16_set(s16 *ptr, s16 val) 38 { 39 WRITE_ONCE(*ptr, val); 40 } 41 42 __rust_helper void rust_helper_atomic_i16_set_release(s16 *ptr, s16 val) 43 { 44 smp_store_release(ptr, val); 45 } 46 47 /* 48 * xchg helpers depend on ARCH_SUPPORTS_ATOMIC_RMW and on the 49 * architecture provding xchg() support for i8 and i16. 50 * 51 * The architectures that currently support Rust (x86_64, armv7, 52 * arm64, riscv, and loongarch) satisfy these requirements. 53 */ 54 __rust_helper s8 rust_helper_atomic_i8_xchg(s8 *ptr, s8 new) 55 { 56 return xchg(ptr, new); 57 } 58 59 __rust_helper s16 rust_helper_atomic_i16_xchg(s16 *ptr, s16 new) 60 { 61 return xchg(ptr, new); 62 } 63