1# SPDX-License-Identifier: GPL-2.0-only 2menu "IRQ subsystem" 3# Options selectable by the architecture code 4 5# Make sparse irq Kconfig switch below available 6config MAY_HAVE_SPARSE_IRQ 7 bool 8 9# Legacy support, required for itanic 10config GENERIC_IRQ_LEGACY 11 bool 12 13# Enable the generic irq autoprobe mechanism 14config GENERIC_IRQ_PROBE 15 bool 16 17# Use the generic /proc/interrupts implementation 18config GENERIC_IRQ_SHOW 19 bool 20 21# Print level/edge extra information 22config GENERIC_IRQ_SHOW_LEVEL 23 bool 24 25# Supports effective affinity mask 26config GENERIC_IRQ_EFFECTIVE_AFF_MASK 27 depends on SMP 28 bool 29 30# Support for delayed migration from interrupt context 31config GENERIC_PENDING_IRQ 32 bool 33 34# Support for generic irq migrating off cpu before the cpu is offline. 35config GENERIC_IRQ_MIGRATION 36 bool 37 38# Alpha specific irq affinity mechanism 39config AUTO_IRQ_AFFINITY 40 bool 41 42# Interrupt injection mechanism 43config GENERIC_IRQ_INJECTION 44 bool 45 46# Tasklet based software resend for pending interrupts on enable_irq() 47config HARDIRQS_SW_RESEND 48 bool 49 50# Edge style eoi based handler (cell) 51config IRQ_EDGE_EOI_HANDLER 52 bool 53 54# Generic configurable interrupt chip implementation 55config GENERIC_IRQ_CHIP 56 bool 57 select IRQ_DOMAIN 58 59# Generic irq_domain hw <--> linux irq number translation 60config IRQ_DOMAIN 61 bool 62 63# Support for simulated interrupts 64config IRQ_SIM 65 bool 66 select IRQ_WORK 67 select IRQ_DOMAIN 68 69# Support for hierarchical irq domains 70config IRQ_DOMAIN_HIERARCHY 71 bool 72 select IRQ_DOMAIN 73 74# Support for obsolete non-mapping irq domains 75config IRQ_DOMAIN_NOMAP 76 bool 77 select IRQ_DOMAIN 78 79# Support for hierarchical fasteoi+edge and fasteoi+level handlers 80config IRQ_FASTEOI_HIERARCHY_HANDLERS 81 bool 82 83# Generic IRQ IPI support 84config GENERIC_IRQ_IPI 85 bool 86 depends on SMP 87 select IRQ_DOMAIN_HIERARCHY 88 89# Generic IRQ IPI Mux support 90config GENERIC_IRQ_IPI_MUX 91 bool 92 depends on SMP 93 94# Generic MSI hierarchical interrupt domain support 95config GENERIC_MSI_IRQ 96 bool 97 select IRQ_DOMAIN_HIERARCHY 98 99config IRQ_MSI_IOMMU 100 bool 101 102config IRQ_TIMINGS 103 bool 104 105config GENERIC_IRQ_MATRIX_ALLOCATOR 106 bool 107 108config GENERIC_IRQ_RESERVATION_MODE 109 bool 110 111# Snapshot for interrupt statistics 112config GENERIC_IRQ_STAT_SNAPSHOT 113 bool 114 115# Support forced irq threading 116config IRQ_FORCED_THREADING 117 bool 118 119config SPARSE_IRQ 120 bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ 121 help 122 123 Sparse irq numbering is useful for distro kernels that want 124 to define a high CONFIG_NR_CPUS value but still want to have 125 low kernel memory footprint on smaller machines. 126 127 ( Sparse irqs can also be beneficial on NUMA boxes, as they spread 128 out the interrupt descriptors in a more NUMA-friendly way. ) 129 130 If you don't know what to do here, say N. 131 132config GENERIC_IRQ_DEBUGFS 133 bool "Expose irq internals in debugfs" 134 depends on DEBUG_FS 135 select GENERIC_IRQ_INJECTION 136 default n 137 help 138 139 Exposes internal state information through debugfs. Mostly for 140 developers and debugging of hard to diagnose interrupt problems. 141 142 If you don't know what to do here, say N. 143 144endmenu 145 146config GENERIC_IRQ_MULTI_HANDLER 147 bool 148 help 149 Allow to specify the low level IRQ handler at run time. 150 151# Cavium Octeon is the last system to use this deprecated option 152# Do not even think of enabling this on any new platform 153config DEPRECATED_IRQ_CPU_ONOFFLINE 154 bool 155 depends on CAVIUM_OCTEON_SOC 156 default CAVIUM_OCTEON_SOC 157