1 # SPDX-License-Identifier: GPL-2.0-only 2 menu "IRQ subsystem" 3 # Options selectable by the architecture code 4 5 # Make sparse irq Kconfig switch below available 6 config MAY_HAVE_SPARSE_IRQ 7 bool 8 9 # Legacy support, required for itanic 10 config GENERIC_IRQ_LEGACY 11 bool 12 13 # Enable the generic irq autoprobe mechanism 14 config GENERIC_IRQ_PROBE 15 bool 16 17 # Use the generic /proc/interrupts implementation 18 config GENERIC_IRQ_SHOW 19 bool 20 21 # Print level/edge extra information 22 config GENERIC_IRQ_SHOW_LEVEL 23 bool 24 25 # Supports effective affinity mask 26 config GENERIC_IRQ_EFFECTIVE_AFF_MASK 27 depends on SMP 28 bool 29 30 # Support for delayed migration from interrupt context 31 config GENERIC_PENDING_IRQ 32 bool 33 34 # Deduce delayed migration from top-level interrupt chip flags 35 config GENERIC_PENDING_IRQ_CHIPFLAGS 36 bool 37 38 # Support for generic irq migrating off cpu before the cpu is offline. 39 config GENERIC_IRQ_MIGRATION 40 bool 41 42 # Alpha specific irq affinity mechanism 43 config AUTO_IRQ_AFFINITY 44 bool 45 46 # Interrupt injection mechanism 47 config GENERIC_IRQ_INJECTION 48 bool 49 50 # Tasklet based software resend for pending interrupts on enable_irq() 51 config HARDIRQS_SW_RESEND 52 bool 53 54 # Edge style eoi based handler (cell) 55 config IRQ_EDGE_EOI_HANDLER 56 bool 57 58 # Generic configurable interrupt chip implementation 59 config GENERIC_IRQ_CHIP 60 bool 61 select IRQ_DOMAIN 62 63 # Generic irq_domain hw <--> linux irq number translation 64 config IRQ_DOMAIN 65 bool 66 67 # Support for simulated interrupts 68 config IRQ_SIM 69 bool 70 select IRQ_WORK 71 select IRQ_DOMAIN 72 73 # Support for hierarchical irq domains 74 config IRQ_DOMAIN_HIERARCHY 75 bool 76 select IRQ_DOMAIN 77 78 # Support for obsolete non-mapping irq domains 79 config IRQ_DOMAIN_NOMAP 80 bool 81 select IRQ_DOMAIN 82 83 # Support for hierarchical fasteoi+edge and fasteoi+level handlers 84 config IRQ_FASTEOI_HIERARCHY_HANDLERS 85 bool 86 87 # Generic IRQ IPI support 88 config GENERIC_IRQ_IPI 89 bool 90 depends on SMP 91 select IRQ_DOMAIN_HIERARCHY 92 93 # Generic IRQ IPI Mux support 94 config GENERIC_IRQ_IPI_MUX 95 bool 96 depends on SMP 97 98 # Generic MSI hierarchical interrupt domain support 99 config GENERIC_MSI_IRQ 100 bool 101 select IRQ_DOMAIN_HIERARCHY 102 103 config IRQ_MSI_IOMMU 104 bool 105 106 config IRQ_TIMINGS 107 bool 108 109 config GENERIC_IRQ_MATRIX_ALLOCATOR 110 bool 111 112 config GENERIC_IRQ_RESERVATION_MODE 113 bool 114 115 # Snapshot for interrupt statistics 116 config GENERIC_IRQ_STAT_SNAPSHOT 117 bool 118 119 # Support forced irq threading 120 config IRQ_FORCED_THREADING 121 bool 122 123 config SPARSE_IRQ 124 bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ 125 help 126 127 Sparse irq numbering is useful for distro kernels that want 128 to define a high CONFIG_NR_CPUS value but still want to have 129 low kernel memory footprint on smaller machines. 130 131 ( Sparse irqs can also be beneficial on NUMA boxes, as they spread 132 out the interrupt descriptors in a more NUMA-friendly way. ) 133 134 If you don't know what to do here, say N. 135 136 config GENERIC_IRQ_DEBUGFS 137 bool "Expose irq internals in debugfs" 138 depends on DEBUG_FS 139 select GENERIC_IRQ_INJECTION 140 default n 141 help 142 143 Exposes internal state information through debugfs. Mostly for 144 developers and debugging of hard to diagnose interrupt problems. 145 146 If you don't know what to do here, say N. 147 148 # Clear forwarded VM interrupts during kexec. 149 # This option ensures the kernel clears active states for interrupts 150 # forwarded to virtual machines (VMs) during a machine kexec. 151 config GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD 152 bool 153 154 endmenu 155 156 config GENERIC_IRQ_MULTI_HANDLER 157 bool 158 help 159 Allow to specify the low level IRQ handler at run time. 160 161 # Cavium Octeon is the last system to use this deprecated option 162 # Do not even think of enabling this on any new platform 163 config DEPRECATED_IRQ_CPU_ONOFFLINE 164 bool 165 depends on CAVIUM_OCTEON_SOC 166 default CAVIUM_OCTEON_SOC 167