1d9817ebeSThomas Gleixnermenu "IRQ subsystem" 2d9817ebeSThomas Gleixner# Options selectable by the architecture code 3c68fd4f3SThomas Gleixner 4c68fd4f3SThomas Gleixner# Make sparse irq Kconfig switch below available 52ed86b16SRob Herringconfig MAY_HAVE_SPARSE_IRQ 6fd4afaf3SJan Beulich bool 7d9817ebeSThomas Gleixner 8c940e01cSThomas Gleixner# Legacy support, required for itanic 9c940e01cSThomas Gleixnerconfig GENERIC_IRQ_LEGACY 10c940e01cSThomas Gleixner bool 11c940e01cSThomas Gleixner 12c68fd4f3SThomas Gleixner# Enable the generic irq autoprobe mechanism 13d9817ebeSThomas Gleixnerconfig GENERIC_IRQ_PROBE 14fd4afaf3SJan Beulich bool 15d9817ebeSThomas Gleixner 16c68fd4f3SThomas Gleixner# Use the generic /proc/interrupts implementation 17c78b9b65SThomas Gleixnerconfig GENERIC_IRQ_SHOW 18fd4afaf3SJan Beulich bool 19c78b9b65SThomas Gleixner 20ab7798ffSThomas Gleixner# Print level/edge extra information 21ab7798ffSThomas Gleixnerconfig GENERIC_IRQ_SHOW_LEVEL 22ab7798ffSThomas Gleixner bool 23ab7798ffSThomas Gleixner 247b6ef126SThomas Gleixner# Facility to allocate a hardware interrupt. This is legacy support 257b6ef126SThomas Gleixner# and should not be used in new code. Use irq domains instead. 267b6ef126SThomas Gleixnerconfig GENERIC_IRQ_LEGACY_ALLOC_HWIRQ 277b6ef126SThomas Gleixner bool 287b6ef126SThomas Gleixner 29c68fd4f3SThomas Gleixner# Support for delayed migration from interrupt context 30d9817ebeSThomas Gleixnerconfig GENERIC_PENDING_IRQ 31fd4afaf3SJan Beulich bool 32d9817ebeSThomas Gleixner 33*f1e0bb0aSYang Yingliang# Support for generic irq migrating off cpu before the cpu is offline. 34*f1e0bb0aSYang Yingliangconfig GENERIC_IRQ_MIGRATION 35*f1e0bb0aSYang Yingliang bool 36*f1e0bb0aSYang Yingliang 37c68fd4f3SThomas Gleixner# Alpha specific irq affinity mechanism 38d9817ebeSThomas Gleixnerconfig AUTO_IRQ_AFFINITY 39fd4afaf3SJan Beulich bool 40d9817ebeSThomas Gleixner 41c68fd4f3SThomas Gleixner# Tasklet based software resend for pending interrupts on enable_irq() 42d9817ebeSThomas Gleixnerconfig HARDIRQS_SW_RESEND 43fd4afaf3SJan Beulich bool 44d9817ebeSThomas Gleixner 45c68fd4f3SThomas Gleixner# Preflow handler support for fasteoi (sparc64) 4678129576SThomas Gleixnerconfig IRQ_PREFLOW_FASTEOI 47fd4afaf3SJan Beulich bool 4878129576SThomas Gleixner 490521c8fbSThomas Gleixner# Edge style eoi based handler (cell) 500521c8fbSThomas Gleixnerconfig IRQ_EDGE_EOI_HANDLER 510521c8fbSThomas Gleixner bool 520521c8fbSThomas Gleixner 53c42321c7SThomas Gleixner# Generic configurable interrupt chip implementation 54c42321c7SThomas Gleixnerconfig GENERIC_IRQ_CHIP 55c42321c7SThomas Gleixner bool 56923fa4eaSNitin A Kamble select IRQ_DOMAIN 57c42321c7SThomas Gleixner 5808a543adSGrant Likely# Generic irq_domain hw <--> linux irq number translation 5908a543adSGrant Likelyconfig IRQ_DOMAIN 6008a543adSGrant Likely bool 6108a543adSGrant Likely 62f8264e34SJiang Liu# Support for hierarchical irq domains 63f8264e34SJiang Liuconfig IRQ_DOMAIN_HIERARCHY 64f8264e34SJiang Liu bool 65f8264e34SJiang Liu select IRQ_DOMAIN 66f8264e34SJiang Liu 67f3cf8bb0SJiang Liu# Generic MSI interrupt support 68f3cf8bb0SJiang Liuconfig GENERIC_MSI_IRQ 69f3cf8bb0SJiang Liu bool 70f3cf8bb0SJiang Liu 71f3cf8bb0SJiang Liu# Generic MSI hierarchical interrupt domain support 72f3cf8bb0SJiang Liuconfig GENERIC_MSI_IRQ_DOMAIN 73f3cf8bb0SJiang Liu bool 74f3cf8bb0SJiang Liu select IRQ_DOMAIN_HIERARCHY 75f3cf8bb0SJiang Liu select GENERIC_MSI_IRQ 76f3cf8bb0SJiang Liu 7776ba59f8SMarc Zyngierconfig HANDLE_DOMAIN_IRQ 7876ba59f8SMarc Zyngier bool 7976ba59f8SMarc Zyngier 80092b2fb0SGrant Likelyconfig IRQ_DOMAIN_DEBUG 81092b2fb0SGrant Likely bool "Expose hardware/virtual IRQ mapping via debugfs" 82092b2fb0SGrant Likely depends on IRQ_DOMAIN && DEBUG_FS 83092b2fb0SGrant Likely help 84092b2fb0SGrant Likely This option will show the mapping relationship between hardware irq 85092b2fb0SGrant Likely numbers and Linux irq numbers. The mapping is exposed via debugfs 86ac5830a3SMika Westerberg in the file "irq_domain_mapping". 87092b2fb0SGrant Likely 88092b2fb0SGrant Likely If you don't know what this means you don't need it. 89092b2fb0SGrant Likely 90c68fd4f3SThomas Gleixner# Support forced irq threading 918d32a307SThomas Gleixnerconfig IRQ_FORCED_THREADING 928d32a307SThomas Gleixner bool 938d32a307SThomas Gleixner 94d9817ebeSThomas Gleixnerconfig SPARSE_IRQ 952ed86b16SRob Herring bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ 96d9817ebeSThomas Gleixner ---help--- 97d9817ebeSThomas Gleixner 98d9817ebeSThomas Gleixner Sparse irq numbering is useful for distro kernels that want 99d9817ebeSThomas Gleixner to define a high CONFIG_NR_CPUS value but still want to have 100d9817ebeSThomas Gleixner low kernel memory footprint on smaller machines. 101d9817ebeSThomas Gleixner 102d9817ebeSThomas Gleixner ( Sparse irqs can also be beneficial on NUMA boxes, as they spread 103d9817ebeSThomas Gleixner out the interrupt descriptors in a more NUMA-friendly way. ) 104d9817ebeSThomas Gleixner 105d9817ebeSThomas Gleixner If you don't know what to do here, say N. 106d9817ebeSThomas Gleixner 107d9817ebeSThomas Gleixnerendmenu 108