1c68fd4f3SThomas Gleixner# Select this to activate the generic irq options below 2d9817ebeSThomas Gleixnerconfig HAVE_GENERIC_HARDIRQS 3fd4afaf3SJan Beulich bool 4d9817ebeSThomas Gleixner 5d9817ebeSThomas Gleixnerif HAVE_GENERIC_HARDIRQS 6d9817ebeSThomas Gleixnermenu "IRQ subsystem" 7d9817ebeSThomas Gleixner# 8d9817ebeSThomas Gleixner# Interrupt subsystem related configuration options 9d9817ebeSThomas Gleixner# 10d9817ebeSThomas Gleixnerconfig GENERIC_HARDIRQS 11d9817ebeSThomas Gleixner def_bool y 12d9817ebeSThomas Gleixner 13d9817ebeSThomas Gleixner# Options selectable by the architecture code 14c68fd4f3SThomas Gleixner 15c68fd4f3SThomas Gleixner# Make sparse irq Kconfig switch below available 16d9817ebeSThomas Gleixnerconfig HAVE_SPARSE_IRQ 17fd4afaf3SJan Beulich bool 18d9817ebeSThomas Gleixner 19c68fd4f3SThomas Gleixner# Enable the generic irq autoprobe mechanism 20d9817ebeSThomas Gleixnerconfig GENERIC_IRQ_PROBE 21fd4afaf3SJan Beulich bool 22d9817ebeSThomas Gleixner 23c68fd4f3SThomas Gleixner# Use the generic /proc/interrupts implementation 24c78b9b65SThomas Gleixnerconfig GENERIC_IRQ_SHOW 25fd4afaf3SJan Beulich bool 26c78b9b65SThomas Gleixner 27ab7798ffSThomas Gleixner# Print level/edge extra information 28ab7798ffSThomas Gleixnerconfig GENERIC_IRQ_SHOW_LEVEL 29ab7798ffSThomas Gleixner bool 30ab7798ffSThomas Gleixner 31c68fd4f3SThomas Gleixner# Support for delayed migration from interrupt context 32d9817ebeSThomas Gleixnerconfig GENERIC_PENDING_IRQ 33fd4afaf3SJan Beulich bool 34d9817ebeSThomas Gleixner 35c68fd4f3SThomas Gleixner# Alpha specific irq affinity mechanism 36d9817ebeSThomas Gleixnerconfig AUTO_IRQ_AFFINITY 37fd4afaf3SJan Beulich bool 38d9817ebeSThomas Gleixner 39c68fd4f3SThomas Gleixner# Tasklet based software resend for pending interrupts on enable_irq() 40d9817ebeSThomas Gleixnerconfig HARDIRQS_SW_RESEND 41fd4afaf3SJan Beulich bool 42d9817ebeSThomas Gleixner 43c68fd4f3SThomas Gleixner# Preflow handler support for fasteoi (sparc64) 4478129576SThomas Gleixnerconfig IRQ_PREFLOW_FASTEOI 45fd4afaf3SJan Beulich bool 4678129576SThomas Gleixner 470521c8fbSThomas Gleixner# Edge style eoi based handler (cell) 480521c8fbSThomas Gleixnerconfig IRQ_EDGE_EOI_HANDLER 490521c8fbSThomas Gleixner bool 500521c8fbSThomas Gleixner 51*c42321c7SThomas Gleixner# Generic configurable interrupt chip implementation 52*c42321c7SThomas Gleixnerconfig GENERIC_IRQ_CHIP 53*c42321c7SThomas Gleixner bool 54*c42321c7SThomas Gleixner 55c68fd4f3SThomas Gleixner# Support forced irq threading 568d32a307SThomas Gleixnerconfig IRQ_FORCED_THREADING 578d32a307SThomas Gleixner bool 588d32a307SThomas Gleixner 59d9817ebeSThomas Gleixnerconfig SPARSE_IRQ 60d9817ebeSThomas Gleixner bool "Support sparse irq numbering" 61d9817ebeSThomas Gleixner depends on HAVE_SPARSE_IRQ 62d9817ebeSThomas Gleixner ---help--- 63d9817ebeSThomas Gleixner 64d9817ebeSThomas Gleixner Sparse irq numbering is useful for distro kernels that want 65d9817ebeSThomas Gleixner to define a high CONFIG_NR_CPUS value but still want to have 66d9817ebeSThomas Gleixner low kernel memory footprint on smaller machines. 67d9817ebeSThomas Gleixner 68d9817ebeSThomas Gleixner ( Sparse irqs can also be beneficial on NUMA boxes, as they spread 69d9817ebeSThomas Gleixner out the interrupt descriptors in a more NUMA-friendly way. ) 70d9817ebeSThomas Gleixner 71d9817ebeSThomas Gleixner If you don't know what to do here, say N. 72d9817ebeSThomas Gleixner 73d9817ebeSThomas Gleixnerendmenu 74d9817ebeSThomas Gleixnerendif 75