1d9817ebeSThomas Gleixnermenu "IRQ subsystem" 2d9817ebeSThomas Gleixner# Options selectable by the architecture code 3c68fd4f3SThomas Gleixner 4c68fd4f3SThomas Gleixner# Make sparse irq Kconfig switch below available 52ed86b16SRob Herringconfig MAY_HAVE_SPARSE_IRQ 6fd4afaf3SJan Beulich bool 7d9817ebeSThomas Gleixner 8c940e01cSThomas Gleixner# Legacy support, required for itanic 9c940e01cSThomas Gleixnerconfig GENERIC_IRQ_LEGACY 10c940e01cSThomas Gleixner bool 11c940e01cSThomas Gleixner 12c68fd4f3SThomas Gleixner# Enable the generic irq autoprobe mechanism 13d9817ebeSThomas Gleixnerconfig GENERIC_IRQ_PROBE 14fd4afaf3SJan Beulich bool 15d9817ebeSThomas Gleixner 16c68fd4f3SThomas Gleixner# Use the generic /proc/interrupts implementation 17c78b9b65SThomas Gleixnerconfig GENERIC_IRQ_SHOW 18fd4afaf3SJan Beulich bool 19c78b9b65SThomas Gleixner 20ab7798ffSThomas Gleixner# Print level/edge extra information 21ab7798ffSThomas Gleixnerconfig GENERIC_IRQ_SHOW_LEVEL 22ab7798ffSThomas Gleixner bool 23ab7798ffSThomas Gleixner 240d3f5425SThomas Gleixner# Supports effective affinity mask 250d3f5425SThomas Gleixnerconfig GENERIC_IRQ_EFFECTIVE_AFF_MASK 260d3f5425SThomas Gleixner bool 270d3f5425SThomas Gleixner 287b6ef126SThomas Gleixner# Facility to allocate a hardware interrupt. This is legacy support 297b6ef126SThomas Gleixner# and should not be used in new code. Use irq domains instead. 307b6ef126SThomas Gleixnerconfig GENERIC_IRQ_LEGACY_ALLOC_HWIRQ 317b6ef126SThomas Gleixner bool 327b6ef126SThomas Gleixner 33c68fd4f3SThomas Gleixner# Support for delayed migration from interrupt context 34d9817ebeSThomas Gleixnerconfig GENERIC_PENDING_IRQ 35fd4afaf3SJan Beulich bool 36d9817ebeSThomas Gleixner 37f1e0bb0aSYang Yingliang# Support for generic irq migrating off cpu before the cpu is offline. 38f1e0bb0aSYang Yingliangconfig GENERIC_IRQ_MIGRATION 39f1e0bb0aSYang Yingliang bool 40f1e0bb0aSYang Yingliang 41c68fd4f3SThomas Gleixner# Alpha specific irq affinity mechanism 42d9817ebeSThomas Gleixnerconfig AUTO_IRQ_AFFINITY 43fd4afaf3SJan Beulich bool 44d9817ebeSThomas Gleixner 45c68fd4f3SThomas Gleixner# Tasklet based software resend for pending interrupts on enable_irq() 46d9817ebeSThomas Gleixnerconfig HARDIRQS_SW_RESEND 47fd4afaf3SJan Beulich bool 48d9817ebeSThomas Gleixner 49c68fd4f3SThomas Gleixner# Preflow handler support for fasteoi (sparc64) 5078129576SThomas Gleixnerconfig IRQ_PREFLOW_FASTEOI 51fd4afaf3SJan Beulich bool 5278129576SThomas Gleixner 530521c8fbSThomas Gleixner# Edge style eoi based handler (cell) 540521c8fbSThomas Gleixnerconfig IRQ_EDGE_EOI_HANDLER 550521c8fbSThomas Gleixner bool 560521c8fbSThomas Gleixner 57c42321c7SThomas Gleixner# Generic configurable interrupt chip implementation 58c42321c7SThomas Gleixnerconfig GENERIC_IRQ_CHIP 59c42321c7SThomas Gleixner bool 60923fa4eaSNitin A Kamble select IRQ_DOMAIN 61c42321c7SThomas Gleixner 6208a543adSGrant Likely# Generic irq_domain hw <--> linux irq number translation 6308a543adSGrant Likelyconfig IRQ_DOMAIN 6408a543adSGrant Likely bool 6508a543adSGrant Likely 66f8264e34SJiang Liu# Support for hierarchical irq domains 67f8264e34SJiang Liuconfig IRQ_DOMAIN_HIERARCHY 68f8264e34SJiang Liu bool 69f8264e34SJiang Liu select IRQ_DOMAIN 70f8264e34SJiang Liu 71379b6564SQais Yousef# Generic IRQ IPI support 72379b6564SQais Yousefconfig GENERIC_IRQ_IPI 73379b6564SQais Yousef bool 74379b6564SQais Yousef 75f3cf8bb0SJiang Liu# Generic MSI interrupt support 76f3cf8bb0SJiang Liuconfig GENERIC_MSI_IRQ 77f3cf8bb0SJiang Liu bool 78f3cf8bb0SJiang Liu 79f3cf8bb0SJiang Liu# Generic MSI hierarchical interrupt domain support 80f3cf8bb0SJiang Liuconfig GENERIC_MSI_IRQ_DOMAIN 81f3cf8bb0SJiang Liu bool 82f3cf8bb0SJiang Liu select IRQ_DOMAIN_HIERARCHY 83f3cf8bb0SJiang Liu select GENERIC_MSI_IRQ 84f3cf8bb0SJiang Liu 8576ba59f8SMarc Zyngierconfig HANDLE_DOMAIN_IRQ 8676ba59f8SMarc Zyngier bool 8776ba59f8SMarc Zyngier 88*b2d3d61aSDaniel Lezcanoconfig IRQ_TIMINGS 89*b2d3d61aSDaniel Lezcano bool 90*b2d3d61aSDaniel Lezcano 91092b2fb0SGrant Likelyconfig IRQ_DOMAIN_DEBUG 92092b2fb0SGrant Likely bool "Expose hardware/virtual IRQ mapping via debugfs" 93092b2fb0SGrant Likely depends on IRQ_DOMAIN && DEBUG_FS 94092b2fb0SGrant Likely help 95092b2fb0SGrant Likely This option will show the mapping relationship between hardware irq 96092b2fb0SGrant Likely numbers and Linux irq numbers. The mapping is exposed via debugfs 97ac5830a3SMika Westerberg in the file "irq_domain_mapping". 98092b2fb0SGrant Likely 99092b2fb0SGrant Likely If you don't know what this means you don't need it. 100092b2fb0SGrant Likely 101c68fd4f3SThomas Gleixner# Support forced irq threading 1028d32a307SThomas Gleixnerconfig IRQ_FORCED_THREADING 1038d32a307SThomas Gleixner bool 1048d32a307SThomas Gleixner 105d9817ebeSThomas Gleixnerconfig SPARSE_IRQ 1062ed86b16SRob Herring bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ 107d9817ebeSThomas Gleixner ---help--- 108d9817ebeSThomas Gleixner 109d9817ebeSThomas Gleixner Sparse irq numbering is useful for distro kernels that want 110d9817ebeSThomas Gleixner to define a high CONFIG_NR_CPUS value but still want to have 111d9817ebeSThomas Gleixner low kernel memory footprint on smaller machines. 112d9817ebeSThomas Gleixner 113d9817ebeSThomas Gleixner ( Sparse irqs can also be beneficial on NUMA boxes, as they spread 114d9817ebeSThomas Gleixner out the interrupt descriptors in a more NUMA-friendly way. ) 115d9817ebeSThomas Gleixner 116d9817ebeSThomas Gleixner If you don't know what to do here, say N. 117d9817ebeSThomas Gleixner 118087cdfb6SThomas Gleixnerconfig GENERIC_IRQ_DEBUGFS 119087cdfb6SThomas Gleixner bool "Expose irq internals in debugfs" 120087cdfb6SThomas Gleixner depends on DEBUG_FS 121087cdfb6SThomas Gleixner default n 122087cdfb6SThomas Gleixner ---help--- 123087cdfb6SThomas Gleixner 124087cdfb6SThomas Gleixner Exposes internal state information through debugfs. Mostly for 125087cdfb6SThomas Gleixner developers and debugging of hard to diagnose interrupt problems. 126087cdfb6SThomas Gleixner 127087cdfb6SThomas Gleixner If you don't know what to do here, say N. 128087cdfb6SThomas Gleixner 129d9817ebeSThomas Gleixnerendmenu 130