1d9817ebeSThomas Gleixnermenu "IRQ subsystem" 2d9817ebeSThomas Gleixner# Options selectable by the architecture code 3c68fd4f3SThomas Gleixner 4c68fd4f3SThomas Gleixner# Make sparse irq Kconfig switch below available 52ed86b16SRob Herringconfig MAY_HAVE_SPARSE_IRQ 6fd4afaf3SJan Beulich bool 7d9817ebeSThomas Gleixner 8c68fd4f3SThomas Gleixner# Enable the generic irq autoprobe mechanism 9d9817ebeSThomas Gleixnerconfig GENERIC_IRQ_PROBE 10fd4afaf3SJan Beulich bool 11d9817ebeSThomas Gleixner 12c68fd4f3SThomas Gleixner# Use the generic /proc/interrupts implementation 13c78b9b65SThomas Gleixnerconfig GENERIC_IRQ_SHOW 14fd4afaf3SJan Beulich bool 15c78b9b65SThomas Gleixner 16ab7798ffSThomas Gleixner# Print level/edge extra information 17ab7798ffSThomas Gleixnerconfig GENERIC_IRQ_SHOW_LEVEL 18ab7798ffSThomas Gleixner bool 19ab7798ffSThomas Gleixner 20c68fd4f3SThomas Gleixner# Support for delayed migration from interrupt context 21d9817ebeSThomas Gleixnerconfig GENERIC_PENDING_IRQ 22fd4afaf3SJan Beulich bool 23d9817ebeSThomas Gleixner 24c68fd4f3SThomas Gleixner# Alpha specific irq affinity mechanism 25d9817ebeSThomas Gleixnerconfig AUTO_IRQ_AFFINITY 26fd4afaf3SJan Beulich bool 27d9817ebeSThomas Gleixner 28c68fd4f3SThomas Gleixner# Tasklet based software resend for pending interrupts on enable_irq() 29d9817ebeSThomas Gleixnerconfig HARDIRQS_SW_RESEND 30fd4afaf3SJan Beulich bool 31d9817ebeSThomas Gleixner 32c68fd4f3SThomas Gleixner# Preflow handler support for fasteoi (sparc64) 3378129576SThomas Gleixnerconfig IRQ_PREFLOW_FASTEOI 34fd4afaf3SJan Beulich bool 3578129576SThomas Gleixner 360521c8fbSThomas Gleixner# Edge style eoi based handler (cell) 370521c8fbSThomas Gleixnerconfig IRQ_EDGE_EOI_HANDLER 380521c8fbSThomas Gleixner bool 390521c8fbSThomas Gleixner 40c42321c7SThomas Gleixner# Generic configurable interrupt chip implementation 41c42321c7SThomas Gleixnerconfig GENERIC_IRQ_CHIP 42c42321c7SThomas Gleixner bool 43*923fa4eaSNitin A Kamble select IRQ_DOMAIN 44c42321c7SThomas Gleixner 4508a543adSGrant Likely# Generic irq_domain hw <--> linux irq number translation 4608a543adSGrant Likelyconfig IRQ_DOMAIN 4708a543adSGrant Likely bool 4808a543adSGrant Likely 49092b2fb0SGrant Likelyconfig IRQ_DOMAIN_DEBUG 50092b2fb0SGrant Likely bool "Expose hardware/virtual IRQ mapping via debugfs" 51092b2fb0SGrant Likely depends on IRQ_DOMAIN && DEBUG_FS 52092b2fb0SGrant Likely help 53092b2fb0SGrant Likely This option will show the mapping relationship between hardware irq 54092b2fb0SGrant Likely numbers and Linux irq numbers. The mapping is exposed via debugfs 55ac5830a3SMika Westerberg in the file "irq_domain_mapping". 56092b2fb0SGrant Likely 57092b2fb0SGrant Likely If you don't know what this means you don't need it. 58092b2fb0SGrant Likely 59c68fd4f3SThomas Gleixner# Support forced irq threading 608d32a307SThomas Gleixnerconfig IRQ_FORCED_THREADING 618d32a307SThomas Gleixner bool 628d32a307SThomas Gleixner 63d9817ebeSThomas Gleixnerconfig SPARSE_IRQ 642ed86b16SRob Herring bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ 65d9817ebeSThomas Gleixner ---help--- 66d9817ebeSThomas Gleixner 67d9817ebeSThomas Gleixner Sparse irq numbering is useful for distro kernels that want 68d9817ebeSThomas Gleixner to define a high CONFIG_NR_CPUS value but still want to have 69d9817ebeSThomas Gleixner low kernel memory footprint on smaller machines. 70d9817ebeSThomas Gleixner 71d9817ebeSThomas Gleixner ( Sparse irqs can also be beneficial on NUMA boxes, as they spread 72d9817ebeSThomas Gleixner out the interrupt descriptors in a more NUMA-friendly way. ) 73d9817ebeSThomas Gleixner 74d9817ebeSThomas Gleixner If you don't know what to do here, say N. 75d9817ebeSThomas Gleixner 76d9817ebeSThomas Gleixnerendmenu 77