1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Dynamic DMA mapping support. 4 * 5 * This implementation is a fallback for platforms that do not support 6 * I/O TLBs (aka DMA address translation hardware). 7 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> 8 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> 9 * Copyright (C) 2000, 2003 Hewlett-Packard Co 10 * David Mosberger-Tang <davidm@hpl.hp.com> 11 * 12 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. 13 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid 14 * unnecessary i-cache flushing. 15 * 04/07/.. ak Better overflow handling. Assorted fixes. 16 * 05/09/10 linville Add support for syncing ranges, support syncing for 17 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. 18 * 08/12/11 beckyb Add highmem support 19 */ 20 21 #define pr_fmt(fmt) "software IO TLB: " fmt 22 23 #include <linux/cache.h> 24 #include <linux/cc_platform.h> 25 #include <linux/ctype.h> 26 #include <linux/debugfs.h> 27 #include <linux/dma-direct.h> 28 #include <linux/dma-map-ops.h> 29 #include <linux/export.h> 30 #include <linux/gfp.h> 31 #include <linux/highmem.h> 32 #include <linux/io.h> 33 #include <linux/iommu-helper.h> 34 #include <linux/init.h> 35 #include <linux/memblock.h> 36 #include <linux/mm.h> 37 #include <linux/pfn.h> 38 #include <linux/scatterlist.h> 39 #include <linux/set_memory.h> 40 #include <linux/spinlock.h> 41 #include <linux/string.h> 42 #include <linux/swiotlb.h> 43 #include <linux/types.h> 44 #ifdef CONFIG_DMA_RESTRICTED_POOL 45 #include <linux/of.h> 46 #include <linux/of_fdt.h> 47 #include <linux/of_reserved_mem.h> 48 #include <linux/slab.h> 49 #endif 50 51 #define CREATE_TRACE_POINTS 52 #include <trace/events/swiotlb.h> 53 54 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) 55 56 /* 57 * Minimum IO TLB size to bother booting with. Systems with mainly 58 * 64bit capable cards will only lightly use the swiotlb. If we can't 59 * allocate a contiguous 1MB, we're probably in trouble anyway. 60 */ 61 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) 62 63 #define INVALID_PHYS_ADDR (~(phys_addr_t)0) 64 65 enum swiotlb_force swiotlb_force; 66 67 struct io_tlb_mem io_tlb_default_mem; 68 69 phys_addr_t swiotlb_unencrypted_base; 70 71 /* 72 * Max segment that we can provide which (if pages are contingous) will 73 * not be bounced (unless SWIOTLB_FORCE is set). 74 */ 75 static unsigned int max_segment; 76 77 static unsigned long default_nslabs = IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT; 78 79 static int __init 80 setup_io_tlb_npages(char *str) 81 { 82 if (isdigit(*str)) { 83 /* avoid tail segment of size < IO_TLB_SEGSIZE */ 84 default_nslabs = 85 ALIGN(simple_strtoul(str, &str, 0), IO_TLB_SEGSIZE); 86 } 87 if (*str == ',') 88 ++str; 89 if (!strcmp(str, "force")) 90 swiotlb_force = SWIOTLB_FORCE; 91 else if (!strcmp(str, "noforce")) 92 swiotlb_force = SWIOTLB_NO_FORCE; 93 94 return 0; 95 } 96 early_param("swiotlb", setup_io_tlb_npages); 97 98 unsigned int swiotlb_max_segment(void) 99 { 100 return io_tlb_default_mem.nslabs ? max_segment : 0; 101 } 102 EXPORT_SYMBOL_GPL(swiotlb_max_segment); 103 104 void swiotlb_set_max_segment(unsigned int val) 105 { 106 if (swiotlb_force == SWIOTLB_FORCE) 107 max_segment = 1; 108 else 109 max_segment = rounddown(val, PAGE_SIZE); 110 } 111 112 unsigned long swiotlb_size_or_default(void) 113 { 114 return default_nslabs << IO_TLB_SHIFT; 115 } 116 117 void __init swiotlb_adjust_size(unsigned long size) 118 { 119 /* 120 * If swiotlb parameter has not been specified, give a chance to 121 * architectures such as those supporting memory encryption to 122 * adjust/expand SWIOTLB size for their use. 123 */ 124 if (default_nslabs != IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT) 125 return; 126 size = ALIGN(size, IO_TLB_SIZE); 127 default_nslabs = ALIGN(size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE); 128 pr_info("SWIOTLB bounce buffer size adjusted to %luMB", size >> 20); 129 } 130 131 void swiotlb_print_info(void) 132 { 133 struct io_tlb_mem *mem = &io_tlb_default_mem; 134 135 if (!mem->nslabs) { 136 pr_warn("No low mem\n"); 137 return; 138 } 139 140 pr_info("mapped [mem %pa-%pa] (%luMB)\n", &mem->start, &mem->end, 141 (mem->nslabs << IO_TLB_SHIFT) >> 20); 142 } 143 144 static inline unsigned long io_tlb_offset(unsigned long val) 145 { 146 return val & (IO_TLB_SEGSIZE - 1); 147 } 148 149 static inline unsigned long nr_slots(u64 val) 150 { 151 return DIV_ROUND_UP(val, IO_TLB_SIZE); 152 } 153 154 /* 155 * Remap swioltb memory in the unencrypted physical address space 156 * when swiotlb_unencrypted_base is set. (e.g. for Hyper-V AMD SEV-SNP 157 * Isolation VMs). 158 */ 159 #ifdef CONFIG_HAS_IOMEM 160 static void *swiotlb_mem_remap(struct io_tlb_mem *mem, unsigned long bytes) 161 { 162 void *vaddr = NULL; 163 164 if (swiotlb_unencrypted_base) { 165 phys_addr_t paddr = mem->start + swiotlb_unencrypted_base; 166 167 vaddr = memremap(paddr, bytes, MEMREMAP_WB); 168 if (!vaddr) 169 pr_err("Failed to map the unencrypted memory %pa size %lx.\n", 170 &paddr, bytes); 171 } 172 173 return vaddr; 174 } 175 #else 176 static void *swiotlb_mem_remap(struct io_tlb_mem *mem, unsigned long bytes) 177 { 178 return NULL; 179 } 180 #endif 181 182 /* 183 * Early SWIOTLB allocation may be too early to allow an architecture to 184 * perform the desired operations. This function allows the architecture to 185 * call SWIOTLB when the operations are possible. It needs to be called 186 * before the SWIOTLB memory is used. 187 */ 188 void __init swiotlb_update_mem_attributes(void) 189 { 190 struct io_tlb_mem *mem = &io_tlb_default_mem; 191 void *vaddr; 192 unsigned long bytes; 193 194 if (!mem->nslabs || mem->late_alloc) 195 return; 196 vaddr = phys_to_virt(mem->start); 197 bytes = PAGE_ALIGN(mem->nslabs << IO_TLB_SHIFT); 198 set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT); 199 200 mem->vaddr = swiotlb_mem_remap(mem, bytes); 201 if (!mem->vaddr) 202 mem->vaddr = vaddr; 203 } 204 205 static void swiotlb_init_io_tlb_mem(struct io_tlb_mem *mem, phys_addr_t start, 206 unsigned long nslabs, bool late_alloc) 207 { 208 void *vaddr = phys_to_virt(start); 209 unsigned long bytes = nslabs << IO_TLB_SHIFT, i; 210 211 mem->nslabs = nslabs; 212 mem->start = start; 213 mem->end = mem->start + bytes; 214 mem->index = 0; 215 mem->late_alloc = late_alloc; 216 217 if (swiotlb_force == SWIOTLB_FORCE) 218 mem->force_bounce = true; 219 220 spin_lock_init(&mem->lock); 221 for (i = 0; i < mem->nslabs; i++) { 222 mem->slots[i].list = IO_TLB_SEGSIZE - io_tlb_offset(i); 223 mem->slots[i].orig_addr = INVALID_PHYS_ADDR; 224 mem->slots[i].alloc_size = 0; 225 } 226 227 /* 228 * If swiotlb_unencrypted_base is set, the bounce buffer memory will 229 * be remapped and cleared in swiotlb_update_mem_attributes. 230 */ 231 if (swiotlb_unencrypted_base) 232 return; 233 234 memset(vaddr, 0, bytes); 235 mem->vaddr = vaddr; 236 return; 237 } 238 239 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) 240 { 241 struct io_tlb_mem *mem = &io_tlb_default_mem; 242 size_t alloc_size; 243 244 if (swiotlb_force == SWIOTLB_NO_FORCE) 245 return 0; 246 247 /* protect against double initialization */ 248 if (WARN_ON_ONCE(mem->nslabs)) 249 return -ENOMEM; 250 251 alloc_size = PAGE_ALIGN(array_size(sizeof(*mem->slots), nslabs)); 252 mem->slots = memblock_alloc(alloc_size, PAGE_SIZE); 253 if (!mem->slots) 254 panic("%s: Failed to allocate %zu bytes align=0x%lx\n", 255 __func__, alloc_size, PAGE_SIZE); 256 257 swiotlb_init_io_tlb_mem(mem, __pa(tlb), nslabs, false); 258 259 if (verbose) 260 swiotlb_print_info(); 261 swiotlb_set_max_segment(mem->nslabs << IO_TLB_SHIFT); 262 return 0; 263 } 264 265 /* 266 * Statically reserve bounce buffer space and initialize bounce buffer data 267 * structures for the software IO TLB used to implement the DMA API. 268 */ 269 void __init 270 swiotlb_init(int verbose) 271 { 272 size_t bytes = PAGE_ALIGN(default_nslabs << IO_TLB_SHIFT); 273 void *tlb; 274 275 if (swiotlb_force == SWIOTLB_NO_FORCE) 276 return; 277 278 /* Get IO TLB memory from the low pages */ 279 tlb = memblock_alloc_low(bytes, PAGE_SIZE); 280 if (!tlb) 281 goto fail; 282 if (swiotlb_init_with_tbl(tlb, default_nslabs, verbose)) 283 goto fail_free_mem; 284 return; 285 286 fail_free_mem: 287 memblock_free(tlb, bytes); 288 fail: 289 pr_warn("Cannot allocate buffer"); 290 } 291 292 /* 293 * Systems with larger DMA zones (those that don't support ISA) can 294 * initialize the swiotlb later using the slab allocator if needed. 295 * This should be just like above, but with some error catching. 296 */ 297 int 298 swiotlb_late_init_with_default_size(size_t default_size) 299 { 300 unsigned long nslabs = 301 ALIGN(default_size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE); 302 unsigned long bytes; 303 unsigned char *vstart = NULL; 304 unsigned int order; 305 int rc = 0; 306 307 if (swiotlb_force == SWIOTLB_NO_FORCE) 308 return 0; 309 310 /* 311 * Get IO TLB memory from the low pages 312 */ 313 order = get_order(nslabs << IO_TLB_SHIFT); 314 nslabs = SLABS_PER_PAGE << order; 315 bytes = nslabs << IO_TLB_SHIFT; 316 317 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { 318 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, 319 order); 320 if (vstart) 321 break; 322 order--; 323 } 324 325 if (!vstart) 326 return -ENOMEM; 327 328 if (order != get_order(bytes)) { 329 pr_warn("only able to allocate %ld MB\n", 330 (PAGE_SIZE << order) >> 20); 331 nslabs = SLABS_PER_PAGE << order; 332 } 333 rc = swiotlb_late_init_with_tbl(vstart, nslabs); 334 if (rc) 335 free_pages((unsigned long)vstart, order); 336 337 return rc; 338 } 339 340 int 341 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) 342 { 343 struct io_tlb_mem *mem = &io_tlb_default_mem; 344 unsigned long bytes = nslabs << IO_TLB_SHIFT; 345 346 if (swiotlb_force == SWIOTLB_NO_FORCE) 347 return 0; 348 349 /* protect against double initialization */ 350 if (WARN_ON_ONCE(mem->nslabs)) 351 return -ENOMEM; 352 353 mem->slots = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 354 get_order(array_size(sizeof(*mem->slots), nslabs))); 355 if (!mem->slots) 356 return -ENOMEM; 357 358 set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT); 359 swiotlb_init_io_tlb_mem(mem, virt_to_phys(tlb), nslabs, true); 360 361 swiotlb_print_info(); 362 swiotlb_set_max_segment(mem->nslabs << IO_TLB_SHIFT); 363 return 0; 364 } 365 366 void __init swiotlb_exit(void) 367 { 368 struct io_tlb_mem *mem = &io_tlb_default_mem; 369 unsigned long tbl_vaddr; 370 size_t tbl_size, slots_size; 371 372 if (!mem->nslabs) 373 return; 374 375 pr_info("tearing down default memory pool\n"); 376 tbl_vaddr = (unsigned long)phys_to_virt(mem->start); 377 tbl_size = PAGE_ALIGN(mem->end - mem->start); 378 slots_size = PAGE_ALIGN(array_size(sizeof(*mem->slots), mem->nslabs)); 379 380 set_memory_encrypted(tbl_vaddr, tbl_size >> PAGE_SHIFT); 381 if (mem->late_alloc) { 382 free_pages(tbl_vaddr, get_order(tbl_size)); 383 free_pages((unsigned long)mem->slots, get_order(slots_size)); 384 } else { 385 memblock_free_late(mem->start, tbl_size); 386 memblock_free_late(__pa(mem->slots), slots_size); 387 } 388 389 memset(mem, 0, sizeof(*mem)); 390 } 391 392 /* 393 * Return the offset into a iotlb slot required to keep the device happy. 394 */ 395 static unsigned int swiotlb_align_offset(struct device *dev, u64 addr) 396 { 397 return addr & dma_get_min_align_mask(dev) & (IO_TLB_SIZE - 1); 398 } 399 400 /* 401 * Bounce: copy the swiotlb buffer from or back to the original dma location 402 */ 403 static void swiotlb_bounce(struct device *dev, phys_addr_t tlb_addr, size_t size, 404 enum dma_data_direction dir) 405 { 406 struct io_tlb_mem *mem = dev->dma_io_tlb_mem; 407 int index = (tlb_addr - mem->start) >> IO_TLB_SHIFT; 408 phys_addr_t orig_addr = mem->slots[index].orig_addr; 409 size_t alloc_size = mem->slots[index].alloc_size; 410 unsigned long pfn = PFN_DOWN(orig_addr); 411 unsigned char *vaddr = mem->vaddr + tlb_addr - mem->start; 412 unsigned int tlb_offset, orig_addr_offset; 413 414 if (orig_addr == INVALID_PHYS_ADDR) 415 return; 416 417 tlb_offset = tlb_addr & (IO_TLB_SIZE - 1); 418 orig_addr_offset = swiotlb_align_offset(dev, orig_addr); 419 if (tlb_offset < orig_addr_offset) { 420 dev_WARN_ONCE(dev, 1, 421 "Access before mapping start detected. orig offset %u, requested offset %u.\n", 422 orig_addr_offset, tlb_offset); 423 return; 424 } 425 426 tlb_offset -= orig_addr_offset; 427 if (tlb_offset > alloc_size) { 428 dev_WARN_ONCE(dev, 1, 429 "Buffer overflow detected. Allocation size: %zu. Mapping size: %zu+%u.\n", 430 alloc_size, size, tlb_offset); 431 return; 432 } 433 434 orig_addr += tlb_offset; 435 alloc_size -= tlb_offset; 436 437 if (size > alloc_size) { 438 dev_WARN_ONCE(dev, 1, 439 "Buffer overflow detected. Allocation size: %zu. Mapping size: %zu.\n", 440 alloc_size, size); 441 size = alloc_size; 442 } 443 444 if (PageHighMem(pfn_to_page(pfn))) { 445 /* The buffer does not have a mapping. Map it in and copy */ 446 unsigned int offset = orig_addr & ~PAGE_MASK; 447 char *buffer; 448 unsigned int sz = 0; 449 unsigned long flags; 450 451 while (size) { 452 sz = min_t(size_t, PAGE_SIZE - offset, size); 453 454 local_irq_save(flags); 455 buffer = kmap_atomic(pfn_to_page(pfn)); 456 if (dir == DMA_TO_DEVICE) 457 memcpy(vaddr, buffer + offset, sz); 458 else 459 memcpy(buffer + offset, vaddr, sz); 460 kunmap_atomic(buffer); 461 local_irq_restore(flags); 462 463 size -= sz; 464 pfn++; 465 vaddr += sz; 466 offset = 0; 467 } 468 } else if (dir == DMA_TO_DEVICE) { 469 memcpy(vaddr, phys_to_virt(orig_addr), size); 470 } else { 471 memcpy(phys_to_virt(orig_addr), vaddr, size); 472 } 473 } 474 475 #define slot_addr(start, idx) ((start) + ((idx) << IO_TLB_SHIFT)) 476 477 /* 478 * Carefully handle integer overflow which can occur when boundary_mask == ~0UL. 479 */ 480 static inline unsigned long get_max_slots(unsigned long boundary_mask) 481 { 482 if (boundary_mask == ~0UL) 483 return 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); 484 return nr_slots(boundary_mask + 1); 485 } 486 487 static unsigned int wrap_index(struct io_tlb_mem *mem, unsigned int index) 488 { 489 if (index >= mem->nslabs) 490 return 0; 491 return index; 492 } 493 494 /* 495 * Find a suitable number of IO TLB entries size that will fit this request and 496 * allocate a buffer from that IO TLB pool. 497 */ 498 static int swiotlb_find_slots(struct device *dev, phys_addr_t orig_addr, 499 size_t alloc_size, unsigned int alloc_align_mask) 500 { 501 struct io_tlb_mem *mem = dev->dma_io_tlb_mem; 502 unsigned long boundary_mask = dma_get_seg_boundary(dev); 503 dma_addr_t tbl_dma_addr = 504 phys_to_dma_unencrypted(dev, mem->start) & boundary_mask; 505 unsigned long max_slots = get_max_slots(boundary_mask); 506 unsigned int iotlb_align_mask = 507 dma_get_min_align_mask(dev) & ~(IO_TLB_SIZE - 1); 508 unsigned int nslots = nr_slots(alloc_size), stride; 509 unsigned int index, wrap, count = 0, i; 510 unsigned int offset = swiotlb_align_offset(dev, orig_addr); 511 unsigned long flags; 512 513 BUG_ON(!nslots); 514 515 /* 516 * For mappings with an alignment requirement don't bother looping to 517 * unaligned slots once we found an aligned one. For allocations of 518 * PAGE_SIZE or larger only look for page aligned allocations. 519 */ 520 stride = (iotlb_align_mask >> IO_TLB_SHIFT) + 1; 521 if (alloc_size >= PAGE_SIZE) 522 stride = max(stride, stride << (PAGE_SHIFT - IO_TLB_SHIFT)); 523 stride = max(stride, (alloc_align_mask >> IO_TLB_SHIFT) + 1); 524 525 spin_lock_irqsave(&mem->lock, flags); 526 if (unlikely(nslots > mem->nslabs - mem->used)) 527 goto not_found; 528 529 index = wrap = wrap_index(mem, ALIGN(mem->index, stride)); 530 do { 531 if (orig_addr && 532 (slot_addr(tbl_dma_addr, index) & iotlb_align_mask) != 533 (orig_addr & iotlb_align_mask)) { 534 index = wrap_index(mem, index + 1); 535 continue; 536 } 537 538 /* 539 * If we find a slot that indicates we have 'nslots' number of 540 * contiguous buffers, we allocate the buffers from that slot 541 * and mark the entries as '0' indicating unavailable. 542 */ 543 if (!iommu_is_span_boundary(index, nslots, 544 nr_slots(tbl_dma_addr), 545 max_slots)) { 546 if (mem->slots[index].list >= nslots) 547 goto found; 548 } 549 index = wrap_index(mem, index + stride); 550 } while (index != wrap); 551 552 not_found: 553 spin_unlock_irqrestore(&mem->lock, flags); 554 return -1; 555 556 found: 557 for (i = index; i < index + nslots; i++) { 558 mem->slots[i].list = 0; 559 mem->slots[i].alloc_size = 560 alloc_size - (offset + ((i - index) << IO_TLB_SHIFT)); 561 } 562 for (i = index - 1; 563 io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && 564 mem->slots[i].list; i--) 565 mem->slots[i].list = ++count; 566 567 /* 568 * Update the indices to avoid searching in the next round. 569 */ 570 if (index + nslots < mem->nslabs) 571 mem->index = index + nslots; 572 else 573 mem->index = 0; 574 mem->used += nslots; 575 576 spin_unlock_irqrestore(&mem->lock, flags); 577 return index; 578 } 579 580 phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr, 581 size_t mapping_size, size_t alloc_size, 582 unsigned int alloc_align_mask, enum dma_data_direction dir, 583 unsigned long attrs) 584 { 585 struct io_tlb_mem *mem = dev->dma_io_tlb_mem; 586 unsigned int offset = swiotlb_align_offset(dev, orig_addr); 587 unsigned int i; 588 int index; 589 phys_addr_t tlb_addr; 590 591 if (!mem) 592 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); 593 594 if (cc_platform_has(CC_ATTR_MEM_ENCRYPT)) 595 pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n"); 596 597 if (mapping_size > alloc_size) { 598 dev_warn_once(dev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)", 599 mapping_size, alloc_size); 600 return (phys_addr_t)DMA_MAPPING_ERROR; 601 } 602 603 index = swiotlb_find_slots(dev, orig_addr, 604 alloc_size + offset, alloc_align_mask); 605 if (index == -1) { 606 if (!(attrs & DMA_ATTR_NO_WARN)) 607 dev_warn_ratelimited(dev, 608 "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n", 609 alloc_size, mem->nslabs, mem->used); 610 return (phys_addr_t)DMA_MAPPING_ERROR; 611 } 612 613 /* 614 * Save away the mapping from the original address to the DMA address. 615 * This is needed when we sync the memory. Then we sync the buffer if 616 * needed. 617 */ 618 for (i = 0; i < nr_slots(alloc_size + offset); i++) 619 mem->slots[index + i].orig_addr = slot_addr(orig_addr, i); 620 tlb_addr = slot_addr(mem->start, index) + offset; 621 /* 622 * When dir == DMA_FROM_DEVICE we could omit the copy from the orig 623 * to the tlb buffer, if we knew for sure the device will 624 * overwirte the entire current content. But we don't. Thus 625 * unconditional bounce may prevent leaking swiotlb content (i.e. 626 * kernel memory) to user-space. 627 */ 628 swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_TO_DEVICE); 629 return tlb_addr; 630 } 631 632 static void swiotlb_release_slots(struct device *dev, phys_addr_t tlb_addr) 633 { 634 struct io_tlb_mem *mem = dev->dma_io_tlb_mem; 635 unsigned long flags; 636 unsigned int offset = swiotlb_align_offset(dev, tlb_addr); 637 int index = (tlb_addr - offset - mem->start) >> IO_TLB_SHIFT; 638 int nslots = nr_slots(mem->slots[index].alloc_size + offset); 639 int count, i; 640 641 /* 642 * Return the buffer to the free list by setting the corresponding 643 * entries to indicate the number of contiguous entries available. 644 * While returning the entries to the free list, we merge the entries 645 * with slots below and above the pool being returned. 646 */ 647 spin_lock_irqsave(&mem->lock, flags); 648 if (index + nslots < ALIGN(index + 1, IO_TLB_SEGSIZE)) 649 count = mem->slots[index + nslots].list; 650 else 651 count = 0; 652 653 /* 654 * Step 1: return the slots to the free list, merging the slots with 655 * superceeding slots 656 */ 657 for (i = index + nslots - 1; i >= index; i--) { 658 mem->slots[i].list = ++count; 659 mem->slots[i].orig_addr = INVALID_PHYS_ADDR; 660 mem->slots[i].alloc_size = 0; 661 } 662 663 /* 664 * Step 2: merge the returned slots with the preceding slots, if 665 * available (non zero) 666 */ 667 for (i = index - 1; 668 io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && mem->slots[i].list; 669 i--) 670 mem->slots[i].list = ++count; 671 mem->used -= nslots; 672 spin_unlock_irqrestore(&mem->lock, flags); 673 } 674 675 /* 676 * tlb_addr is the physical address of the bounce buffer to unmap. 677 */ 678 void swiotlb_tbl_unmap_single(struct device *dev, phys_addr_t tlb_addr, 679 size_t mapping_size, enum dma_data_direction dir, 680 unsigned long attrs) 681 { 682 /* 683 * First, sync the memory before unmapping the entry 684 */ 685 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && 686 (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) 687 swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_FROM_DEVICE); 688 689 swiotlb_release_slots(dev, tlb_addr); 690 } 691 692 void swiotlb_sync_single_for_device(struct device *dev, phys_addr_t tlb_addr, 693 size_t size, enum dma_data_direction dir) 694 { 695 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) 696 swiotlb_bounce(dev, tlb_addr, size, DMA_TO_DEVICE); 697 else 698 BUG_ON(dir != DMA_FROM_DEVICE); 699 } 700 701 void swiotlb_sync_single_for_cpu(struct device *dev, phys_addr_t tlb_addr, 702 size_t size, enum dma_data_direction dir) 703 { 704 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) 705 swiotlb_bounce(dev, tlb_addr, size, DMA_FROM_DEVICE); 706 else 707 BUG_ON(dir != DMA_TO_DEVICE); 708 } 709 710 /* 711 * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing 712 * to the device copy the data into it as well. 713 */ 714 dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size, 715 enum dma_data_direction dir, unsigned long attrs) 716 { 717 phys_addr_t swiotlb_addr; 718 dma_addr_t dma_addr; 719 720 trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size, 721 swiotlb_force); 722 723 swiotlb_addr = swiotlb_tbl_map_single(dev, paddr, size, size, 0, dir, 724 attrs); 725 if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR) 726 return DMA_MAPPING_ERROR; 727 728 /* Ensure that the address returned is DMA'ble */ 729 dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr); 730 if (unlikely(!dma_capable(dev, dma_addr, size, true))) { 731 swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, dir, 732 attrs | DMA_ATTR_SKIP_CPU_SYNC); 733 dev_WARN_ONCE(dev, 1, 734 "swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n", 735 &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit); 736 return DMA_MAPPING_ERROR; 737 } 738 739 if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) 740 arch_sync_dma_for_device(swiotlb_addr, size, dir); 741 return dma_addr; 742 } 743 744 size_t swiotlb_max_mapping_size(struct device *dev) 745 { 746 return ((size_t)IO_TLB_SIZE) * IO_TLB_SEGSIZE; 747 } 748 749 bool is_swiotlb_active(struct device *dev) 750 { 751 struct io_tlb_mem *mem = dev->dma_io_tlb_mem; 752 753 return mem && mem->nslabs; 754 } 755 EXPORT_SYMBOL_GPL(is_swiotlb_active); 756 757 static void swiotlb_create_debugfs_files(struct io_tlb_mem *mem, 758 const char *dirname) 759 { 760 mem->debugfs = debugfs_create_dir(dirname, io_tlb_default_mem.debugfs); 761 if (!mem->nslabs) 762 return; 763 764 debugfs_create_ulong("io_tlb_nslabs", 0400, mem->debugfs, &mem->nslabs); 765 debugfs_create_ulong("io_tlb_used", 0400, mem->debugfs, &mem->used); 766 } 767 768 static int __init __maybe_unused swiotlb_create_default_debugfs(void) 769 { 770 swiotlb_create_debugfs_files(&io_tlb_default_mem, "swiotlb"); 771 return 0; 772 } 773 774 #ifdef CONFIG_DEBUG_FS 775 late_initcall(swiotlb_create_default_debugfs); 776 #endif 777 778 #ifdef CONFIG_DMA_RESTRICTED_POOL 779 780 struct page *swiotlb_alloc(struct device *dev, size_t size) 781 { 782 struct io_tlb_mem *mem = dev->dma_io_tlb_mem; 783 phys_addr_t tlb_addr; 784 int index; 785 786 if (!mem) 787 return NULL; 788 789 index = swiotlb_find_slots(dev, 0, size, 0); 790 if (index == -1) 791 return NULL; 792 793 tlb_addr = slot_addr(mem->start, index); 794 795 return pfn_to_page(PFN_DOWN(tlb_addr)); 796 } 797 798 bool swiotlb_free(struct device *dev, struct page *page, size_t size) 799 { 800 phys_addr_t tlb_addr = page_to_phys(page); 801 802 if (!is_swiotlb_buffer(dev, tlb_addr)) 803 return false; 804 805 swiotlb_release_slots(dev, tlb_addr); 806 807 return true; 808 } 809 810 static int rmem_swiotlb_device_init(struct reserved_mem *rmem, 811 struct device *dev) 812 { 813 struct io_tlb_mem *mem = rmem->priv; 814 unsigned long nslabs = rmem->size >> IO_TLB_SHIFT; 815 816 /* 817 * Since multiple devices can share the same pool, the private data, 818 * io_tlb_mem struct, will be initialized by the first device attached 819 * to it. 820 */ 821 if (!mem) { 822 mem = kzalloc(sizeof(*mem), GFP_KERNEL); 823 if (!mem) 824 return -ENOMEM; 825 826 mem->slots = kcalloc(nslabs, sizeof(*mem->slots), GFP_KERNEL); 827 if (!mem->slots) { 828 kfree(mem); 829 return -ENOMEM; 830 } 831 832 set_memory_decrypted((unsigned long)phys_to_virt(rmem->base), 833 rmem->size >> PAGE_SHIFT); 834 swiotlb_init_io_tlb_mem(mem, rmem->base, nslabs, false); 835 mem->force_bounce = true; 836 mem->for_alloc = true; 837 838 rmem->priv = mem; 839 840 swiotlb_create_debugfs_files(mem, rmem->name); 841 } 842 843 dev->dma_io_tlb_mem = mem; 844 845 return 0; 846 } 847 848 static void rmem_swiotlb_device_release(struct reserved_mem *rmem, 849 struct device *dev) 850 { 851 dev->dma_io_tlb_mem = &io_tlb_default_mem; 852 } 853 854 static const struct reserved_mem_ops rmem_swiotlb_ops = { 855 .device_init = rmem_swiotlb_device_init, 856 .device_release = rmem_swiotlb_device_release, 857 }; 858 859 static int __init rmem_swiotlb_setup(struct reserved_mem *rmem) 860 { 861 unsigned long node = rmem->fdt_node; 862 863 if (of_get_flat_dt_prop(node, "reusable", NULL) || 864 of_get_flat_dt_prop(node, "linux,cma-default", NULL) || 865 of_get_flat_dt_prop(node, "linux,dma-default", NULL) || 866 of_get_flat_dt_prop(node, "no-map", NULL)) 867 return -EINVAL; 868 869 if (PageHighMem(pfn_to_page(PHYS_PFN(rmem->base)))) { 870 pr_err("Restricted DMA pool must be accessible within the linear mapping."); 871 return -EINVAL; 872 } 873 874 rmem->ops = &rmem_swiotlb_ops; 875 pr_info("Reserved memory: created restricted DMA pool at %pa, size %ld MiB\n", 876 &rmem->base, (unsigned long)rmem->size / SZ_1M); 877 return 0; 878 } 879 880 RESERVEDMEM_OF_DECLARE(dma, "restricted-dma-pool", rmem_swiotlb_setup); 881 #endif /* CONFIG_DMA_RESTRICTED_POOL */ 882