xref: /linux/kernel/dma/swiotlb.c (revision af873fcecef567abf8a3468b06dd4e4aab46da6d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Dynamic DMA mapping support.
4  *
5  * This implementation is a fallback for platforms that do not support
6  * I/O TLBs (aka DMA address translation hardware).
7  * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
8  * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
9  * Copyright (C) 2000, 2003 Hewlett-Packard Co
10  *	David Mosberger-Tang <davidm@hpl.hp.com>
11  *
12  * 03/05/07 davidm	Switch from PCI-DMA to generic device DMA API.
13  * 00/12/13 davidm	Rename to swiotlb.c and add mark_clean() to avoid
14  *			unnecessary i-cache flushing.
15  * 04/07/.. ak		Better overflow handling. Assorted fixes.
16  * 05/09/10 linville	Add support for syncing ranges, support syncing for
17  *			DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
18  * 08/12/11 beckyb	Add highmem support
19  */
20 
21 #define pr_fmt(fmt) "software IO TLB: " fmt
22 
23 #include <linux/cache.h>
24 #include <linux/dma-direct.h>
25 #include <linux/mm.h>
26 #include <linux/export.h>
27 #include <linux/spinlock.h>
28 #include <linux/string.h>
29 #include <linux/swiotlb.h>
30 #include <linux/pfn.h>
31 #include <linux/types.h>
32 #include <linux/ctype.h>
33 #include <linux/highmem.h>
34 #include <linux/gfp.h>
35 #include <linux/scatterlist.h>
36 #include <linux/mem_encrypt.h>
37 #include <linux/set_memory.h>
38 #ifdef CONFIG_DEBUG_FS
39 #include <linux/debugfs.h>
40 #endif
41 
42 #include <asm/io.h>
43 #include <asm/dma.h>
44 
45 #include <linux/init.h>
46 #include <linux/memblock.h>
47 #include <linux/iommu-helper.h>
48 
49 #define CREATE_TRACE_POINTS
50 #include <trace/events/swiotlb.h>
51 
52 #define OFFSET(val,align) ((unsigned long)	\
53 	                   ( (val) & ( (align) - 1)))
54 
55 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
56 
57 /*
58  * Minimum IO TLB size to bother booting with.  Systems with mainly
59  * 64bit capable cards will only lightly use the swiotlb.  If we can't
60  * allocate a contiguous 1MB, we're probably in trouble anyway.
61  */
62 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
63 
64 enum swiotlb_force swiotlb_force;
65 
66 /*
67  * Used to do a quick range check in swiotlb_tbl_unmap_single and
68  * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
69  * API.
70  */
71 phys_addr_t io_tlb_start, io_tlb_end;
72 
73 /*
74  * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
75  * io_tlb_end.  This is command line adjustable via setup_io_tlb_npages.
76  */
77 static unsigned long io_tlb_nslabs;
78 
79 /*
80  * The number of used IO TLB block
81  */
82 static unsigned long io_tlb_used;
83 
84 /*
85  * This is a free list describing the number of free entries available from
86  * each index
87  */
88 static unsigned int *io_tlb_list;
89 static unsigned int io_tlb_index;
90 
91 /*
92  * Max segment that we can provide which (if pages are contingous) will
93  * not be bounced (unless SWIOTLB_FORCE is set).
94  */
95 unsigned int max_segment;
96 
97 /*
98  * We need to save away the original address corresponding to a mapped entry
99  * for the sync operations.
100  */
101 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
102 static phys_addr_t *io_tlb_orig_addr;
103 
104 /*
105  * Protect the above data structures in the map and unmap calls
106  */
107 static DEFINE_SPINLOCK(io_tlb_lock);
108 
109 static int late_alloc;
110 
111 static int __init
112 setup_io_tlb_npages(char *str)
113 {
114 	if (isdigit(*str)) {
115 		io_tlb_nslabs = simple_strtoul(str, &str, 0);
116 		/* avoid tail segment of size < IO_TLB_SEGSIZE */
117 		io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
118 	}
119 	if (*str == ',')
120 		++str;
121 	if (!strcmp(str, "force")) {
122 		swiotlb_force = SWIOTLB_FORCE;
123 	} else if (!strcmp(str, "noforce")) {
124 		swiotlb_force = SWIOTLB_NO_FORCE;
125 		io_tlb_nslabs = 1;
126 	}
127 
128 	return 0;
129 }
130 early_param("swiotlb", setup_io_tlb_npages);
131 
132 unsigned long swiotlb_nr_tbl(void)
133 {
134 	return io_tlb_nslabs;
135 }
136 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
137 
138 unsigned int swiotlb_max_segment(void)
139 {
140 	return max_segment;
141 }
142 EXPORT_SYMBOL_GPL(swiotlb_max_segment);
143 
144 void swiotlb_set_max_segment(unsigned int val)
145 {
146 	if (swiotlb_force == SWIOTLB_FORCE)
147 		max_segment = 1;
148 	else
149 		max_segment = rounddown(val, PAGE_SIZE);
150 }
151 
152 /* default to 64MB */
153 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
154 unsigned long swiotlb_size_or_default(void)
155 {
156 	unsigned long size;
157 
158 	size = io_tlb_nslabs << IO_TLB_SHIFT;
159 
160 	return size ? size : (IO_TLB_DEFAULT_SIZE);
161 }
162 
163 static bool no_iotlb_memory;
164 
165 void swiotlb_print_info(void)
166 {
167 	unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
168 
169 	if (no_iotlb_memory) {
170 		pr_warn("No low mem\n");
171 		return;
172 	}
173 
174 	pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n",
175 	       (unsigned long long)io_tlb_start,
176 	       (unsigned long long)io_tlb_end,
177 	       bytes >> 20);
178 }
179 
180 /*
181  * Early SWIOTLB allocation may be too early to allow an architecture to
182  * perform the desired operations.  This function allows the architecture to
183  * call SWIOTLB when the operations are possible.  It needs to be called
184  * before the SWIOTLB memory is used.
185  */
186 void __init swiotlb_update_mem_attributes(void)
187 {
188 	void *vaddr;
189 	unsigned long bytes;
190 
191 	if (no_iotlb_memory || late_alloc)
192 		return;
193 
194 	vaddr = phys_to_virt(io_tlb_start);
195 	bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
196 	set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
197 	memset(vaddr, 0, bytes);
198 }
199 
200 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
201 {
202 	unsigned long i, bytes;
203 	size_t alloc_size;
204 
205 	bytes = nslabs << IO_TLB_SHIFT;
206 
207 	io_tlb_nslabs = nslabs;
208 	io_tlb_start = __pa(tlb);
209 	io_tlb_end = io_tlb_start + bytes;
210 
211 	/*
212 	 * Allocate and initialize the free list array.  This array is used
213 	 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
214 	 * between io_tlb_start and io_tlb_end.
215 	 */
216 	alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(int));
217 	io_tlb_list = memblock_alloc(alloc_size, PAGE_SIZE);
218 	if (!io_tlb_list)
219 		panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
220 		      __func__, alloc_size, PAGE_SIZE);
221 
222 	alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t));
223 	io_tlb_orig_addr = memblock_alloc(alloc_size, PAGE_SIZE);
224 	if (!io_tlb_orig_addr)
225 		panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
226 		      __func__, alloc_size, PAGE_SIZE);
227 
228 	for (i = 0; i < io_tlb_nslabs; i++) {
229 		io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
230 		io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
231 	}
232 	io_tlb_index = 0;
233 
234 	if (verbose)
235 		swiotlb_print_info();
236 
237 	swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
238 	return 0;
239 }
240 
241 /*
242  * Statically reserve bounce buffer space and initialize bounce buffer data
243  * structures for the software IO TLB used to implement the DMA API.
244  */
245 void  __init
246 swiotlb_init(int verbose)
247 {
248 	size_t default_size = IO_TLB_DEFAULT_SIZE;
249 	unsigned char *vstart;
250 	unsigned long bytes;
251 
252 	if (!io_tlb_nslabs) {
253 		io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
254 		io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
255 	}
256 
257 	bytes = io_tlb_nslabs << IO_TLB_SHIFT;
258 
259 	/* Get IO TLB memory from the low pages */
260 	vstart = memblock_alloc_low(PAGE_ALIGN(bytes), PAGE_SIZE);
261 	if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
262 		return;
263 
264 	if (io_tlb_start)
265 		memblock_free_early(io_tlb_start,
266 				    PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
267 	pr_warn("Cannot allocate buffer");
268 	no_iotlb_memory = true;
269 }
270 
271 /*
272  * Systems with larger DMA zones (those that don't support ISA) can
273  * initialize the swiotlb later using the slab allocator if needed.
274  * This should be just like above, but with some error catching.
275  */
276 int
277 swiotlb_late_init_with_default_size(size_t default_size)
278 {
279 	unsigned long bytes, req_nslabs = io_tlb_nslabs;
280 	unsigned char *vstart = NULL;
281 	unsigned int order;
282 	int rc = 0;
283 
284 	if (!io_tlb_nslabs) {
285 		io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
286 		io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
287 	}
288 
289 	/*
290 	 * Get IO TLB memory from the low pages
291 	 */
292 	order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
293 	io_tlb_nslabs = SLABS_PER_PAGE << order;
294 	bytes = io_tlb_nslabs << IO_TLB_SHIFT;
295 
296 	while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
297 		vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
298 						  order);
299 		if (vstart)
300 			break;
301 		order--;
302 	}
303 
304 	if (!vstart) {
305 		io_tlb_nslabs = req_nslabs;
306 		return -ENOMEM;
307 	}
308 	if (order != get_order(bytes)) {
309 		pr_warn("only able to allocate %ld MB\n",
310 			(PAGE_SIZE << order) >> 20);
311 		io_tlb_nslabs = SLABS_PER_PAGE << order;
312 	}
313 	rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
314 	if (rc)
315 		free_pages((unsigned long)vstart, order);
316 
317 	return rc;
318 }
319 
320 int
321 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
322 {
323 	unsigned long i, bytes;
324 
325 	bytes = nslabs << IO_TLB_SHIFT;
326 
327 	io_tlb_nslabs = nslabs;
328 	io_tlb_start = virt_to_phys(tlb);
329 	io_tlb_end = io_tlb_start + bytes;
330 
331 	set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT);
332 	memset(tlb, 0, bytes);
333 
334 	/*
335 	 * Allocate and initialize the free list array.  This array is used
336 	 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
337 	 * between io_tlb_start and io_tlb_end.
338 	 */
339 	io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
340 	                              get_order(io_tlb_nslabs * sizeof(int)));
341 	if (!io_tlb_list)
342 		goto cleanup3;
343 
344 	io_tlb_orig_addr = (phys_addr_t *)
345 		__get_free_pages(GFP_KERNEL,
346 				 get_order(io_tlb_nslabs *
347 					   sizeof(phys_addr_t)));
348 	if (!io_tlb_orig_addr)
349 		goto cleanup4;
350 
351 	for (i = 0; i < io_tlb_nslabs; i++) {
352 		io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
353 		io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
354 	}
355 	io_tlb_index = 0;
356 
357 	swiotlb_print_info();
358 
359 	late_alloc = 1;
360 
361 	swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
362 
363 	return 0;
364 
365 cleanup4:
366 	free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
367 	                                                 sizeof(int)));
368 	io_tlb_list = NULL;
369 cleanup3:
370 	io_tlb_end = 0;
371 	io_tlb_start = 0;
372 	io_tlb_nslabs = 0;
373 	max_segment = 0;
374 	return -ENOMEM;
375 }
376 
377 void __init swiotlb_exit(void)
378 {
379 	if (!io_tlb_orig_addr)
380 		return;
381 
382 	if (late_alloc) {
383 		free_pages((unsigned long)io_tlb_orig_addr,
384 			   get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
385 		free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
386 								 sizeof(int)));
387 		free_pages((unsigned long)phys_to_virt(io_tlb_start),
388 			   get_order(io_tlb_nslabs << IO_TLB_SHIFT));
389 	} else {
390 		memblock_free_late(__pa(io_tlb_orig_addr),
391 				   PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
392 		memblock_free_late(__pa(io_tlb_list),
393 				   PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
394 		memblock_free_late(io_tlb_start,
395 				   PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
396 	}
397 	io_tlb_start = 0;
398 	io_tlb_end = 0;
399 	io_tlb_nslabs = 0;
400 	max_segment = 0;
401 }
402 
403 /*
404  * Bounce: copy the swiotlb buffer from or back to the original dma location
405  */
406 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
407 			   size_t size, enum dma_data_direction dir)
408 {
409 	unsigned long pfn = PFN_DOWN(orig_addr);
410 	unsigned char *vaddr = phys_to_virt(tlb_addr);
411 
412 	if (PageHighMem(pfn_to_page(pfn))) {
413 		/* The buffer does not have a mapping.  Map it in and copy */
414 		unsigned int offset = orig_addr & ~PAGE_MASK;
415 		char *buffer;
416 		unsigned int sz = 0;
417 		unsigned long flags;
418 
419 		while (size) {
420 			sz = min_t(size_t, PAGE_SIZE - offset, size);
421 
422 			local_irq_save(flags);
423 			buffer = kmap_atomic(pfn_to_page(pfn));
424 			if (dir == DMA_TO_DEVICE)
425 				memcpy(vaddr, buffer + offset, sz);
426 			else
427 				memcpy(buffer + offset, vaddr, sz);
428 			kunmap_atomic(buffer);
429 			local_irq_restore(flags);
430 
431 			size -= sz;
432 			pfn++;
433 			vaddr += sz;
434 			offset = 0;
435 		}
436 	} else if (dir == DMA_TO_DEVICE) {
437 		memcpy(vaddr, phys_to_virt(orig_addr), size);
438 	} else {
439 		memcpy(phys_to_virt(orig_addr), vaddr, size);
440 	}
441 }
442 
443 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
444 				   dma_addr_t tbl_dma_addr,
445 				   phys_addr_t orig_addr, size_t size,
446 				   enum dma_data_direction dir,
447 				   unsigned long attrs)
448 {
449 	unsigned long flags;
450 	phys_addr_t tlb_addr;
451 	unsigned int nslots, stride, index, wrap;
452 	int i;
453 	unsigned long mask;
454 	unsigned long offset_slots;
455 	unsigned long max_slots;
456 	unsigned long tmp_io_tlb_used;
457 
458 	if (no_iotlb_memory)
459 		panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
460 
461 	if (mem_encrypt_active())
462 		pr_warn_once("%s is active and system is using DMA bounce buffers\n",
463 			     sme_active() ? "SME" : "SEV");
464 
465 	mask = dma_get_seg_boundary(hwdev);
466 
467 	tbl_dma_addr &= mask;
468 
469 	offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
470 
471 	/*
472  	 * Carefully handle integer overflow which can occur when mask == ~0UL.
473  	 */
474 	max_slots = mask + 1
475 		    ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
476 		    : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
477 
478 	/*
479 	 * For mappings greater than or equal to a page, we limit the stride
480 	 * (and hence alignment) to a page size.
481 	 */
482 	nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
483 	if (size >= PAGE_SIZE)
484 		stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
485 	else
486 		stride = 1;
487 
488 	BUG_ON(!nslots);
489 
490 	/*
491 	 * Find suitable number of IO TLB entries size that will fit this
492 	 * request and allocate a buffer from that IO TLB pool.
493 	 */
494 	spin_lock_irqsave(&io_tlb_lock, flags);
495 
496 	if (unlikely(nslots > io_tlb_nslabs - io_tlb_used))
497 		goto not_found;
498 
499 	index = ALIGN(io_tlb_index, stride);
500 	if (index >= io_tlb_nslabs)
501 		index = 0;
502 	wrap = index;
503 
504 	do {
505 		while (iommu_is_span_boundary(index, nslots, offset_slots,
506 					      max_slots)) {
507 			index += stride;
508 			if (index >= io_tlb_nslabs)
509 				index = 0;
510 			if (index == wrap)
511 				goto not_found;
512 		}
513 
514 		/*
515 		 * If we find a slot that indicates we have 'nslots' number of
516 		 * contiguous buffers, we allocate the buffers from that slot
517 		 * and mark the entries as '0' indicating unavailable.
518 		 */
519 		if (io_tlb_list[index] >= nslots) {
520 			int count = 0;
521 
522 			for (i = index; i < (int) (index + nslots); i++)
523 				io_tlb_list[i] = 0;
524 			for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
525 				io_tlb_list[i] = ++count;
526 			tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
527 
528 			/*
529 			 * Update the indices to avoid searching in the next
530 			 * round.
531 			 */
532 			io_tlb_index = ((index + nslots) < io_tlb_nslabs
533 					? (index + nslots) : 0);
534 
535 			goto found;
536 		}
537 		index += stride;
538 		if (index >= io_tlb_nslabs)
539 			index = 0;
540 	} while (index != wrap);
541 
542 not_found:
543 	tmp_io_tlb_used = io_tlb_used;
544 
545 	spin_unlock_irqrestore(&io_tlb_lock, flags);
546 	if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit())
547 		dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
548 			 size, io_tlb_nslabs, tmp_io_tlb_used);
549 	return DMA_MAPPING_ERROR;
550 found:
551 	io_tlb_used += nslots;
552 	spin_unlock_irqrestore(&io_tlb_lock, flags);
553 
554 	/*
555 	 * Save away the mapping from the original address to the DMA address.
556 	 * This is needed when we sync the memory.  Then we sync the buffer if
557 	 * needed.
558 	 */
559 	for (i = 0; i < nslots; i++)
560 		io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
561 	if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
562 	    (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
563 		swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
564 
565 	return tlb_addr;
566 }
567 
568 /*
569  * tlb_addr is the physical address of the bounce buffer to unmap.
570  */
571 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
572 			      size_t size, enum dma_data_direction dir,
573 			      unsigned long attrs)
574 {
575 	unsigned long flags;
576 	int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
577 	int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
578 	phys_addr_t orig_addr = io_tlb_orig_addr[index];
579 
580 	/*
581 	 * First, sync the memory before unmapping the entry
582 	 */
583 	if (orig_addr != INVALID_PHYS_ADDR &&
584 	    !(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
585 	    ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
586 		swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
587 
588 	/*
589 	 * Return the buffer to the free list by setting the corresponding
590 	 * entries to indicate the number of contiguous entries available.
591 	 * While returning the entries to the free list, we merge the entries
592 	 * with slots below and above the pool being returned.
593 	 */
594 	spin_lock_irqsave(&io_tlb_lock, flags);
595 	{
596 		count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
597 			 io_tlb_list[index + nslots] : 0);
598 		/*
599 		 * Step 1: return the slots to the free list, merging the
600 		 * slots with superceeding slots
601 		 */
602 		for (i = index + nslots - 1; i >= index; i--) {
603 			io_tlb_list[i] = ++count;
604 			io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
605 		}
606 		/*
607 		 * Step 2: merge the returned slots with the preceding slots,
608 		 * if available (non zero)
609 		 */
610 		for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
611 			io_tlb_list[i] = ++count;
612 
613 		io_tlb_used -= nslots;
614 	}
615 	spin_unlock_irqrestore(&io_tlb_lock, flags);
616 }
617 
618 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
619 			     size_t size, enum dma_data_direction dir,
620 			     enum dma_sync_target target)
621 {
622 	int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
623 	phys_addr_t orig_addr = io_tlb_orig_addr[index];
624 
625 	if (orig_addr == INVALID_PHYS_ADDR)
626 		return;
627 	orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
628 
629 	switch (target) {
630 	case SYNC_FOR_CPU:
631 		if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
632 			swiotlb_bounce(orig_addr, tlb_addr,
633 				       size, DMA_FROM_DEVICE);
634 		else
635 			BUG_ON(dir != DMA_TO_DEVICE);
636 		break;
637 	case SYNC_FOR_DEVICE:
638 		if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
639 			swiotlb_bounce(orig_addr, tlb_addr,
640 				       size, DMA_TO_DEVICE);
641 		else
642 			BUG_ON(dir != DMA_FROM_DEVICE);
643 		break;
644 	default:
645 		BUG();
646 	}
647 }
648 
649 /*
650  * Create a swiotlb mapping for the buffer at @phys, and in case of DMAing
651  * to the device copy the data into it as well.
652  */
653 bool swiotlb_map(struct device *dev, phys_addr_t *phys, dma_addr_t *dma_addr,
654 		size_t size, enum dma_data_direction dir, unsigned long attrs)
655 {
656 	trace_swiotlb_bounced(dev, *dma_addr, size, swiotlb_force);
657 
658 	if (unlikely(swiotlb_force == SWIOTLB_NO_FORCE)) {
659 		dev_warn_ratelimited(dev,
660 			"Cannot do DMA to address %pa\n", phys);
661 		return false;
662 	}
663 
664 	/* Oh well, have to allocate and map a bounce buffer. */
665 	*phys = swiotlb_tbl_map_single(dev, __phys_to_dma(dev, io_tlb_start),
666 			*phys, size, dir, attrs);
667 	if (*phys == DMA_MAPPING_ERROR)
668 		return false;
669 
670 	/* Ensure that the address returned is DMA'ble */
671 	*dma_addr = __phys_to_dma(dev, *phys);
672 	if (unlikely(!dma_capable(dev, *dma_addr, size))) {
673 		swiotlb_tbl_unmap_single(dev, *phys, size, dir,
674 			attrs | DMA_ATTR_SKIP_CPU_SYNC);
675 		return false;
676 	}
677 
678 	return true;
679 }
680 
681 size_t swiotlb_max_mapping_size(struct device *dev)
682 {
683 	return ((size_t)1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
684 }
685 
686 bool is_swiotlb_active(void)
687 {
688 	/*
689 	 * When SWIOTLB is initialized, even if io_tlb_start points to physical
690 	 * address zero, io_tlb_end surely doesn't.
691 	 */
692 	return io_tlb_end != 0;
693 }
694 
695 #ifdef CONFIG_DEBUG_FS
696 
697 static int __init swiotlb_create_debugfs(void)
698 {
699 	struct dentry *d_swiotlb_usage;
700 	struct dentry *ent;
701 
702 	d_swiotlb_usage = debugfs_create_dir("swiotlb", NULL);
703 
704 	if (!d_swiotlb_usage)
705 		return -ENOMEM;
706 
707 	ent = debugfs_create_ulong("io_tlb_nslabs", 0400,
708 				   d_swiotlb_usage, &io_tlb_nslabs);
709 	if (!ent)
710 		goto fail;
711 
712 	ent = debugfs_create_ulong("io_tlb_used", 0400,
713 				   d_swiotlb_usage, &io_tlb_used);
714 	if (!ent)
715 		goto fail;
716 
717 	return 0;
718 
719 fail:
720 	debugfs_remove_recursive(d_swiotlb_usage);
721 	return -ENOMEM;
722 }
723 
724 late_initcall(swiotlb_create_debugfs);
725 
726 #endif
727