1 /* 2 * Dynamic DMA mapping support. 3 * 4 * This implementation is a fallback for platforms that do not support 5 * I/O TLBs (aka DMA address translation hardware). 6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> 7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> 8 * Copyright (C) 2000, 2003 Hewlett-Packard Co 9 * David Mosberger-Tang <davidm@hpl.hp.com> 10 * 11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. 12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid 13 * unnecessary i-cache flushing. 14 * 04/07/.. ak Better overflow handling. Assorted fixes. 15 * 05/09/10 linville Add support for syncing ranges, support syncing for 16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. 17 * 08/12/11 beckyb Add highmem support 18 */ 19 20 #define pr_fmt(fmt) "software IO TLB: " fmt 21 22 #include <linux/cache.h> 23 #include <linux/dma-direct.h> 24 #include <linux/mm.h> 25 #include <linux/export.h> 26 #include <linux/spinlock.h> 27 #include <linux/string.h> 28 #include <linux/swiotlb.h> 29 #include <linux/pfn.h> 30 #include <linux/types.h> 31 #include <linux/ctype.h> 32 #include <linux/highmem.h> 33 #include <linux/gfp.h> 34 #include <linux/scatterlist.h> 35 #include <linux/mem_encrypt.h> 36 #include <linux/set_memory.h> 37 #ifdef CONFIG_DEBUG_FS 38 #include <linux/debugfs.h> 39 #endif 40 41 #include <asm/io.h> 42 #include <asm/dma.h> 43 44 #include <linux/init.h> 45 #include <linux/memblock.h> 46 #include <linux/iommu-helper.h> 47 48 #define CREATE_TRACE_POINTS 49 #include <trace/events/swiotlb.h> 50 51 #define OFFSET(val,align) ((unsigned long) \ 52 ( (val) & ( (align) - 1))) 53 54 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) 55 56 /* 57 * Minimum IO TLB size to bother booting with. Systems with mainly 58 * 64bit capable cards will only lightly use the swiotlb. If we can't 59 * allocate a contiguous 1MB, we're probably in trouble anyway. 60 */ 61 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) 62 63 enum swiotlb_force swiotlb_force; 64 65 /* 66 * Used to do a quick range check in swiotlb_tbl_unmap_single and 67 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this 68 * API. 69 */ 70 phys_addr_t io_tlb_start, io_tlb_end; 71 72 /* 73 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and 74 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. 75 */ 76 static unsigned long io_tlb_nslabs; 77 78 /* 79 * The number of used IO TLB block 80 */ 81 static unsigned long io_tlb_used; 82 83 /* 84 * This is a free list describing the number of free entries available from 85 * each index 86 */ 87 static unsigned int *io_tlb_list; 88 static unsigned int io_tlb_index; 89 90 /* 91 * Max segment that we can provide which (if pages are contingous) will 92 * not be bounced (unless SWIOTLB_FORCE is set). 93 */ 94 unsigned int max_segment; 95 96 /* 97 * We need to save away the original address corresponding to a mapped entry 98 * for the sync operations. 99 */ 100 #define INVALID_PHYS_ADDR (~(phys_addr_t)0) 101 static phys_addr_t *io_tlb_orig_addr; 102 103 /* 104 * Protect the above data structures in the map and unmap calls 105 */ 106 static DEFINE_SPINLOCK(io_tlb_lock); 107 108 static int late_alloc; 109 110 static int __init 111 setup_io_tlb_npages(char *str) 112 { 113 if (isdigit(*str)) { 114 io_tlb_nslabs = simple_strtoul(str, &str, 0); 115 /* avoid tail segment of size < IO_TLB_SEGSIZE */ 116 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 117 } 118 if (*str == ',') 119 ++str; 120 if (!strcmp(str, "force")) { 121 swiotlb_force = SWIOTLB_FORCE; 122 } else if (!strcmp(str, "noforce")) { 123 swiotlb_force = SWIOTLB_NO_FORCE; 124 io_tlb_nslabs = 1; 125 } 126 127 return 0; 128 } 129 early_param("swiotlb", setup_io_tlb_npages); 130 131 unsigned long swiotlb_nr_tbl(void) 132 { 133 return io_tlb_nslabs; 134 } 135 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl); 136 137 unsigned int swiotlb_max_segment(void) 138 { 139 return max_segment; 140 } 141 EXPORT_SYMBOL_GPL(swiotlb_max_segment); 142 143 void swiotlb_set_max_segment(unsigned int val) 144 { 145 if (swiotlb_force == SWIOTLB_FORCE) 146 max_segment = 1; 147 else 148 max_segment = rounddown(val, PAGE_SIZE); 149 } 150 151 /* default to 64MB */ 152 #define IO_TLB_DEFAULT_SIZE (64UL<<20) 153 unsigned long swiotlb_size_or_default(void) 154 { 155 unsigned long size; 156 157 size = io_tlb_nslabs << IO_TLB_SHIFT; 158 159 return size ? size : (IO_TLB_DEFAULT_SIZE); 160 } 161 162 static bool no_iotlb_memory; 163 164 void swiotlb_print_info(void) 165 { 166 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; 167 168 if (no_iotlb_memory) { 169 pr_warn("No low mem\n"); 170 return; 171 } 172 173 pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n", 174 (unsigned long long)io_tlb_start, 175 (unsigned long long)io_tlb_end, 176 bytes >> 20); 177 } 178 179 /* 180 * Early SWIOTLB allocation may be too early to allow an architecture to 181 * perform the desired operations. This function allows the architecture to 182 * call SWIOTLB when the operations are possible. It needs to be called 183 * before the SWIOTLB memory is used. 184 */ 185 void __init swiotlb_update_mem_attributes(void) 186 { 187 void *vaddr; 188 unsigned long bytes; 189 190 if (no_iotlb_memory || late_alloc) 191 return; 192 193 vaddr = phys_to_virt(io_tlb_start); 194 bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT); 195 set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT); 196 memset(vaddr, 0, bytes); 197 } 198 199 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) 200 { 201 unsigned long i, bytes; 202 203 bytes = nslabs << IO_TLB_SHIFT; 204 205 io_tlb_nslabs = nslabs; 206 io_tlb_start = __pa(tlb); 207 io_tlb_end = io_tlb_start + bytes; 208 209 /* 210 * Allocate and initialize the free list array. This array is used 211 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE 212 * between io_tlb_start and io_tlb_end. 213 */ 214 io_tlb_list = memblock_alloc( 215 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)), 216 PAGE_SIZE); 217 io_tlb_orig_addr = memblock_alloc( 218 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)), 219 PAGE_SIZE); 220 for (i = 0; i < io_tlb_nslabs; i++) { 221 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); 222 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; 223 } 224 io_tlb_index = 0; 225 226 if (verbose) 227 swiotlb_print_info(); 228 229 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); 230 return 0; 231 } 232 233 /* 234 * Statically reserve bounce buffer space and initialize bounce buffer data 235 * structures for the software IO TLB used to implement the DMA API. 236 */ 237 void __init 238 swiotlb_init(int verbose) 239 { 240 size_t default_size = IO_TLB_DEFAULT_SIZE; 241 unsigned char *vstart; 242 unsigned long bytes; 243 244 if (!io_tlb_nslabs) { 245 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); 246 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 247 } 248 249 bytes = io_tlb_nslabs << IO_TLB_SHIFT; 250 251 /* Get IO TLB memory from the low pages */ 252 vstart = memblock_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE); 253 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose)) 254 return; 255 256 if (io_tlb_start) 257 memblock_free_early(io_tlb_start, 258 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); 259 pr_warn("Cannot allocate buffer"); 260 no_iotlb_memory = true; 261 } 262 263 /* 264 * Systems with larger DMA zones (those that don't support ISA) can 265 * initialize the swiotlb later using the slab allocator if needed. 266 * This should be just like above, but with some error catching. 267 */ 268 int 269 swiotlb_late_init_with_default_size(size_t default_size) 270 { 271 unsigned long bytes, req_nslabs = io_tlb_nslabs; 272 unsigned char *vstart = NULL; 273 unsigned int order; 274 int rc = 0; 275 276 if (!io_tlb_nslabs) { 277 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); 278 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 279 } 280 281 /* 282 * Get IO TLB memory from the low pages 283 */ 284 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); 285 io_tlb_nslabs = SLABS_PER_PAGE << order; 286 bytes = io_tlb_nslabs << IO_TLB_SHIFT; 287 288 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { 289 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, 290 order); 291 if (vstart) 292 break; 293 order--; 294 } 295 296 if (!vstart) { 297 io_tlb_nslabs = req_nslabs; 298 return -ENOMEM; 299 } 300 if (order != get_order(bytes)) { 301 pr_warn("only able to allocate %ld MB\n", 302 (PAGE_SIZE << order) >> 20); 303 io_tlb_nslabs = SLABS_PER_PAGE << order; 304 } 305 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs); 306 if (rc) 307 free_pages((unsigned long)vstart, order); 308 309 return rc; 310 } 311 312 int 313 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) 314 { 315 unsigned long i, bytes; 316 317 bytes = nslabs << IO_TLB_SHIFT; 318 319 io_tlb_nslabs = nslabs; 320 io_tlb_start = virt_to_phys(tlb); 321 io_tlb_end = io_tlb_start + bytes; 322 323 set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT); 324 memset(tlb, 0, bytes); 325 326 /* 327 * Allocate and initialize the free list array. This array is used 328 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE 329 * between io_tlb_start and io_tlb_end. 330 */ 331 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, 332 get_order(io_tlb_nslabs * sizeof(int))); 333 if (!io_tlb_list) 334 goto cleanup3; 335 336 io_tlb_orig_addr = (phys_addr_t *) 337 __get_free_pages(GFP_KERNEL, 338 get_order(io_tlb_nslabs * 339 sizeof(phys_addr_t))); 340 if (!io_tlb_orig_addr) 341 goto cleanup4; 342 343 for (i = 0; i < io_tlb_nslabs; i++) { 344 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); 345 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; 346 } 347 io_tlb_index = 0; 348 349 swiotlb_print_info(); 350 351 late_alloc = 1; 352 353 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); 354 355 return 0; 356 357 cleanup4: 358 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * 359 sizeof(int))); 360 io_tlb_list = NULL; 361 cleanup3: 362 io_tlb_end = 0; 363 io_tlb_start = 0; 364 io_tlb_nslabs = 0; 365 max_segment = 0; 366 return -ENOMEM; 367 } 368 369 void __init swiotlb_exit(void) 370 { 371 if (!io_tlb_orig_addr) 372 return; 373 374 if (late_alloc) { 375 free_pages((unsigned long)io_tlb_orig_addr, 376 get_order(io_tlb_nslabs * sizeof(phys_addr_t))); 377 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * 378 sizeof(int))); 379 free_pages((unsigned long)phys_to_virt(io_tlb_start), 380 get_order(io_tlb_nslabs << IO_TLB_SHIFT)); 381 } else { 382 memblock_free_late(__pa(io_tlb_orig_addr), 383 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); 384 memblock_free_late(__pa(io_tlb_list), 385 PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); 386 memblock_free_late(io_tlb_start, 387 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); 388 } 389 io_tlb_start = 0; 390 io_tlb_end = 0; 391 io_tlb_nslabs = 0; 392 max_segment = 0; 393 } 394 395 /* 396 * Bounce: copy the swiotlb buffer from or back to the original dma location 397 */ 398 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr, 399 size_t size, enum dma_data_direction dir) 400 { 401 unsigned long pfn = PFN_DOWN(orig_addr); 402 unsigned char *vaddr = phys_to_virt(tlb_addr); 403 404 if (PageHighMem(pfn_to_page(pfn))) { 405 /* The buffer does not have a mapping. Map it in and copy */ 406 unsigned int offset = orig_addr & ~PAGE_MASK; 407 char *buffer; 408 unsigned int sz = 0; 409 unsigned long flags; 410 411 while (size) { 412 sz = min_t(size_t, PAGE_SIZE - offset, size); 413 414 local_irq_save(flags); 415 buffer = kmap_atomic(pfn_to_page(pfn)); 416 if (dir == DMA_TO_DEVICE) 417 memcpy(vaddr, buffer + offset, sz); 418 else 419 memcpy(buffer + offset, vaddr, sz); 420 kunmap_atomic(buffer); 421 local_irq_restore(flags); 422 423 size -= sz; 424 pfn++; 425 vaddr += sz; 426 offset = 0; 427 } 428 } else if (dir == DMA_TO_DEVICE) { 429 memcpy(vaddr, phys_to_virt(orig_addr), size); 430 } else { 431 memcpy(phys_to_virt(orig_addr), vaddr, size); 432 } 433 } 434 435 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, 436 dma_addr_t tbl_dma_addr, 437 phys_addr_t orig_addr, size_t size, 438 enum dma_data_direction dir, 439 unsigned long attrs) 440 { 441 unsigned long flags; 442 phys_addr_t tlb_addr; 443 unsigned int nslots, stride, index, wrap; 444 int i; 445 unsigned long mask; 446 unsigned long offset_slots; 447 unsigned long max_slots; 448 449 if (no_iotlb_memory) 450 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); 451 452 if (mem_encrypt_active()) 453 pr_warn_once("%s is active and system is using DMA bounce buffers\n", 454 sme_active() ? "SME" : "SEV"); 455 456 mask = dma_get_seg_boundary(hwdev); 457 458 tbl_dma_addr &= mask; 459 460 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 461 462 /* 463 * Carefully handle integer overflow which can occur when mask == ~0UL. 464 */ 465 max_slots = mask + 1 466 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT 467 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); 468 469 /* 470 * For mappings greater than or equal to a page, we limit the stride 471 * (and hence alignment) to a page size. 472 */ 473 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 474 if (size >= PAGE_SIZE) 475 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); 476 else 477 stride = 1; 478 479 BUG_ON(!nslots); 480 481 /* 482 * Find suitable number of IO TLB entries size that will fit this 483 * request and allocate a buffer from that IO TLB pool. 484 */ 485 spin_lock_irqsave(&io_tlb_lock, flags); 486 487 if (unlikely(nslots > io_tlb_nslabs - io_tlb_used)) 488 goto not_found; 489 490 index = ALIGN(io_tlb_index, stride); 491 if (index >= io_tlb_nslabs) 492 index = 0; 493 wrap = index; 494 495 do { 496 while (iommu_is_span_boundary(index, nslots, offset_slots, 497 max_slots)) { 498 index += stride; 499 if (index >= io_tlb_nslabs) 500 index = 0; 501 if (index == wrap) 502 goto not_found; 503 } 504 505 /* 506 * If we find a slot that indicates we have 'nslots' number of 507 * contiguous buffers, we allocate the buffers from that slot 508 * and mark the entries as '0' indicating unavailable. 509 */ 510 if (io_tlb_list[index] >= nslots) { 511 int count = 0; 512 513 for (i = index; i < (int) (index + nslots); i++) 514 io_tlb_list[i] = 0; 515 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) 516 io_tlb_list[i] = ++count; 517 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT); 518 519 /* 520 * Update the indices to avoid searching in the next 521 * round. 522 */ 523 io_tlb_index = ((index + nslots) < io_tlb_nslabs 524 ? (index + nslots) : 0); 525 526 goto found; 527 } 528 index += stride; 529 if (index >= io_tlb_nslabs) 530 index = 0; 531 } while (index != wrap); 532 533 not_found: 534 spin_unlock_irqrestore(&io_tlb_lock, flags); 535 if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit()) 536 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size); 537 return DMA_MAPPING_ERROR; 538 found: 539 io_tlb_used += nslots; 540 spin_unlock_irqrestore(&io_tlb_lock, flags); 541 542 /* 543 * Save away the mapping from the original address to the DMA address. 544 * This is needed when we sync the memory. Then we sync the buffer if 545 * needed. 546 */ 547 for (i = 0; i < nslots; i++) 548 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT); 549 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && 550 (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) 551 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE); 552 553 return tlb_addr; 554 } 555 556 /* 557 * tlb_addr is the physical address of the bounce buffer to unmap. 558 */ 559 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr, 560 size_t size, enum dma_data_direction dir, 561 unsigned long attrs) 562 { 563 unsigned long flags; 564 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 565 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; 566 phys_addr_t orig_addr = io_tlb_orig_addr[index]; 567 568 /* 569 * First, sync the memory before unmapping the entry 570 */ 571 if (orig_addr != INVALID_PHYS_ADDR && 572 !(attrs & DMA_ATTR_SKIP_CPU_SYNC) && 573 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) 574 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE); 575 576 /* 577 * Return the buffer to the free list by setting the corresponding 578 * entries to indicate the number of contiguous entries available. 579 * While returning the entries to the free list, we merge the entries 580 * with slots below and above the pool being returned. 581 */ 582 spin_lock_irqsave(&io_tlb_lock, flags); 583 { 584 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? 585 io_tlb_list[index + nslots] : 0); 586 /* 587 * Step 1: return the slots to the free list, merging the 588 * slots with superceeding slots 589 */ 590 for (i = index + nslots - 1; i >= index; i--) { 591 io_tlb_list[i] = ++count; 592 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; 593 } 594 /* 595 * Step 2: merge the returned slots with the preceding slots, 596 * if available (non zero) 597 */ 598 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) 599 io_tlb_list[i] = ++count; 600 601 io_tlb_used -= nslots; 602 } 603 spin_unlock_irqrestore(&io_tlb_lock, flags); 604 } 605 606 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr, 607 size_t size, enum dma_data_direction dir, 608 enum dma_sync_target target) 609 { 610 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; 611 phys_addr_t orig_addr = io_tlb_orig_addr[index]; 612 613 if (orig_addr == INVALID_PHYS_ADDR) 614 return; 615 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1); 616 617 switch (target) { 618 case SYNC_FOR_CPU: 619 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) 620 swiotlb_bounce(orig_addr, tlb_addr, 621 size, DMA_FROM_DEVICE); 622 else 623 BUG_ON(dir != DMA_TO_DEVICE); 624 break; 625 case SYNC_FOR_DEVICE: 626 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) 627 swiotlb_bounce(orig_addr, tlb_addr, 628 size, DMA_TO_DEVICE); 629 else 630 BUG_ON(dir != DMA_FROM_DEVICE); 631 break; 632 default: 633 BUG(); 634 } 635 } 636 637 /* 638 * Create a swiotlb mapping for the buffer at @phys, and in case of DMAing 639 * to the device copy the data into it as well. 640 */ 641 bool swiotlb_map(struct device *dev, phys_addr_t *phys, dma_addr_t *dma_addr, 642 size_t size, enum dma_data_direction dir, unsigned long attrs) 643 { 644 trace_swiotlb_bounced(dev, *dma_addr, size, swiotlb_force); 645 646 if (unlikely(swiotlb_force == SWIOTLB_NO_FORCE)) { 647 dev_warn_ratelimited(dev, 648 "Cannot do DMA to address %pa\n", phys); 649 return false; 650 } 651 652 /* Oh well, have to allocate and map a bounce buffer. */ 653 *phys = swiotlb_tbl_map_single(dev, __phys_to_dma(dev, io_tlb_start), 654 *phys, size, dir, attrs); 655 if (*phys == DMA_MAPPING_ERROR) 656 return false; 657 658 /* Ensure that the address returned is DMA'ble */ 659 *dma_addr = __phys_to_dma(dev, *phys); 660 if (unlikely(!dma_capable(dev, *dma_addr, size))) { 661 swiotlb_tbl_unmap_single(dev, *phys, size, dir, 662 attrs | DMA_ATTR_SKIP_CPU_SYNC); 663 return false; 664 } 665 666 return true; 667 } 668 669 #ifdef CONFIG_DEBUG_FS 670 671 static int __init swiotlb_create_debugfs(void) 672 { 673 struct dentry *d_swiotlb_usage; 674 struct dentry *ent; 675 676 d_swiotlb_usage = debugfs_create_dir("swiotlb", NULL); 677 678 if (!d_swiotlb_usage) 679 return -ENOMEM; 680 681 ent = debugfs_create_ulong("io_tlb_nslabs", 0400, 682 d_swiotlb_usage, &io_tlb_nslabs); 683 if (!ent) 684 goto fail; 685 686 ent = debugfs_create_ulong("io_tlb_used", 0400, 687 d_swiotlb_usage, &io_tlb_used); 688 if (!ent) 689 goto fail; 690 691 return 0; 692 693 fail: 694 debugfs_remove_recursive(d_swiotlb_usage); 695 return -ENOMEM; 696 } 697 698 late_initcall(swiotlb_create_debugfs); 699 700 #endif 701