1 /* include/video/samsung_fimd.h 2 * 3 * Copyright 2008 Openmoko, Inc. 4 * Copyright 2008 Simtec Electronics 5 * http://armlinux.simtec.co.uk/ 6 * Ben Dooks <ben@simtec.co.uk> 7 * 8 * S3C Platform - new-style fimd and framebuffer register definitions 9 * 10 * This is the register set for the fimd and new style framebuffer interface 11 * found from the S3C2443 onwards into the S3C2416, S3C2450 and the 12 * S3C64XX series such as the S3C6400 and S3C6410. 13 * 14 * The file does not contain the cpu specific items which are based on 15 * whichever architecture is selected, it only contains the core of the 16 * register set. See <mach/regs-fb.h> to get the specifics. 17 * 18 * This program is free software; you can redistribute it and/or modify 19 * it under the terms of the GNU General Public License version 2 as 20 * published by the Free Software Foundation. 21 */ 22 23 /* VIDCON0 */ 24 25 #define VIDCON0 (0x00) 26 #define VIDCON0_INTERLACE (1 << 29) 27 #define VIDCON0_VIDOUT_MASK (0x7 << 26) 28 #define VIDCON0_VIDOUT_SHIFT (26) 29 #define VIDCON0_VIDOUT_RGB (0x0 << 26) 30 #define VIDCON0_VIDOUT_TV (0x1 << 26) 31 #define VIDCON0_VIDOUT_I80_LDI0 (0x2 << 26) 32 #define VIDCON0_VIDOUT_I80_LDI1 (0x3 << 26) 33 #define VIDCON0_VIDOUT_WB_RGB (0x4 << 26) 34 #define VIDCON0_VIDOUT_WB_I80_LDI0 (0x6 << 26) 35 #define VIDCON0_VIDOUT_WB_I80_LDI1 (0x7 << 26) 36 37 #define VIDCON0_L1_DATA_MASK (0x7 << 23) 38 #define VIDCON0_L1_DATA_SHIFT (23) 39 #define VIDCON0_L1_DATA_16BPP (0x0 << 23) 40 #define VIDCON0_L1_DATA_18BPP16 (0x1 << 23) 41 #define VIDCON0_L1_DATA_18BPP9 (0x2 << 23) 42 #define VIDCON0_L1_DATA_24BPP (0x3 << 23) 43 #define VIDCON0_L1_DATA_18BPP (0x4 << 23) 44 #define VIDCON0_L1_DATA_16BPP8 (0x5 << 23) 45 46 #define VIDCON0_L0_DATA_MASK (0x7 << 20) 47 #define VIDCON0_L0_DATA_SHIFT (20) 48 #define VIDCON0_L0_DATA_16BPP (0x0 << 20) 49 #define VIDCON0_L0_DATA_18BPP16 (0x1 << 20) 50 #define VIDCON0_L0_DATA_18BPP9 (0x2 << 20) 51 #define VIDCON0_L0_DATA_24BPP (0x3 << 20) 52 #define VIDCON0_L0_DATA_18BPP (0x4 << 20) 53 #define VIDCON0_L0_DATA_16BPP8 (0x5 << 20) 54 55 #define VIDCON0_PNRMODE_MASK (0x3 << 17) 56 #define VIDCON0_PNRMODE_SHIFT (17) 57 #define VIDCON0_PNRMODE_RGB (0x0 << 17) 58 #define VIDCON0_PNRMODE_BGR (0x1 << 17) 59 #define VIDCON0_PNRMODE_SERIAL_RGB (0x2 << 17) 60 #define VIDCON0_PNRMODE_SERIAL_BGR (0x3 << 17) 61 62 #define VIDCON0_CLKVALUP (1 << 16) 63 #define VIDCON0_CLKVAL_F_MASK (0xff << 6) 64 #define VIDCON0_CLKVAL_F_SHIFT (6) 65 #define VIDCON0_CLKVAL_F_LIMIT (0xff) 66 #define VIDCON0_CLKVAL_F(_x) ((_x) << 6) 67 #define VIDCON0_VLCKFREE (1 << 5) 68 #define VIDCON0_CLKDIR (1 << 4) 69 70 #define VIDCON0_CLKSEL_MASK (0x3 << 2) 71 #define VIDCON0_CLKSEL_SHIFT (2) 72 #define VIDCON0_CLKSEL_HCLK (0x0 << 2) 73 #define VIDCON0_CLKSEL_LCD (0x1 << 2) 74 #define VIDCON0_CLKSEL_27M (0x3 << 2) 75 76 #define VIDCON0_ENVID (1 << 1) 77 #define VIDCON0_ENVID_F (1 << 0) 78 79 #define VIDCON1 (0x04) 80 #define VIDCON1_LINECNT_MASK (0x7ff << 16) 81 #define VIDCON1_LINECNT_SHIFT (16) 82 #define VIDCON1_LINECNT_GET(_v) (((_v) >> 16) & 0x7ff) 83 #define VIDCON1_FSTATUS_EVEN (1 << 15) 84 #define VIDCON1_VSTATUS_MASK (0x3 << 13) 85 #define VIDCON1_VSTATUS_SHIFT (13) 86 #define VIDCON1_VSTATUS_VSYNC (0x0 << 13) 87 #define VIDCON1_VSTATUS_BACKPORCH (0x1 << 13) 88 #define VIDCON1_VSTATUS_ACTIVE (0x2 << 13) 89 #define VIDCON1_VSTATUS_FRONTPORCH (0x0 << 13) 90 #define VIDCON1_VCLK_MASK (0x3 << 9) 91 #define VIDCON1_VCLK_HOLD (0x0 << 9) 92 #define VIDCON1_VCLK_RUN (0x1 << 9) 93 94 #define VIDCON1_INV_VCLK (1 << 7) 95 #define VIDCON1_INV_HSYNC (1 << 6) 96 #define VIDCON1_INV_VSYNC (1 << 5) 97 #define VIDCON1_INV_VDEN (1 << 4) 98 99 /* VIDCON2 */ 100 101 #define VIDCON2 (0x08) 102 #define VIDCON2_EN601 (1 << 23) 103 #define VIDCON2_TVFMTSEL_SW (1 << 14) 104 105 #define VIDCON2_TVFMTSEL1_MASK (0x3 << 12) 106 #define VIDCON2_TVFMTSEL1_SHIFT (12) 107 #define VIDCON2_TVFMTSEL1_RGB (0x0 << 12) 108 #define VIDCON2_TVFMTSEL1_YUV422 (0x1 << 12) 109 #define VIDCON2_TVFMTSEL1_YUV444 (0x2 << 12) 110 111 #define VIDCON2_ORGYCbCr (1 << 8) 112 #define VIDCON2_YUVORDCrCb (1 << 7) 113 114 /* PRTCON (S3C6410, S5PC100) 115 * Might not be present in the S3C6410 documentation, 116 * but tests prove it's there almost for sure; shouldn't hurt in any case. 117 */ 118 #define PRTCON (0x0c) 119 #define PRTCON_PROTECT (1 << 11) 120 121 /* VIDTCON0 */ 122 123 #define VIDTCON0 (0x10) 124 #define VIDTCON0_VBPDE_MASK (0xff << 24) 125 #define VIDTCON0_VBPDE_SHIFT (24) 126 #define VIDTCON0_VBPDE_LIMIT (0xff) 127 #define VIDTCON0_VBPDE(_x) ((_x) << 24) 128 129 #define VIDTCON0_VBPD_MASK (0xff << 16) 130 #define VIDTCON0_VBPD_SHIFT (16) 131 #define VIDTCON0_VBPD_LIMIT (0xff) 132 #define VIDTCON0_VBPD(_x) ((_x) << 16) 133 134 #define VIDTCON0_VFPD_MASK (0xff << 8) 135 #define VIDTCON0_VFPD_SHIFT (8) 136 #define VIDTCON0_VFPD_LIMIT (0xff) 137 #define VIDTCON0_VFPD(_x) ((_x) << 8) 138 139 #define VIDTCON0_VSPW_MASK (0xff << 0) 140 #define VIDTCON0_VSPW_SHIFT (0) 141 #define VIDTCON0_VSPW_LIMIT (0xff) 142 #define VIDTCON0_VSPW(_x) ((_x) << 0) 143 144 /* VIDTCON1 */ 145 146 #define VIDTCON1 (0x14) 147 #define VIDTCON1_VFPDE_MASK (0xff << 24) 148 #define VIDTCON1_VFPDE_SHIFT (24) 149 #define VIDTCON1_VFPDE_LIMIT (0xff) 150 #define VIDTCON1_VFPDE(_x) ((_x) << 24) 151 152 #define VIDTCON1_HBPD_MASK (0xff << 16) 153 #define VIDTCON1_HBPD_SHIFT (16) 154 #define VIDTCON1_HBPD_LIMIT (0xff) 155 #define VIDTCON1_HBPD(_x) ((_x) << 16) 156 157 #define VIDTCON1_HFPD_MASK (0xff << 8) 158 #define VIDTCON1_HFPD_SHIFT (8) 159 #define VIDTCON1_HFPD_LIMIT (0xff) 160 #define VIDTCON1_HFPD(_x) ((_x) << 8) 161 162 #define VIDTCON1_HSPW_MASK (0xff << 0) 163 #define VIDTCON1_HSPW_SHIFT (0) 164 #define VIDTCON1_HSPW_LIMIT (0xff) 165 #define VIDTCON1_HSPW(_x) ((_x) << 0) 166 167 #define VIDTCON2 (0x18) 168 #define VIDTCON2 (0x18) 169 #define VIDTCON2_LINEVAL_E(_x) ((((_x) & 0x800) >> 11) << 23) 170 #define VIDTCON2_LINEVAL_MASK (0x7ff << 11) 171 #define VIDTCON2_LINEVAL_SHIFT (11) 172 #define VIDTCON2_LINEVAL_LIMIT (0x7ff) 173 #define VIDTCON2_LINEVAL(_x) (((_x) & 0x7ff) << 11) 174 175 #define VIDTCON2_HOZVAL_E(_x) ((((_x) & 0x800) >> 11) << 22) 176 #define VIDTCON2_HOZVAL_MASK (0x7ff << 0) 177 #define VIDTCON2_HOZVAL_SHIFT (0) 178 #define VIDTCON2_HOZVAL_LIMIT (0x7ff) 179 #define VIDTCON2_HOZVAL(_x) (((_x) & 0x7ff) << 0) 180 181 /* WINCONx */ 182 183 #define WINCON(_win) (0x20 + ((_win) * 4)) 184 #define WINCONx_CSCWIDTH_MASK (0x3 << 26) 185 #define WINCONx_CSCWIDTH_SHIFT (26) 186 #define WINCONx_CSCWIDTH_WIDE (0x0 << 26) 187 #define WINCONx_CSCWIDTH_NARROW (0x3 << 26) 188 #define WINCONx_ENLOCAL (1 << 22) 189 #define WINCONx_BUFSTATUS (1 << 21) 190 #define WINCONx_BUFSEL (1 << 20) 191 #define WINCONx_BUFAUTOEN (1 << 19) 192 #define WINCONx_BITSWP (1 << 18) 193 #define WINCONx_BYTSWP (1 << 17) 194 #define WINCONx_HAWSWP (1 << 16) 195 #define WINCONx_WSWP (1 << 15) 196 #define WINCONx_YCbCr (1 << 13) 197 #define WINCONx_BURSTLEN_MASK (0x3 << 9) 198 #define WINCONx_BURSTLEN_SHIFT (9) 199 #define WINCONx_BURSTLEN_16WORD (0x0 << 9) 200 #define WINCONx_BURSTLEN_8WORD (0x1 << 9) 201 #define WINCONx_BURSTLEN_4WORD (0x2 << 9) 202 #define WINCONx_ENWIN (1 << 0) 203 204 #define WINCON0_BPPMODE_MASK (0xf << 2) 205 #define WINCON0_BPPMODE_SHIFT (2) 206 #define WINCON0_BPPMODE_1BPP (0x0 << 2) 207 #define WINCON0_BPPMODE_2BPP (0x1 << 2) 208 #define WINCON0_BPPMODE_4BPP (0x2 << 2) 209 #define WINCON0_BPPMODE_8BPP_PALETTE (0x3 << 2) 210 #define WINCON0_BPPMODE_16BPP_565 (0x5 << 2) 211 #define WINCON0_BPPMODE_16BPP_1555 (0x7 << 2) 212 #define WINCON0_BPPMODE_18BPP_666 (0x8 << 2) 213 #define WINCON0_BPPMODE_24BPP_888 (0xb << 2) 214 215 #define WINCON1_LOCALSEL_CAMIF (1 << 23) 216 #define WINCON1_BLD_PIX (1 << 6) 217 #define WINCON1_BPPMODE_MASK (0xf << 2) 218 #define WINCON1_BPPMODE_SHIFT (2) 219 #define WINCON1_BPPMODE_1BPP (0x0 << 2) 220 #define WINCON1_BPPMODE_2BPP (0x1 << 2) 221 #define WINCON1_BPPMODE_4BPP (0x2 << 2) 222 #define WINCON1_BPPMODE_8BPP_PALETTE (0x3 << 2) 223 #define WINCON1_BPPMODE_8BPP_1232 (0x4 << 2) 224 #define WINCON1_BPPMODE_16BPP_565 (0x5 << 2) 225 #define WINCON1_BPPMODE_16BPP_A1555 (0x6 << 2) 226 #define WINCON1_BPPMODE_16BPP_I1555 (0x7 << 2) 227 #define WINCON1_BPPMODE_18BPP_666 (0x8 << 2) 228 #define WINCON1_BPPMODE_18BPP_A1665 (0x9 << 2) 229 #define WINCON1_BPPMODE_19BPP_A1666 (0xa << 2) 230 #define WINCON1_BPPMODE_24BPP_888 (0xb << 2) 231 #define WINCON1_BPPMODE_24BPP_A1887 (0xc << 2) 232 #define WINCON1_BPPMODE_25BPP_A1888 (0xd << 2) 233 #define WINCON1_BPPMODE_28BPP_A4888 (0xd << 2) 234 #define WINCON1_ALPHA_SEL (1 << 1) 235 236 /* S5PV210 */ 237 #define SHADOWCON (0x34) 238 #define SHADOWCON_WINx_PROTECT(_win) (1 << (10 + (_win))) 239 /* DMA channels (all windows) */ 240 #define SHADOWCON_CHx_ENABLE(_win) (1 << (_win)) 241 /* Local input channels (windows 0-2) */ 242 #define SHADOWCON_CHx_LOCAL_ENABLE(_win) (1 << (5 + (_win))) 243 244 /* VIDOSDx */ 245 246 #define VIDOSD_BASE (0x40) 247 #define VIDOSDxA_TOPLEFT_X_E(_x) ((((_x) & 0x800) >> 11) << 23) 248 #define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11) 249 #define VIDOSDxA_TOPLEFT_X_SHIFT (11) 250 #define VIDOSDxA_TOPLEFT_X_LIMIT (0x7ff) 251 #define VIDOSDxA_TOPLEFT_X(_x) (((_x) & 0x7ff) << 11) 252 253 #define VIDOSDxA_TOPLEFT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22) 254 #define VIDOSDxA_TOPLEFT_Y_MASK (0x7ff << 0) 255 #define VIDOSDxA_TOPLEFT_Y_SHIFT (0) 256 #define VIDOSDxA_TOPLEFT_Y_LIMIT (0x7ff) 257 #define VIDOSDxA_TOPLEFT_Y(_x) (((_x) & 0x7ff) << 0) 258 259 #define VIDOSDxB_BOTRIGHT_X_E(_x) ((((_x) & 0x800) >> 11) << 23) 260 #define VIDOSDxB_BOTRIGHT_X_MASK (0x7ff << 11) 261 #define VIDOSDxB_BOTRIGHT_X_SHIFT (11) 262 #define VIDOSDxB_BOTRIGHT_X_LIMIT (0x7ff) 263 #define VIDOSDxB_BOTRIGHT_X(_x) (((_x) & 0x7ff) << 11) 264 265 #define VIDOSDxB_BOTRIGHT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22) 266 #define VIDOSDxB_BOTRIGHT_Y_MASK (0x7ff << 0) 267 #define VIDOSDxB_BOTRIGHT_Y_SHIFT (0) 268 #define VIDOSDxB_BOTRIGHT_Y_LIMIT (0x7ff) 269 #define VIDOSDxB_BOTRIGHT_Y(_x) (((_x) & 0x7ff) << 0) 270 271 /* For VIDOSD[1..4]C */ 272 #define VIDISD14C_ALPHA0_R(_x) ((_x) << 20) 273 #define VIDISD14C_ALPHA0_G_MASK (0xf << 16) 274 #define VIDISD14C_ALPHA0_G_SHIFT (16) 275 #define VIDISD14C_ALPHA0_G_LIMIT (0xf) 276 #define VIDISD14C_ALPHA0_G(_x) ((_x) << 16) 277 #define VIDISD14C_ALPHA0_B_MASK (0xf << 12) 278 #define VIDISD14C_ALPHA0_B_SHIFT (12) 279 #define VIDISD14C_ALPHA0_B_LIMIT (0xf) 280 #define VIDISD14C_ALPHA0_B(_x) ((_x) << 12) 281 #define VIDISD14C_ALPHA1_R_MASK (0xf << 8) 282 #define VIDISD14C_ALPHA1_R_SHIFT (8) 283 #define VIDISD14C_ALPHA1_R_LIMIT (0xf) 284 #define VIDISD14C_ALPHA1_R(_x) ((_x) << 8) 285 #define VIDISD14C_ALPHA1_G_MASK (0xf << 4) 286 #define VIDISD14C_ALPHA1_G_SHIFT (4) 287 #define VIDISD14C_ALPHA1_G_LIMIT (0xf) 288 #define VIDISD14C_ALPHA1_G(_x) ((_x) << 4) 289 #define VIDISD14C_ALPHA1_B_MASK (0xf << 0) 290 #define VIDISD14C_ALPHA1_B_SHIFT (0) 291 #define VIDISD14C_ALPHA1_B_LIMIT (0xf) 292 #define VIDISD14C_ALPHA1_B(_x) ((_x) << 0) 293 294 /* Video buffer addresses */ 295 #define VIDW_BUF_START(_buff) (0xA0 + ((_buff) * 8)) 296 #define VIDW_BUF_START1(_buff) (0xA4 + ((_buff) * 8)) 297 #define VIDW_BUF_END(_buff) (0xD0 + ((_buff) * 8)) 298 #define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8)) 299 #define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4)) 300 301 #define VIDW_BUF_SIZE_OFFSET_E(_x) ((((_x) & 0x2000) >> 13) << 27) 302 #define VIDW_BUF_SIZE_OFFSET_MASK (0x1fff << 13) 303 #define VIDW_BUF_SIZE_OFFSET_SHIFT (13) 304 #define VIDW_BUF_SIZE_OFFSET_LIMIT (0x1fff) 305 #define VIDW_BUF_SIZE_OFFSET(_x) (((_x) & 0x1fff) << 13) 306 307 #define VIDW_BUF_SIZE_PAGEWIDTH_E(_x) ((((_x) & 0x2000) >> 13) << 26) 308 #define VIDW_BUF_SIZE_PAGEWIDTH_MASK (0x1fff << 0) 309 #define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT (0) 310 #define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT (0x1fff) 311 #define VIDW_BUF_SIZE_PAGEWIDTH(_x) (((_x) & 0x1fff) << 0) 312 313 /* Interrupt controls and status */ 314 315 #define VIDINTCON0 (0x130) 316 #define VIDINTCON0_FIFOINTERVAL_MASK (0x3f << 20) 317 #define VIDINTCON0_FIFOINTERVAL_SHIFT (20) 318 #define VIDINTCON0_FIFOINTERVAL_LIMIT (0x3f) 319 #define VIDINTCON0_FIFOINTERVAL(_x) ((_x) << 20) 320 321 #define VIDINTCON0_INT_SYSMAINCON (1 << 19) 322 #define VIDINTCON0_INT_SYSSUBCON (1 << 18) 323 #define VIDINTCON0_INT_I80IFDONE (1 << 17) 324 325 #define VIDINTCON0_FRAMESEL0_MASK (0x3 << 15) 326 #define VIDINTCON0_FRAMESEL0_SHIFT (15) 327 #define VIDINTCON0_FRAMESEL0_BACKPORCH (0x0 << 15) 328 #define VIDINTCON0_FRAMESEL0_VSYNC (0x1 << 15) 329 #define VIDINTCON0_FRAMESEL0_ACTIVE (0x2 << 15) 330 #define VIDINTCON0_FRAMESEL0_FRONTPORCH (0x3 << 15) 331 332 #define VIDINTCON0_FRAMESEL1 (1 << 13) 333 #define VIDINTCON0_FRAMESEL1_MASK (0x3 << 13) 334 #define VIDINTCON0_FRAMESEL1_NONE (0x0 << 13) 335 #define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 13) 336 #define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 13) 337 #define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 13) 338 339 #define VIDINTCON0_INT_FRAME (1 << 12) 340 #define VIDINTCON0_FIFIOSEL_MASK (0x7f << 5) 341 #define VIDINTCON0_FIFIOSEL_SHIFT (5) 342 #define VIDINTCON0_FIFIOSEL_WINDOW0 (0x1 << 5) 343 #define VIDINTCON0_FIFIOSEL_WINDOW1 (0x2 << 5) 344 #define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) 345 #define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5) 346 #define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5) 347 348 #define VIDINTCON0_FIFOLEVEL_MASK (0x7 << 2) 349 #define VIDINTCON0_FIFOLEVEL_SHIFT (2) 350 #define VIDINTCON0_FIFOLEVEL_TO25PC (0x0 << 2) 351 #define VIDINTCON0_FIFOLEVEL_TO50PC (0x1 << 2) 352 #define VIDINTCON0_FIFOLEVEL_TO75PC (0x2 << 2) 353 #define VIDINTCON0_FIFOLEVEL_EMPTY (0x3 << 2) 354 #define VIDINTCON0_FIFOLEVEL_FULL (0x4 << 2) 355 356 #define VIDINTCON0_INT_FIFO_MASK (0x3 << 0) 357 #define VIDINTCON0_INT_FIFO_SHIFT (0) 358 #define VIDINTCON0_INT_ENABLE (1 << 0) 359 360 #define VIDINTCON1 (0x134) 361 #define VIDINTCON1_INT_I180 (1 << 2) 362 #define VIDINTCON1_INT_FRAME (1 << 1) 363 #define VIDINTCON1_INT_FIFO (1 << 0) 364 365 /* Window colour-key control registers */ 366 #define WKEYCON (0x140) /* 6410,V210 */ 367 368 #define WKEYCON0 (0x00) 369 #define WKEYCON1 (0x04) 370 371 #define WxKEYCON0_KEYBL_EN (1 << 26) 372 #define WxKEYCON0_KEYEN_F (1 << 25) 373 #define WxKEYCON0_DIRCON (1 << 24) 374 #define WxKEYCON0_COMPKEY_MASK (0xffffff << 0) 375 #define WxKEYCON0_COMPKEY_SHIFT (0) 376 #define WxKEYCON0_COMPKEY_LIMIT (0xffffff) 377 #define WxKEYCON0_COMPKEY(_x) ((_x) << 0) 378 #define WxKEYCON1_COLVAL_MASK (0xffffff << 0) 379 #define WxKEYCON1_COLVAL_SHIFT (0) 380 #define WxKEYCON1_COLVAL_LIMIT (0xffffff) 381 #define WxKEYCON1_COLVAL(_x) ((_x) << 0) 382 383 /* Dithering control */ 384 #define DITHMODE (0x170) 385 #define DITHMODE_R_POS_MASK (0x3 << 5) 386 #define DITHMODE_R_POS_SHIFT (5) 387 #define DITHMODE_R_POS_8BIT (0x0 << 5) 388 #define DITHMODE_R_POS_6BIT (0x1 << 5) 389 #define DITHMODE_R_POS_5BIT (0x2 << 5) 390 #define DITHMODE_G_POS_MASK (0x3 << 3) 391 #define DITHMODE_G_POS_SHIFT (3) 392 #define DITHMODE_G_POS_8BIT (0x0 << 3) 393 #define DITHMODE_G_POS_6BIT (0x1 << 3) 394 #define DITHMODE_G_POS_5BIT (0x2 << 3) 395 #define DITHMODE_B_POS_MASK (0x3 << 1) 396 #define DITHMODE_B_POS_SHIFT (1) 397 #define DITHMODE_B_POS_8BIT (0x0 << 1) 398 #define DITHMODE_B_POS_6BIT (0x1 << 1) 399 #define DITHMODE_B_POS_5BIT (0x2 << 1) 400 #define DITHMODE_DITH_EN (1 << 0) 401 402 /* Window blanking (MAP) */ 403 #define WINxMAP(_win) (0x180 + ((_win) * 4)) 404 #define WINxMAP_MAP (1 << 24) 405 #define WINxMAP_MAP_COLOUR_MASK (0xffffff << 0) 406 #define WINxMAP_MAP_COLOUR_SHIFT (0) 407 #define WINxMAP_MAP_COLOUR_LIMIT (0xffffff) 408 #define WINxMAP_MAP_COLOUR(_x) ((_x) << 0) 409 410 /* Winodw palette control */ 411 #define WPALCON (0x1A0) 412 #define WPALCON_PAL_UPDATE (1 << 9) 413 #define WPALCON_W4PAL_16BPP_A555 (1 << 8) 414 #define WPALCON_W3PAL_16BPP_A555 (1 << 7) 415 #define WPALCON_W2PAL_16BPP_A555 (1 << 6) 416 #define WPALCON_W1PAL_MASK (0x7 << 3) 417 #define WPALCON_W1PAL_SHIFT (3) 418 #define WPALCON_W1PAL_25BPP_A888 (0x0 << 3) 419 #define WPALCON_W1PAL_24BPP (0x1 << 3) 420 #define WPALCON_W1PAL_19BPP_A666 (0x2 << 3) 421 #define WPALCON_W1PAL_18BPP_A665 (0x3 << 3) 422 #define WPALCON_W1PAL_18BPP (0x4 << 3) 423 #define WPALCON_W1PAL_16BPP_A555 (0x5 << 3) 424 #define WPALCON_W1PAL_16BPP_565 (0x6 << 3) 425 #define WPALCON_W0PAL_MASK (0x7 << 0) 426 #define WPALCON_W0PAL_SHIFT (0) 427 #define WPALCON_W0PAL_25BPP_A888 (0x0 << 0) 428 #define WPALCON_W0PAL_24BPP (0x1 << 0) 429 #define WPALCON_W0PAL_19BPP_A666 (0x2 << 0) 430 #define WPALCON_W0PAL_18BPP_A665 (0x3 << 0) 431 #define WPALCON_W0PAL_18BPP (0x4 << 0) 432 #define WPALCON_W0PAL_16BPP_A555 (0x5 << 0) 433 #define WPALCON_W0PAL_16BPP_565 (0x6 << 0) 434 435 /* Blending equation control */ 436 #define BLENDCON (0x260) 437 #define BLENDCON_NEW_MASK (1 << 0) 438 #define BLENDCON_NEW_8BIT_ALPHA_VALUE (1 << 0) 439 #define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0) 440 441 #define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */ 442 443 /* Notes on per-window bpp settings 444 * 445 * Value Win0 Win1 Win2 Win3 Win 4 446 * 0000 1(P) 1(P) 1(P) 1(P) 1(P) 447 * 0001 2(P) 2(P) 2(P) 2(P) 2(P) 448 * 0010 4(P) 4(P) 4(P) 4(P) -none- 449 * 0011 8(P) 8(P) -none- -none- -none- 450 * 0100 -none- 8(A232) 8(A232) -none- -none- 451 * 0101 16(565) 16(565) 16(565) 16(565) 16(565) 452 * 0110 -none- 16(A555) 16(A555) 16(A555) 16(A555) 453 * 0111 16(I555) 16(I565) 16(I555) 16(I555) 16(I555) 454 * 1000 18(666) 18(666) 18(666) 18(666) 18(666) 455 * 1001 -none- 18(A665) 18(A665) 18(A665) 16(A665) 456 * 1010 -none- 19(A666) 19(A666) 19(A666) 19(A666) 457 * 1011 24(888) 24(888) 24(888) 24(888) 24(888) 458 * 1100 -none- 24(A887) 24(A887) 24(A887) 24(A887) 459 * 1101 -none- 25(A888) 25(A888) 25(A888) 25(A888) 460 * 1110 -none- -none- -none- -none- -none- 461 * 1111 -none- -none- -none- -none- -none- 462 */ 463 464 /* FIMD Version 8 register offset definitions */ 465 #define FIMD_V8_VIDTCON0 (0x20010) 466 #define FIMD_V8_VIDTCON1 (0x20014) 467 #define FIMD_V8_VIDTCON2 (0x20018) 468 #define FIMD_V8_VIDTCON3 (0x2001C) 469 #define FIMD_V8_VIDCON1 (0x20004) 470