1*1da177e4SLinus Torvalds /* 2*1da177e4SLinus Torvalds * Phase5 CybervisionPPC (TVP4020) definitions for the Permedia2 framebuffer 3*1da177e4SLinus Torvalds * driver. 4*1da177e4SLinus Torvalds * 5*1da177e4SLinus Torvalds * Copyright (c) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT) 6*1da177e4SLinus Torvalds * -------------------------------------------------------------------------- 7*1da177e4SLinus Torvalds * $Id: cvisionppc.h,v 1.8 1999/01/28 13:18:07 illo Exp $ 8*1da177e4SLinus Torvalds * -------------------------------------------------------------------------- 9*1da177e4SLinus Torvalds * This file is subject to the terms and conditions of the GNU General Public 10*1da177e4SLinus Torvalds * License. See the file COPYING in the main directory of this archive 11*1da177e4SLinus Torvalds * for more details. 12*1da177e4SLinus Torvalds */ 13*1da177e4SLinus Torvalds 14*1da177e4SLinus Torvalds #ifndef CVISIONPPC_H 15*1da177e4SLinus Torvalds #define CVISIONPPC_H 16*1da177e4SLinus Torvalds 17*1da177e4SLinus Torvalds #ifndef PM2FB_H 18*1da177e4SLinus Torvalds #include "pm2fb.h" 19*1da177e4SLinus Torvalds #endif 20*1da177e4SLinus Torvalds 21*1da177e4SLinus Torvalds struct cvppc_par { 22*1da177e4SLinus Torvalds unsigned char* pci_config; 23*1da177e4SLinus Torvalds unsigned char* pci_bridge; 24*1da177e4SLinus Torvalds u32 user_flags; 25*1da177e4SLinus Torvalds }; 26*1da177e4SLinus Torvalds 27*1da177e4SLinus Torvalds #define CSPPC_PCI_BRIDGE 0xfffe0000 28*1da177e4SLinus Torvalds #define CSPPC_BRIDGE_ENDIAN 0x0000 29*1da177e4SLinus Torvalds #define CSPPC_BRIDGE_INT 0x0010 30*1da177e4SLinus Torvalds 31*1da177e4SLinus Torvalds #define CVPPC_PCI_CONFIG 0xfffc0000 32*1da177e4SLinus Torvalds #define CVPPC_ROM_ADDRESS 0xe2000001 33*1da177e4SLinus Torvalds #define CVPPC_REGS_REGION 0xef000000 34*1da177e4SLinus Torvalds #define CVPPC_FB_APERTURE_ONE 0xe0000000 35*1da177e4SLinus Torvalds #define CVPPC_FB_APERTURE_TWO 0xe1000000 36*1da177e4SLinus Torvalds #define CVPPC_FB_SIZE 0x00800000 37*1da177e4SLinus Torvalds #define CVPPC_MEM_CONFIG_OLD 0xed61fcaa /* FIXME Fujitsu?? */ 38*1da177e4SLinus Torvalds #define CVPPC_MEM_CONFIG_NEW 0xed41c532 /* FIXME USA?? */ 39*1da177e4SLinus Torvalds #define CVPPC_MEMCLOCK 83000 /* in KHz */ 40*1da177e4SLinus Torvalds 41*1da177e4SLinus Torvalds /* CVPPC_BRIDGE_ENDIAN */ 42*1da177e4SLinus Torvalds #define CSPPCF_BRIDGE_BIG_ENDIAN 0x02 43*1da177e4SLinus Torvalds 44*1da177e4SLinus Torvalds /* CVPPC_BRIDGE_INT */ 45*1da177e4SLinus Torvalds #define CSPPCF_BRIDGE_ACTIVE_INT2 0x01 46*1da177e4SLinus Torvalds 47*1da177e4SLinus Torvalds #endif /* CVISIONPPC_H */ 48*1da177e4SLinus Torvalds 49*1da177e4SLinus Torvalds /***************************************************************************** 50*1da177e4SLinus Torvalds * That's all folks! 51*1da177e4SLinus Torvalds *****************************************************************************/ 52