1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Universal Flash Storage Host controller driver 4 * Copyright (C) 2011-2013 Samsung India Software Operations 5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 6 * 7 * Authors: 8 * Santosh Yaraganavi <santosh.sy@samsung.com> 9 * Vinayak Holikatti <h.vinayak@samsung.com> 10 */ 11 12 #ifndef _UFSHCD_H 13 #define _UFSHCD_H 14 15 #include <linux/bitfield.h> 16 #include <linux/blk-crypto-profile.h> 17 #include <linux/blk-mq.h> 18 #include <linux/devfreq.h> 19 #include <linux/pm_runtime.h> 20 #include <scsi/scsi_device.h> 21 #include <ufs/unipro.h> 22 #include <ufs/ufs.h> 23 #include <ufs/ufs_quirks.h> 24 #include <ufs/ufshci.h> 25 26 #define UFSHCD "ufshcd" 27 28 struct ufs_hba; 29 30 enum dev_cmd_type { 31 DEV_CMD_TYPE_NOP = 0x0, 32 DEV_CMD_TYPE_QUERY = 0x1, 33 }; 34 35 enum ufs_event_type { 36 /* uic specific errors */ 37 UFS_EVT_PA_ERR = 0, 38 UFS_EVT_DL_ERR, 39 UFS_EVT_NL_ERR, 40 UFS_EVT_TL_ERR, 41 UFS_EVT_DME_ERR, 42 43 /* fatal errors */ 44 UFS_EVT_AUTO_HIBERN8_ERR, 45 UFS_EVT_FATAL_ERR, 46 UFS_EVT_LINK_STARTUP_FAIL, 47 UFS_EVT_RESUME_ERR, 48 UFS_EVT_SUSPEND_ERR, 49 UFS_EVT_WL_SUSP_ERR, 50 UFS_EVT_WL_RES_ERR, 51 52 /* abnormal events */ 53 UFS_EVT_DEV_RESET, 54 UFS_EVT_HOST_RESET, 55 UFS_EVT_ABORT, 56 57 UFS_EVT_CNT, 58 }; 59 60 /** 61 * struct uic_command - UIC command structure 62 * @command: UIC command 63 * @argument1: UIC command argument 1 64 * @argument2: UIC command argument 2 65 * @argument3: UIC command argument 3 66 * @cmd_active: Indicate if UIC command is outstanding 67 * @done: UIC command completion 68 */ 69 struct uic_command { 70 u32 command; 71 u32 argument1; 72 u32 argument2; 73 u32 argument3; 74 int cmd_active; 75 struct completion done; 76 }; 77 78 /* Used to differentiate the power management options */ 79 enum ufs_pm_op { 80 UFS_RUNTIME_PM, 81 UFS_SYSTEM_PM, 82 UFS_SHUTDOWN_PM, 83 }; 84 85 /* Host <-> Device UniPro Link state */ 86 enum uic_link_state { 87 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */ 88 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */ 89 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */ 90 UIC_LINK_BROKEN_STATE = 3, /* Link is in broken state */ 91 }; 92 93 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE) 94 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \ 95 UIC_LINK_ACTIVE_STATE) 96 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \ 97 UIC_LINK_HIBERN8_STATE) 98 #define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \ 99 UIC_LINK_BROKEN_STATE) 100 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE) 101 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \ 102 UIC_LINK_ACTIVE_STATE) 103 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \ 104 UIC_LINK_HIBERN8_STATE) 105 #define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \ 106 UIC_LINK_BROKEN_STATE) 107 108 #define ufshcd_set_ufs_dev_active(h) \ 109 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE) 110 #define ufshcd_set_ufs_dev_sleep(h) \ 111 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE) 112 #define ufshcd_set_ufs_dev_poweroff(h) \ 113 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE) 114 #define ufshcd_set_ufs_dev_deepsleep(h) \ 115 ((h)->curr_dev_pwr_mode = UFS_DEEPSLEEP_PWR_MODE) 116 #define ufshcd_is_ufs_dev_active(h) \ 117 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE) 118 #define ufshcd_is_ufs_dev_sleep(h) \ 119 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE) 120 #define ufshcd_is_ufs_dev_poweroff(h) \ 121 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE) 122 #define ufshcd_is_ufs_dev_deepsleep(h) \ 123 ((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE) 124 125 /* 126 * UFS Power management levels. 127 * Each level is in increasing order of power savings, except DeepSleep 128 * which is lower than PowerDown with power on but not PowerDown with 129 * power off. 130 */ 131 enum ufs_pm_level { 132 UFS_PM_LVL_0, 133 UFS_PM_LVL_1, 134 UFS_PM_LVL_2, 135 UFS_PM_LVL_3, 136 UFS_PM_LVL_4, 137 UFS_PM_LVL_5, 138 UFS_PM_LVL_6, 139 UFS_PM_LVL_MAX 140 }; 141 142 struct ufs_pm_lvl_states { 143 enum ufs_dev_pwr_mode dev_state; 144 enum uic_link_state link_state; 145 }; 146 147 /** 148 * struct ufshcd_lrb - local reference block 149 * @utr_descriptor_ptr: UTRD address of the command 150 * @ucd_req_ptr: UCD address of the command 151 * @ucd_rsp_ptr: Response UPIU address for this command 152 * @ucd_prdt_ptr: PRDT address of the command 153 * @utrd_dma_addr: UTRD dma address for debug 154 * @ucd_prdt_dma_addr: PRDT dma address for debug 155 * @ucd_rsp_dma_addr: UPIU response dma address for debug 156 * @ucd_req_dma_addr: UPIU request dma address for debug 157 * @cmd: pointer to SCSI command 158 * @scsi_status: SCSI status of the command 159 * @command_type: SCSI, UFS, Query. 160 * @task_tag: Task tag of the command 161 * @lun: LUN of the command 162 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation) 163 * @issue_time_stamp: time stamp for debug purposes 164 * @compl_time_stamp: time stamp for statistics 165 * @crypto_key_slot: the key slot to use for inline crypto (-1 if none) 166 * @data_unit_num: the data unit number for the first block for inline crypto 167 * @req_abort_skip: skip request abort task flag 168 */ 169 struct ufshcd_lrb { 170 struct utp_transfer_req_desc *utr_descriptor_ptr; 171 struct utp_upiu_req *ucd_req_ptr; 172 struct utp_upiu_rsp *ucd_rsp_ptr; 173 struct ufshcd_sg_entry *ucd_prdt_ptr; 174 175 dma_addr_t utrd_dma_addr; 176 dma_addr_t ucd_req_dma_addr; 177 dma_addr_t ucd_rsp_dma_addr; 178 dma_addr_t ucd_prdt_dma_addr; 179 180 struct scsi_cmnd *cmd; 181 int scsi_status; 182 183 int command_type; 184 int task_tag; 185 u8 lun; /* UPIU LUN id field is only 8-bit wide */ 186 bool intr_cmd; 187 ktime_t issue_time_stamp; 188 ktime_t compl_time_stamp; 189 #ifdef CONFIG_SCSI_UFS_CRYPTO 190 int crypto_key_slot; 191 u64 data_unit_num; 192 #endif 193 194 bool req_abort_skip; 195 }; 196 197 /** 198 * struct ufs_query - holds relevant data structures for query request 199 * @request: request upiu and function 200 * @descriptor: buffer for sending/receiving descriptor 201 * @response: response upiu and response 202 */ 203 struct ufs_query { 204 struct ufs_query_req request; 205 u8 *descriptor; 206 struct ufs_query_res response; 207 }; 208 209 /** 210 * struct ufs_dev_cmd - all assosiated fields with device management commands 211 * @type: device management command type - Query, NOP OUT 212 * @lock: lock to allow one command at a time 213 * @complete: internal commands completion 214 * @query: Device management query information 215 */ 216 struct ufs_dev_cmd { 217 enum dev_cmd_type type; 218 struct mutex lock; 219 struct completion *complete; 220 struct ufs_query query; 221 }; 222 223 /** 224 * struct ufs_clk_info - UFS clock related info 225 * @list: list headed by hba->clk_list_head 226 * @clk: clock node 227 * @name: clock name 228 * @max_freq: maximum frequency supported by the clock 229 * @min_freq: min frequency that can be used for clock scaling 230 * @curr_freq: indicates the current frequency that it is set to 231 * @keep_link_active: indicates that the clk should not be disabled if 232 * link is active 233 * @enabled: variable to check against multiple enable/disable 234 */ 235 struct ufs_clk_info { 236 struct list_head list; 237 struct clk *clk; 238 const char *name; 239 u32 max_freq; 240 u32 min_freq; 241 u32 curr_freq; 242 bool keep_link_active; 243 bool enabled; 244 }; 245 246 enum ufs_notify_change_status { 247 PRE_CHANGE, 248 POST_CHANGE, 249 }; 250 251 struct ufs_pa_layer_attr { 252 u32 gear_rx; 253 u32 gear_tx; 254 u32 lane_rx; 255 u32 lane_tx; 256 u32 pwr_rx; 257 u32 pwr_tx; 258 u32 hs_rate; 259 }; 260 261 struct ufs_pwr_mode_info { 262 bool is_valid; 263 struct ufs_pa_layer_attr info; 264 }; 265 266 /** 267 * struct ufs_hba_variant_ops - variant specific callbacks 268 * @name: variant name 269 * @init: called when the driver is initialized 270 * @exit: called to cleanup everything done in init 271 * @get_ufs_hci_version: called to get UFS HCI version 272 * @clk_scale_notify: notifies that clks are scaled up/down 273 * @setup_clocks: called before touching any of the controller registers 274 * @hce_enable_notify: called before and after HCE enable bit is set to allow 275 * variant specific Uni-Pro initialization. 276 * @link_startup_notify: called before and after Link startup is carried out 277 * to allow variant specific Uni-Pro initialization. 278 * @pwr_change_notify: called before and after a power mode change 279 * is carried out to allow vendor spesific capabilities 280 * to be set. 281 * @setup_xfer_req: called before any transfer request is issued 282 * to set some things 283 * @setup_task_mgmt: called before any task management request is issued 284 * to set some things 285 * @hibern8_notify: called around hibern8 enter/exit 286 * @apply_dev_quirks: called to apply device specific quirks 287 * @fixup_dev_quirks: called to modify device specific quirks 288 * @suspend: called during host controller PM callback 289 * @resume: called during host controller PM callback 290 * @dbg_register_dump: used to dump controller debug information 291 * @phy_initialization: used to initialize phys 292 * @device_reset: called to issue a reset pulse on the UFS device 293 * @config_scaling_param: called to configure clock scaling parameters 294 * @program_key: program or evict an inline encryption key 295 * @event_notify: called to notify important events 296 */ 297 struct ufs_hba_variant_ops { 298 const char *name; 299 int (*init)(struct ufs_hba *); 300 void (*exit)(struct ufs_hba *); 301 u32 (*get_ufs_hci_version)(struct ufs_hba *); 302 int (*clk_scale_notify)(struct ufs_hba *, bool, 303 enum ufs_notify_change_status); 304 int (*setup_clocks)(struct ufs_hba *, bool, 305 enum ufs_notify_change_status); 306 int (*hce_enable_notify)(struct ufs_hba *, 307 enum ufs_notify_change_status); 308 int (*link_startup_notify)(struct ufs_hba *, 309 enum ufs_notify_change_status); 310 int (*pwr_change_notify)(struct ufs_hba *, 311 enum ufs_notify_change_status status, 312 struct ufs_pa_layer_attr *, 313 struct ufs_pa_layer_attr *); 314 void (*setup_xfer_req)(struct ufs_hba *hba, int tag, 315 bool is_scsi_cmd); 316 void (*setup_task_mgmt)(struct ufs_hba *, int, u8); 317 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme, 318 enum ufs_notify_change_status); 319 int (*apply_dev_quirks)(struct ufs_hba *hba); 320 void (*fixup_dev_quirks)(struct ufs_hba *hba); 321 int (*suspend)(struct ufs_hba *, enum ufs_pm_op, 322 enum ufs_notify_change_status); 323 int (*resume)(struct ufs_hba *, enum ufs_pm_op); 324 void (*dbg_register_dump)(struct ufs_hba *hba); 325 int (*phy_initialization)(struct ufs_hba *); 326 int (*device_reset)(struct ufs_hba *hba); 327 void (*config_scaling_param)(struct ufs_hba *hba, 328 struct devfreq_dev_profile *profile, 329 struct devfreq_simple_ondemand_data *data); 330 int (*program_key)(struct ufs_hba *hba, 331 const union ufs_crypto_cfg_entry *cfg, int slot); 332 void (*event_notify)(struct ufs_hba *hba, 333 enum ufs_event_type evt, void *data); 334 }; 335 336 /* clock gating state */ 337 enum clk_gating_state { 338 CLKS_OFF, 339 CLKS_ON, 340 REQ_CLKS_OFF, 341 REQ_CLKS_ON, 342 }; 343 344 /** 345 * struct ufs_clk_gating - UFS clock gating related info 346 * @gate_work: worker to turn off clocks after some delay as specified in 347 * delay_ms 348 * @ungate_work: worker to turn on clocks that will be used in case of 349 * interrupt context 350 * @state: the current clocks state 351 * @delay_ms: gating delay in ms 352 * @is_suspended: clk gating is suspended when set to 1 which can be used 353 * during suspend/resume 354 * @delay_attr: sysfs attribute to control delay_attr 355 * @enable_attr: sysfs attribute to enable/disable clock gating 356 * @is_enabled: Indicates the current status of clock gating 357 * @is_initialized: Indicates whether clock gating is initialized or not 358 * @active_reqs: number of requests that are pending and should be waited for 359 * completion before gating clocks. 360 * @clk_gating_workq: workqueue for clock gating work. 361 */ 362 struct ufs_clk_gating { 363 struct delayed_work gate_work; 364 struct work_struct ungate_work; 365 enum clk_gating_state state; 366 unsigned long delay_ms; 367 bool is_suspended; 368 struct device_attribute delay_attr; 369 struct device_attribute enable_attr; 370 bool is_enabled; 371 bool is_initialized; 372 int active_reqs; 373 struct workqueue_struct *clk_gating_workq; 374 }; 375 376 struct ufs_saved_pwr_info { 377 struct ufs_pa_layer_attr info; 378 bool is_valid; 379 }; 380 381 /** 382 * struct ufs_clk_scaling - UFS clock scaling related data 383 * @active_reqs: number of requests that are pending. If this is zero when 384 * devfreq ->target() function is called then schedule "suspend_work" to 385 * suspend devfreq. 386 * @tot_busy_t: Total busy time in current polling window 387 * @window_start_t: Start time (in jiffies) of the current polling window 388 * @busy_start_t: Start time of current busy period 389 * @enable_attr: sysfs attribute to enable/disable clock scaling 390 * @saved_pwr_info: UFS power mode may also be changed during scaling and this 391 * one keeps track of previous power mode. 392 * @workq: workqueue to schedule devfreq suspend/resume work 393 * @suspend_work: worker to suspend devfreq 394 * @resume_work: worker to resume devfreq 395 * @min_gear: lowest HS gear to scale down to 396 * @is_enabled: tracks if scaling is currently enabled or not, controlled by 397 * clkscale_enable sysfs node 398 * @is_allowed: tracks if scaling is currently allowed or not, used to block 399 * clock scaling which is not invoked from devfreq governor 400 * @is_initialized: Indicates whether clock scaling is initialized or not 401 * @is_busy_started: tracks if busy period has started or not 402 * @is_suspended: tracks if devfreq is suspended or not 403 */ 404 struct ufs_clk_scaling { 405 int active_reqs; 406 unsigned long tot_busy_t; 407 ktime_t window_start_t; 408 ktime_t busy_start_t; 409 struct device_attribute enable_attr; 410 struct ufs_saved_pwr_info saved_pwr_info; 411 struct workqueue_struct *workq; 412 struct work_struct suspend_work; 413 struct work_struct resume_work; 414 u32 min_gear; 415 bool is_enabled; 416 bool is_allowed; 417 bool is_initialized; 418 bool is_busy_started; 419 bool is_suspended; 420 }; 421 422 #define UFS_EVENT_HIST_LENGTH 8 423 /** 424 * struct ufs_event_hist - keeps history of errors 425 * @pos: index to indicate cyclic buffer position 426 * @val: cyclic buffer for registers value 427 * @tstamp: cyclic buffer for time stamp 428 * @cnt: error counter 429 */ 430 struct ufs_event_hist { 431 int pos; 432 u32 val[UFS_EVENT_HIST_LENGTH]; 433 ktime_t tstamp[UFS_EVENT_HIST_LENGTH]; 434 unsigned long long cnt; 435 }; 436 437 /** 438 * struct ufs_stats - keeps usage/err statistics 439 * @last_intr_status: record the last interrupt status. 440 * @last_intr_ts: record the last interrupt timestamp. 441 * @hibern8_exit_cnt: Counter to keep track of number of exits, 442 * reset this after link-startup. 443 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit. 444 * Clear after the first successful command completion. 445 * @event: array with event history. 446 */ 447 struct ufs_stats { 448 u32 last_intr_status; 449 ktime_t last_intr_ts; 450 451 u32 hibern8_exit_cnt; 452 ktime_t last_hibern8_exit_tstamp; 453 struct ufs_event_hist event[UFS_EVT_CNT]; 454 }; 455 456 /** 457 * enum ufshcd_state - UFS host controller state 458 * @UFSHCD_STATE_RESET: Link is not operational. Postpone SCSI command 459 * processing. 460 * @UFSHCD_STATE_OPERATIONAL: The host controller is operational and can process 461 * SCSI commands. 462 * @UFSHCD_STATE_EH_SCHEDULED_NON_FATAL: The error handler has been scheduled. 463 * SCSI commands may be submitted to the controller. 464 * @UFSHCD_STATE_EH_SCHEDULED_FATAL: The error handler has been scheduled. Fail 465 * newly submitted SCSI commands with error code DID_BAD_TARGET. 466 * @UFSHCD_STATE_ERROR: An unrecoverable error occurred, e.g. link recovery 467 * failed. Fail all SCSI commands with error code DID_ERROR. 468 */ 469 enum ufshcd_state { 470 UFSHCD_STATE_RESET, 471 UFSHCD_STATE_OPERATIONAL, 472 UFSHCD_STATE_EH_SCHEDULED_NON_FATAL, 473 UFSHCD_STATE_EH_SCHEDULED_FATAL, 474 UFSHCD_STATE_ERROR, 475 }; 476 477 enum ufshcd_quirks { 478 /* Interrupt aggregation support is broken */ 479 UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0, 480 481 /* 482 * delay before each dme command is required as the unipro 483 * layer has shown instabilities 484 */ 485 UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1, 486 487 /* 488 * If UFS host controller is having issue in processing LCC (Line 489 * Control Command) coming from device then enable this quirk. 490 * When this quirk is enabled, host controller driver should disable 491 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE 492 * attribute of device to 0). 493 */ 494 UFSHCD_QUIRK_BROKEN_LCC = 1 << 2, 495 496 /* 497 * The attribute PA_RXHSUNTERMCAP specifies whether or not the 498 * inbound Link supports unterminated line in HS mode. Setting this 499 * attribute to 1 fixes moving to HS gear. 500 */ 501 UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3, 502 503 /* 504 * This quirk needs to be enabled if the host controller only allows 505 * accessing the peer dme attributes in AUTO mode (FAST AUTO or 506 * SLOW AUTO). 507 */ 508 UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4, 509 510 /* 511 * This quirk needs to be enabled if the host controller doesn't 512 * advertise the correct version in UFS_VER register. If this quirk 513 * is enabled, standard UFS host driver will call the vendor specific 514 * ops (get_ufs_hci_version) to get the correct version. 515 */ 516 UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5, 517 518 /* 519 * Clear handling for transfer/task request list is just opposite. 520 */ 521 UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6, 522 523 /* 524 * This quirk needs to be enabled if host controller doesn't allow 525 * that the interrupt aggregation timer and counter are reset by s/w. 526 */ 527 UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7, 528 529 /* 530 * This quirks needs to be enabled if host controller cannot be 531 * enabled via HCE register. 532 */ 533 UFSHCI_QUIRK_BROKEN_HCE = 1 << 8, 534 535 /* 536 * This quirk needs to be enabled if the host controller regards 537 * resolution of the values of PRDTO and PRDTL in UTRD as byte. 538 */ 539 UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9, 540 541 /* 542 * This quirk needs to be enabled if the host controller reports 543 * OCS FATAL ERROR with device error through sense data 544 */ 545 UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10, 546 547 /* 548 * This quirk needs to be enabled if the host controller has 549 * auto-hibernate capability but it doesn't work. 550 */ 551 UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11, 552 553 /* 554 * This quirk needs to disable manual flush for write booster 555 */ 556 UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12, 557 558 /* 559 * This quirk needs to disable unipro timeout values 560 * before power mode change 561 */ 562 UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13, 563 564 /* 565 * This quirk allows only sg entries aligned with page size. 566 */ 567 UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE = 1 << 14, 568 569 /* 570 * This quirk needs to be enabled if the host controller does not 571 * support UIC command 572 */ 573 UFSHCD_QUIRK_BROKEN_UIC_CMD = 1 << 15, 574 575 /* 576 * This quirk needs to be enabled if the host controller cannot 577 * support physical host configuration. 578 */ 579 UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16, 580 }; 581 582 enum ufshcd_caps { 583 /* Allow dynamic clk gating */ 584 UFSHCD_CAP_CLK_GATING = 1 << 0, 585 586 /* Allow hiberb8 with clk gating */ 587 UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1, 588 589 /* Allow dynamic clk scaling */ 590 UFSHCD_CAP_CLK_SCALING = 1 << 2, 591 592 /* Allow auto bkops to enabled during runtime suspend */ 593 UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3, 594 595 /* 596 * This capability allows host controller driver to use the UFS HCI's 597 * interrupt aggregation capability. 598 * CAUTION: Enabling this might reduce overall UFS throughput. 599 */ 600 UFSHCD_CAP_INTR_AGGR = 1 << 4, 601 602 /* 603 * This capability allows the device auto-bkops to be always enabled 604 * except during suspend (both runtime and suspend). 605 * Enabling this capability means that device will always be allowed 606 * to do background operation when it's active but it might degrade 607 * the performance of ongoing read/write operations. 608 */ 609 UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5, 610 611 /* 612 * This capability allows host controller driver to automatically 613 * enable runtime power management by itself instead of waiting 614 * for userspace to control the power management. 615 */ 616 UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6, 617 618 /* 619 * This capability allows the host controller driver to turn-on 620 * WriteBooster, if the underlying device supports it and is 621 * provisioned to be used. This would increase the write performance. 622 */ 623 UFSHCD_CAP_WB_EN = 1 << 7, 624 625 /* 626 * This capability allows the host controller driver to use the 627 * inline crypto engine, if it is present 628 */ 629 UFSHCD_CAP_CRYPTO = 1 << 8, 630 631 /* 632 * This capability allows the controller regulators to be put into 633 * lpm mode aggressively during clock gating. 634 * This would increase power savings. 635 */ 636 UFSHCD_CAP_AGGR_POWER_COLLAPSE = 1 << 9, 637 638 /* 639 * This capability allows the host controller driver to use DeepSleep, 640 * if it is supported by the UFS device. The host controller driver must 641 * support device hardware reset via the hba->device_reset() callback, 642 * in order to exit DeepSleep state. 643 */ 644 UFSHCD_CAP_DEEPSLEEP = 1 << 10, 645 646 /* 647 * This capability allows the host controller driver to use temperature 648 * notification if it is supported by the UFS device. 649 */ 650 UFSHCD_CAP_TEMP_NOTIF = 1 << 11, 651 }; 652 653 struct ufs_hba_variant_params { 654 struct devfreq_dev_profile devfreq_profile; 655 struct devfreq_simple_ondemand_data ondemand_data; 656 u16 hba_enable_delay_us; 657 u32 wb_flush_threshold; 658 }; 659 660 #ifdef CONFIG_SCSI_UFS_HPB 661 /** 662 * struct ufshpb_dev_info - UFSHPB device related info 663 * @num_lu: the number of user logical unit to check whether all lu finished 664 * initialization 665 * @rgn_size: device reported HPB region size 666 * @srgn_size: device reported HPB sub-region size 667 * @slave_conf_cnt: counter to check all lu finished initialization 668 * @hpb_disabled: flag to check if HPB is disabled 669 * @max_hpb_single_cmd: device reported bMAX_DATA_SIZE_FOR_SINGLE_CMD value 670 * @is_legacy: flag to check HPB 1.0 671 * @control_mode: either host or device 672 */ 673 struct ufshpb_dev_info { 674 int num_lu; 675 int rgn_size; 676 int srgn_size; 677 atomic_t slave_conf_cnt; 678 bool hpb_disabled; 679 u8 max_hpb_single_cmd; 680 bool is_legacy; 681 u8 control_mode; 682 }; 683 #endif 684 685 struct ufs_hba_monitor { 686 unsigned long chunk_size; 687 688 unsigned long nr_sec_rw[2]; 689 ktime_t total_busy[2]; 690 691 unsigned long nr_req[2]; 692 /* latencies*/ 693 ktime_t lat_sum[2]; 694 ktime_t lat_max[2]; 695 ktime_t lat_min[2]; 696 697 u32 nr_queued[2]; 698 ktime_t busy_start_ts[2]; 699 700 ktime_t enabled_ts; 701 bool enabled; 702 }; 703 704 /** 705 * struct ufs_hba - per adapter private structure 706 * @mmio_base: UFSHCI base register address 707 * @ucdl_base_addr: UFS Command Descriptor base address 708 * @utrdl_base_addr: UTP Transfer Request Descriptor base address 709 * @utmrdl_base_addr: UTP Task Management Descriptor base address 710 * @ucdl_dma_addr: UFS Command Descriptor DMA address 711 * @utrdl_dma_addr: UTRDL DMA address 712 * @utmrdl_dma_addr: UTMRDL DMA address 713 * @host: Scsi_Host instance of the driver 714 * @dev: device handle 715 * @ufs_device_wlun: WLUN that controls the entire UFS device. 716 * @hwmon_device: device instance registered with the hwmon core. 717 * @curr_dev_pwr_mode: active UFS device power mode. 718 * @uic_link_state: active state of the link to the UFS device. 719 * @rpm_lvl: desired UFS power management level during runtime PM. 720 * @spm_lvl: desired UFS power management level during system PM. 721 * @pm_op_in_progress: whether or not a PM operation is in progress. 722 * @ahit: value of Auto-Hibernate Idle Timer register. 723 * @lrb: local reference block 724 * @outstanding_tasks: Bits representing outstanding task requests 725 * @outstanding_lock: Protects @outstanding_reqs. 726 * @outstanding_reqs: Bits representing outstanding transfer requests 727 * @capabilities: UFS Controller Capabilities 728 * @nutrs: Transfer Request Queue depth supported by controller 729 * @nutmrs: Task Management Queue depth supported by controller 730 * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock. 731 * @ufs_version: UFS Version to which controller complies 732 * @vops: pointer to variant specific operations 733 * @vps: pointer to variant specific parameters 734 * @priv: pointer to variant specific private data 735 * @irq: Irq number of the controller 736 * @is_irq_enabled: whether or not the UFS controller interrupt is enabled. 737 * @dev_ref_clk_freq: reference clock frequency 738 * @quirks: bitmask with information about deviations from the UFSHCI standard. 739 * @dev_quirks: bitmask with information about deviations from the UFS standard. 740 * @tmf_tag_set: TMF tag set. 741 * @tmf_queue: Used to allocate TMF tags. 742 * @tmf_rqs: array with pointers to TMF requests while these are in progress. 743 * @active_uic_cmd: handle of active UIC command 744 * @uic_cmd_mutex: mutex for UIC command 745 * @uic_async_done: completion used during UIC processing 746 * @ufshcd_state: UFSHCD state 747 * @eh_flags: Error handling flags 748 * @intr_mask: Interrupt Mask Bits 749 * @ee_ctrl_mask: Exception event control mask 750 * @ee_drv_mask: Exception event mask for driver 751 * @ee_usr_mask: Exception event mask for user (set via debugfs) 752 * @ee_ctrl_mutex: Used to serialize exception event information. 753 * @is_powered: flag to check if HBA is powered 754 * @shutting_down: flag to check if shutdown has been invoked 755 * @host_sem: semaphore used to serialize concurrent contexts 756 * @eh_wq: Workqueue that eh_work works on 757 * @eh_work: Worker to handle UFS errors that require s/w attention 758 * @eeh_work: Worker to handle exception events 759 * @errors: HBA errors 760 * @uic_error: UFS interconnect layer error status 761 * @saved_err: sticky error mask 762 * @saved_uic_err: sticky UIC error mask 763 * @ufs_stats: various error counters 764 * @force_reset: flag to force eh_work perform a full reset 765 * @force_pmc: flag to force a power mode change 766 * @silence_err_logs: flag to silence error logs 767 * @dev_cmd: ufs device management command information 768 * @last_dme_cmd_tstamp: time stamp of the last completed DME command 769 * @nop_out_timeout: NOP OUT timeout value 770 * @dev_info: information about the UFS device 771 * @auto_bkops_enabled: to track whether bkops is enabled in device 772 * @vreg_info: UFS device voltage regulator information 773 * @clk_list_head: UFS host controller clocks list node head 774 * @req_abort_count: number of times ufshcd_abort() has been called 775 * @lanes_per_direction: number of lanes per data direction between the UFS 776 * controller and the UFS device. 777 * @pwr_info: holds current power mode 778 * @max_pwr_info: keeps the device max valid pwm 779 * @clk_gating: information related to clock gating 780 * @caps: bitmask with information about UFS controller capabilities 781 * @devfreq: frequency scaling information owned by the devfreq core 782 * @clk_scaling: frequency scaling information owned by the UFS driver 783 * @is_sys_suspended: whether or not the entire system has been suspended 784 * @urgent_bkops_lvl: keeps track of urgent bkops level for device 785 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for 786 * device is known or not. 787 * @clk_scaling_lock: used to serialize device commands and clock scaling 788 * @desc_size: descriptor sizes reported by device 789 * @scsi_block_reqs_cnt: reference counting for scsi block requests 790 * @bsg_dev: struct device associated with the BSG queue 791 * @bsg_queue: BSG queue associated with the UFS controller 792 * @rpm_dev_flush_recheck_work: used to suspend from RPM (runtime power 793 * management) after the UFS device has finished a WriteBooster buffer 794 * flush or auto BKOP. 795 * @ufshpb_dev: information related to HPB (Host Performance Booster). 796 * @monitor: statistics about UFS commands 797 * @crypto_capabilities: Content of crypto capabilities register (0x100) 798 * @crypto_cap_array: Array of crypto capabilities 799 * @crypto_cfg_register: Start of the crypto cfg array 800 * @crypto_profile: the crypto profile of this hba (if applicable) 801 * @debugfs_root: UFS controller debugfs root directory 802 * @debugfs_ee_work: used to restore ee_ctrl_mask after a delay 803 * @debugfs_ee_rate_limit_ms: user configurable delay after which to restore 804 * ee_ctrl_mask 805 * @luns_avail: number of regular and well known LUNs supported by the UFS 806 * device 807 * @complete_put: whether or not to call ufshcd_rpm_put() from inside 808 * ufshcd_resume_complete() 809 */ 810 struct ufs_hba { 811 void __iomem *mmio_base; 812 813 /* Virtual memory reference */ 814 struct utp_transfer_cmd_desc *ucdl_base_addr; 815 struct utp_transfer_req_desc *utrdl_base_addr; 816 struct utp_task_req_desc *utmrdl_base_addr; 817 818 /* DMA memory reference */ 819 dma_addr_t ucdl_dma_addr; 820 dma_addr_t utrdl_dma_addr; 821 dma_addr_t utmrdl_dma_addr; 822 823 struct Scsi_Host *host; 824 struct device *dev; 825 struct scsi_device *ufs_device_wlun; 826 827 #ifdef CONFIG_SCSI_UFS_HWMON 828 struct device *hwmon_device; 829 #endif 830 831 enum ufs_dev_pwr_mode curr_dev_pwr_mode; 832 enum uic_link_state uic_link_state; 833 /* Desired UFS power management level during runtime PM */ 834 enum ufs_pm_level rpm_lvl; 835 /* Desired UFS power management level during system PM */ 836 enum ufs_pm_level spm_lvl; 837 int pm_op_in_progress; 838 839 /* Auto-Hibernate Idle Timer register value */ 840 u32 ahit; 841 842 struct ufshcd_lrb *lrb; 843 844 unsigned long outstanding_tasks; 845 spinlock_t outstanding_lock; 846 unsigned long outstanding_reqs; 847 848 u32 capabilities; 849 int nutrs; 850 int nutmrs; 851 u32 reserved_slot; 852 u32 ufs_version; 853 const struct ufs_hba_variant_ops *vops; 854 struct ufs_hba_variant_params *vps; 855 void *priv; 856 unsigned int irq; 857 bool is_irq_enabled; 858 enum ufs_ref_clk_freq dev_ref_clk_freq; 859 860 unsigned int quirks; /* Deviations from standard UFSHCI spec. */ 861 862 /* Device deviations from standard UFS device spec. */ 863 unsigned int dev_quirks; 864 865 struct blk_mq_tag_set tmf_tag_set; 866 struct request_queue *tmf_queue; 867 struct request **tmf_rqs; 868 869 struct uic_command *active_uic_cmd; 870 struct mutex uic_cmd_mutex; 871 struct completion *uic_async_done; 872 873 enum ufshcd_state ufshcd_state; 874 u32 eh_flags; 875 u32 intr_mask; 876 u16 ee_ctrl_mask; 877 u16 ee_drv_mask; 878 u16 ee_usr_mask; 879 struct mutex ee_ctrl_mutex; 880 bool is_powered; 881 bool shutting_down; 882 struct semaphore host_sem; 883 884 /* Work Queues */ 885 struct workqueue_struct *eh_wq; 886 struct work_struct eh_work; 887 struct work_struct eeh_work; 888 889 /* HBA Errors */ 890 u32 errors; 891 u32 uic_error; 892 u32 saved_err; 893 u32 saved_uic_err; 894 struct ufs_stats ufs_stats; 895 bool force_reset; 896 bool force_pmc; 897 bool silence_err_logs; 898 899 /* Device management request data */ 900 struct ufs_dev_cmd dev_cmd; 901 ktime_t last_dme_cmd_tstamp; 902 int nop_out_timeout; 903 904 /* Keeps information of the UFS device connected to this host */ 905 struct ufs_dev_info dev_info; 906 bool auto_bkops_enabled; 907 struct ufs_vreg_info vreg_info; 908 struct list_head clk_list_head; 909 910 /* Number of requests aborts */ 911 int req_abort_count; 912 913 /* Number of lanes available (1 or 2) for Rx/Tx */ 914 u32 lanes_per_direction; 915 struct ufs_pa_layer_attr pwr_info; 916 struct ufs_pwr_mode_info max_pwr_info; 917 918 struct ufs_clk_gating clk_gating; 919 /* Control to enable/disable host capabilities */ 920 u32 caps; 921 922 struct devfreq *devfreq; 923 struct ufs_clk_scaling clk_scaling; 924 bool is_sys_suspended; 925 926 enum bkops_status urgent_bkops_lvl; 927 bool is_urgent_bkops_lvl_checked; 928 929 struct rw_semaphore clk_scaling_lock; 930 unsigned char desc_size[QUERY_DESC_IDN_MAX]; 931 atomic_t scsi_block_reqs_cnt; 932 933 struct device bsg_dev; 934 struct request_queue *bsg_queue; 935 struct delayed_work rpm_dev_flush_recheck_work; 936 937 #ifdef CONFIG_SCSI_UFS_HPB 938 struct ufshpb_dev_info ufshpb_dev; 939 #endif 940 941 struct ufs_hba_monitor monitor; 942 943 #ifdef CONFIG_SCSI_UFS_CRYPTO 944 union ufs_crypto_capabilities crypto_capabilities; 945 union ufs_crypto_cap_entry *crypto_cap_array; 946 u32 crypto_cfg_register; 947 struct blk_crypto_profile crypto_profile; 948 #endif 949 #ifdef CONFIG_DEBUG_FS 950 struct dentry *debugfs_root; 951 struct delayed_work debugfs_ee_work; 952 u32 debugfs_ee_rate_limit_ms; 953 #endif 954 u32 luns_avail; 955 bool complete_put; 956 }; 957 958 /* Returns true if clocks can be gated. Otherwise false */ 959 static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba) 960 { 961 return hba->caps & UFSHCD_CAP_CLK_GATING; 962 } 963 static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba) 964 { 965 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING; 966 } 967 static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba) 968 { 969 return hba->caps & UFSHCD_CAP_CLK_SCALING; 970 } 971 static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba) 972 { 973 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND; 974 } 975 static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba) 976 { 977 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND; 978 } 979 980 static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba) 981 { 982 return (hba->caps & UFSHCD_CAP_INTR_AGGR) && 983 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR); 984 } 985 986 static inline bool ufshcd_can_aggressive_pc(struct ufs_hba *hba) 987 { 988 return !!(ufshcd_is_link_hibern8(hba) && 989 (hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE)); 990 } 991 992 static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba) 993 { 994 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) && 995 !(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8); 996 } 997 998 static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba) 999 { 1000 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit); 1001 } 1002 1003 static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba) 1004 { 1005 return hba->caps & UFSHCD_CAP_WB_EN; 1006 } 1007 1008 #define ufshcd_writel(hba, val, reg) \ 1009 writel((val), (hba)->mmio_base + (reg)) 1010 #define ufshcd_readl(hba, reg) \ 1011 readl((hba)->mmio_base + (reg)) 1012 1013 /** 1014 * ufshcd_rmwl - perform read/modify/write for a controller register 1015 * @hba: per adapter instance 1016 * @mask: mask to apply on read value 1017 * @val: actual value to write 1018 * @reg: register address 1019 */ 1020 static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg) 1021 { 1022 u32 tmp; 1023 1024 tmp = ufshcd_readl(hba, reg); 1025 tmp &= ~mask; 1026 tmp |= (val & mask); 1027 ufshcd_writel(hba, tmp, reg); 1028 } 1029 1030 int ufshcd_alloc_host(struct device *, struct ufs_hba **); 1031 void ufshcd_dealloc_host(struct ufs_hba *); 1032 int ufshcd_hba_enable(struct ufs_hba *hba); 1033 int ufshcd_init(struct ufs_hba *, void __iomem *, unsigned int); 1034 int ufshcd_link_recovery(struct ufs_hba *hba); 1035 int ufshcd_make_hba_operational(struct ufs_hba *hba); 1036 void ufshcd_remove(struct ufs_hba *); 1037 int ufshcd_uic_hibern8_enter(struct ufs_hba *hba); 1038 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba); 1039 void ufshcd_delay_us(unsigned long us, unsigned long tolerance); 1040 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk); 1041 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val); 1042 void ufshcd_hba_stop(struct ufs_hba *hba); 1043 void ufshcd_schedule_eh_work(struct ufs_hba *hba); 1044 1045 static inline void check_upiu_size(void) 1046 { 1047 BUILD_BUG_ON(ALIGNED_UPIU_SIZE < 1048 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE); 1049 } 1050 1051 /** 1052 * ufshcd_set_variant - set variant specific data to the hba 1053 * @hba: per adapter instance 1054 * @variant: pointer to variant specific data 1055 */ 1056 static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant) 1057 { 1058 BUG_ON(!hba); 1059 hba->priv = variant; 1060 } 1061 1062 /** 1063 * ufshcd_get_variant - get variant specific data from the hba 1064 * @hba: per adapter instance 1065 */ 1066 static inline void *ufshcd_get_variant(struct ufs_hba *hba) 1067 { 1068 BUG_ON(!hba); 1069 return hba->priv; 1070 } 1071 1072 #ifdef CONFIG_PM 1073 extern int ufshcd_runtime_suspend(struct device *dev); 1074 extern int ufshcd_runtime_resume(struct device *dev); 1075 #endif 1076 #ifdef CONFIG_PM_SLEEP 1077 extern int ufshcd_system_suspend(struct device *dev); 1078 extern int ufshcd_system_resume(struct device *dev); 1079 #endif 1080 extern int ufshcd_shutdown(struct ufs_hba *hba); 1081 extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba, 1082 int agreed_gear, 1083 int adapt_val); 1084 extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel, 1085 u8 attr_set, u32 mib_val, u8 peer); 1086 extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel, 1087 u32 *mib_val, u8 peer); 1088 extern int ufshcd_config_pwr_mode(struct ufs_hba *hba, 1089 struct ufs_pa_layer_attr *desired_pwr_mode); 1090 1091 /* UIC command interfaces for DME primitives */ 1092 #define DME_LOCAL 0 1093 #define DME_PEER 1 1094 #define ATTR_SET_NOR 0 /* NORMAL */ 1095 #define ATTR_SET_ST 1 /* STATIC */ 1096 1097 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel, 1098 u32 mib_val) 1099 { 1100 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR, 1101 mib_val, DME_LOCAL); 1102 } 1103 1104 static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel, 1105 u32 mib_val) 1106 { 1107 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST, 1108 mib_val, DME_LOCAL); 1109 } 1110 1111 static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel, 1112 u32 mib_val) 1113 { 1114 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR, 1115 mib_val, DME_PEER); 1116 } 1117 1118 static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel, 1119 u32 mib_val) 1120 { 1121 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST, 1122 mib_val, DME_PEER); 1123 } 1124 1125 static inline int ufshcd_dme_get(struct ufs_hba *hba, 1126 u32 attr_sel, u32 *mib_val) 1127 { 1128 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL); 1129 } 1130 1131 static inline int ufshcd_dme_peer_get(struct ufs_hba *hba, 1132 u32 attr_sel, u32 *mib_val) 1133 { 1134 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER); 1135 } 1136 1137 static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info) 1138 { 1139 return (pwr_info->pwr_rx == FAST_MODE || 1140 pwr_info->pwr_rx == FASTAUTO_MODE) && 1141 (pwr_info->pwr_tx == FAST_MODE || 1142 pwr_info->pwr_tx == FASTAUTO_MODE); 1143 } 1144 1145 static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba) 1146 { 1147 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); 1148 } 1149 1150 /* Expose Query-Request API */ 1151 int ufshcd_query_descriptor_retry(struct ufs_hba *hba, 1152 enum query_opcode opcode, 1153 enum desc_idn idn, u8 index, 1154 u8 selector, 1155 u8 *desc_buf, int *buf_len); 1156 int ufshcd_read_desc_param(struct ufs_hba *hba, 1157 enum desc_idn desc_id, 1158 int desc_index, 1159 u8 param_offset, 1160 u8 *param_read_buf, 1161 u8 param_size); 1162 int ufshcd_query_attr_retry(struct ufs_hba *hba, enum query_opcode opcode, 1163 enum attr_idn idn, u8 index, u8 selector, 1164 u32 *attr_val); 1165 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode, 1166 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val); 1167 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode, 1168 enum flag_idn idn, u8 index, bool *flag_res); 1169 1170 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba); 1171 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit); 1172 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, 1173 const struct ufs_dev_quirk *fixups); 1174 #define SD_ASCII_STD true 1175 #define SD_RAW false 1176 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index, 1177 u8 **buf, bool ascii); 1178 1179 int ufshcd_hold(struct ufs_hba *hba, bool async); 1180 void ufshcd_release(struct ufs_hba *hba); 1181 1182 void ufshcd_clkgate_delay_set(struct device *dev, unsigned long value); 1183 1184 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id, 1185 int *desc_length); 1186 1187 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba); 1188 1189 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd); 1190 1191 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba, 1192 struct utp_upiu_req *req_upiu, 1193 struct utp_upiu_req *rsp_upiu, 1194 int msgcode, 1195 u8 *desc_buff, int *buff_len, 1196 enum query_opcode desc_op); 1197 1198 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable); 1199 int ufshcd_suspend_prepare(struct device *dev); 1200 int __ufshcd_suspend_prepare(struct device *dev, bool rpm_ok_for_spm); 1201 void ufshcd_resume_complete(struct device *dev); 1202 1203 /* Wrapper functions for safely calling variant operations */ 1204 static inline int ufshcd_vops_init(struct ufs_hba *hba) 1205 { 1206 if (hba->vops && hba->vops->init) 1207 return hba->vops->init(hba); 1208 1209 return 0; 1210 } 1211 1212 static inline int ufshcd_vops_phy_initialization(struct ufs_hba *hba) 1213 { 1214 if (hba->vops && hba->vops->phy_initialization) 1215 return hba->vops->phy_initialization(hba); 1216 1217 return 0; 1218 } 1219 1220 extern struct ufs_pm_lvl_states ufs_pm_lvl_states[]; 1221 1222 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len, 1223 const char *prefix); 1224 1225 int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask); 1226 int ufshcd_write_ee_control(struct ufs_hba *hba); 1227 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask, 1228 u16 set, u16 clr); 1229 1230 #endif /* End of Header */ 1231