xref: /linux/include/ufs/ufs.h (revision 0678df8271820bcf8fb4f877129f05d68a237de4)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Universal Flash Storage Host controller driver
4  * Copyright (C) 2011-2013 Samsung India Software Operations
5  *
6  * Authors:
7  *	Santosh Yaraganavi <santosh.sy@samsung.com>
8  *	Vinayak Holikatti <h.vinayak@samsung.com>
9  */
10 
11 #ifndef _UFS_H
12 #define _UFS_H
13 
14 #include <linux/bitops.h>
15 #include <linux/types.h>
16 #include <uapi/scsi/scsi_bsg_ufs.h>
17 
18 /*
19  * Using static_assert() is not allowed in UAPI header files. Hence the check
20  * in this header file of the size of struct utp_upiu_header.
21  */
22 static_assert(sizeof(struct utp_upiu_header) == 12);
23 
24 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
25 #define QUERY_DESC_MAX_SIZE       255
26 #define QUERY_DESC_MIN_SIZE       2
27 #define QUERY_DESC_HDR_SIZE       2
28 #define QUERY_OSF_SIZE            (GENERAL_UPIU_REQUEST_SIZE - \
29 					(sizeof(struct utp_upiu_header)))
30 #define UFS_SENSE_SIZE	18
31 
32 /*
33  * UFS device may have standard LUs and LUN id could be from 0x00 to
34  * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
35  * UFS device may also have the Well Known LUs (also referred as W-LU)
36  * which again could be from 0x00 to 0x7F. For W-LUs, device only use
37  * the "Extended Addressing Format" which means the W-LUNs would be
38  * from 0xc100 (SCSI_W_LUN_BASE) onwards.
39  * This means max. LUN number reported from UFS device could be 0xC17F.
40  */
41 #define UFS_UPIU_MAX_UNIT_NUM_ID	0x7F
42 #define UFS_MAX_LUNS		(SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
43 #define UFS_UPIU_WLUN_ID	(1 << 7)
44 
45 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
46 #define UFS_UPIU_MAX_WB_LUN_ID	8
47 
48 /*
49  * WriteBooster buffer lifetime has a limit setted by vendor.
50  * If it is over the limit, WriteBooster feature will be disabled.
51  */
52 #define UFS_WB_EXCEED_LIFETIME		0x0B
53 
54 /*
55  * In UFS Spec, the Extra Header Segment (EHS) starts from byte 32 in UPIU request/response packet
56  */
57 #define EHS_OFFSET_IN_RESPONSE 32
58 
59 /* Well known logical unit id in LUN field of UPIU */
60 enum {
61 	UFS_UPIU_REPORT_LUNS_WLUN	= 0x81,
62 	UFS_UPIU_UFS_DEVICE_WLUN	= 0xD0,
63 	UFS_UPIU_BOOT_WLUN		= 0xB0,
64 	UFS_UPIU_RPMB_WLUN		= 0xC4,
65 };
66 
67 /*
68  * UFS Protocol Information Unit related definitions
69  */
70 
71 /* Task management functions */
72 enum {
73 	UFS_ABORT_TASK		= 0x01,
74 	UFS_ABORT_TASK_SET	= 0x02,
75 	UFS_CLEAR_TASK_SET	= 0x04,
76 	UFS_LOGICAL_RESET	= 0x08,
77 	UFS_QUERY_TASK		= 0x80,
78 	UFS_QUERY_TASK_SET	= 0x81,
79 };
80 
81 /* UTP UPIU Transaction Codes Initiator to Target */
82 enum upiu_request_transaction {
83 	UPIU_TRANSACTION_NOP_OUT	= 0x00,
84 	UPIU_TRANSACTION_COMMAND	= 0x01,
85 	UPIU_TRANSACTION_DATA_OUT	= 0x02,
86 	UPIU_TRANSACTION_TASK_REQ	= 0x04,
87 	UPIU_TRANSACTION_QUERY_REQ	= 0x16,
88 };
89 
90 /* UTP UPIU Transaction Codes Target to Initiator */
91 enum upiu_response_transaction {
92 	UPIU_TRANSACTION_NOP_IN		= 0x20,
93 	UPIU_TRANSACTION_RESPONSE	= 0x21,
94 	UPIU_TRANSACTION_DATA_IN	= 0x22,
95 	UPIU_TRANSACTION_TASK_RSP	= 0x24,
96 	UPIU_TRANSACTION_READY_XFER	= 0x31,
97 	UPIU_TRANSACTION_QUERY_RSP	= 0x36,
98 	UPIU_TRANSACTION_REJECT_UPIU	= 0x3F,
99 };
100 
101 /* UPIU Read/Write flags. See also table "UPIU Flags" in the UFS standard. */
102 enum {
103 	UPIU_CMD_FLAGS_NONE	= 0x00,
104 	UPIU_CMD_FLAGS_CP	= 0x04,
105 	UPIU_CMD_FLAGS_WRITE	= 0x20,
106 	UPIU_CMD_FLAGS_READ	= 0x40,
107 };
108 
109 /* UPIU response flags */
110 enum {
111 	UPIU_RSP_FLAG_UNDERFLOW	= 0x20,
112 	UPIU_RSP_FLAG_OVERFLOW	= 0x40,
113 };
114 
115 /* UPIU Task Attributes */
116 enum {
117 	UPIU_TASK_ATTR_SIMPLE	= 0x00,
118 	UPIU_TASK_ATTR_ORDERED	= 0x01,
119 	UPIU_TASK_ATTR_HEADQ	= 0x02,
120 	UPIU_TASK_ATTR_ACA	= 0x03,
121 };
122 
123 /* UPIU Query request function */
124 enum {
125 	UPIU_QUERY_FUNC_STANDARD_READ_REQUEST           = 0x01,
126 	UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST          = 0x81,
127 };
128 
129 /* Flag idn for Query Requests*/
130 enum flag_idn {
131 	QUERY_FLAG_IDN_FDEVICEINIT			= 0x01,
132 	QUERY_FLAG_IDN_PERMANENT_WPE			= 0x02,
133 	QUERY_FLAG_IDN_PWR_ON_WPE			= 0x03,
134 	QUERY_FLAG_IDN_BKOPS_EN				= 0x04,
135 	QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE		= 0x05,
136 	QUERY_FLAG_IDN_PURGE_ENABLE			= 0x06,
137 	QUERY_FLAG_IDN_RESERVED2			= 0x07,
138 	QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL		= 0x08,
139 	QUERY_FLAG_IDN_BUSY_RTC				= 0x09,
140 	QUERY_FLAG_IDN_RESERVED3			= 0x0A,
141 	QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE	= 0x0B,
142 	QUERY_FLAG_IDN_WB_EN                            = 0x0E,
143 	QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN                 = 0x0F,
144 	QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8     = 0x10,
145 	QUERY_FLAG_IDN_HPB_RESET                        = 0x11,
146 	QUERY_FLAG_IDN_HPB_EN				= 0x12,
147 };
148 
149 /* Attribute idn for Query requests */
150 enum attr_idn {
151 	QUERY_ATTR_IDN_BOOT_LU_EN		= 0x00,
152 	QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD	= 0x01,
153 	QUERY_ATTR_IDN_POWER_MODE		= 0x02,
154 	QUERY_ATTR_IDN_ACTIVE_ICC_LVL		= 0x03,
155 	QUERY_ATTR_IDN_OOO_DATA_EN		= 0x04,
156 	QUERY_ATTR_IDN_BKOPS_STATUS		= 0x05,
157 	QUERY_ATTR_IDN_PURGE_STATUS		= 0x06,
158 	QUERY_ATTR_IDN_MAX_DATA_IN		= 0x07,
159 	QUERY_ATTR_IDN_MAX_DATA_OUT		= 0x08,
160 	QUERY_ATTR_IDN_DYN_CAP_NEEDED		= 0x09,
161 	QUERY_ATTR_IDN_REF_CLK_FREQ		= 0x0A,
162 	QUERY_ATTR_IDN_CONF_DESC_LOCK		= 0x0B,
163 	QUERY_ATTR_IDN_MAX_NUM_OF_RTT		= 0x0C,
164 	QUERY_ATTR_IDN_EE_CONTROL		= 0x0D,
165 	QUERY_ATTR_IDN_EE_STATUS		= 0x0E,
166 	QUERY_ATTR_IDN_SECONDS_PASSED		= 0x0F,
167 	QUERY_ATTR_IDN_CNTX_CONF		= 0x10,
168 	QUERY_ATTR_IDN_CORR_PRG_BLK_NUM		= 0x11,
169 	QUERY_ATTR_IDN_RESERVED2		= 0x12,
170 	QUERY_ATTR_IDN_RESERVED3		= 0x13,
171 	QUERY_ATTR_IDN_FFU_STATUS		= 0x14,
172 	QUERY_ATTR_IDN_PSA_STATE		= 0x15,
173 	QUERY_ATTR_IDN_PSA_DATA_SIZE		= 0x16,
174 	QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME	= 0x17,
175 	QUERY_ATTR_IDN_CASE_ROUGH_TEMP          = 0x18,
176 	QUERY_ATTR_IDN_HIGH_TEMP_BOUND          = 0x19,
177 	QUERY_ATTR_IDN_LOW_TEMP_BOUND           = 0x1A,
178 	QUERY_ATTR_IDN_WB_FLUSH_STATUS	        = 0x1C,
179 	QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE       = 0x1D,
180 	QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST    = 0x1E,
181 	QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE        = 0x1F,
182 	QUERY_ATTR_IDN_EXT_IID_EN		= 0x2A,
183 	QUERY_ATTR_IDN_TIMESTAMP		= 0x30
184 };
185 
186 /* Descriptor idn for Query requests */
187 enum desc_idn {
188 	QUERY_DESC_IDN_DEVICE		= 0x0,
189 	QUERY_DESC_IDN_CONFIGURATION	= 0x1,
190 	QUERY_DESC_IDN_UNIT		= 0x2,
191 	QUERY_DESC_IDN_RFU_0		= 0x3,
192 	QUERY_DESC_IDN_INTERCONNECT	= 0x4,
193 	QUERY_DESC_IDN_STRING		= 0x5,
194 	QUERY_DESC_IDN_RFU_1		= 0x6,
195 	QUERY_DESC_IDN_GEOMETRY		= 0x7,
196 	QUERY_DESC_IDN_POWER		= 0x8,
197 	QUERY_DESC_IDN_HEALTH           = 0x9,
198 	QUERY_DESC_IDN_MAX,
199 };
200 
201 enum desc_header_offset {
202 	QUERY_DESC_LENGTH_OFFSET	= 0x00,
203 	QUERY_DESC_DESC_TYPE_OFFSET	= 0x01,
204 };
205 
206 /* Unit descriptor parameters offsets in bytes*/
207 enum unit_desc_param {
208 	UNIT_DESC_PARAM_LEN			= 0x0,
209 	UNIT_DESC_PARAM_TYPE			= 0x1,
210 	UNIT_DESC_PARAM_UNIT_INDEX		= 0x2,
211 	UNIT_DESC_PARAM_LU_ENABLE		= 0x3,
212 	UNIT_DESC_PARAM_BOOT_LUN_ID		= 0x4,
213 	UNIT_DESC_PARAM_LU_WR_PROTECT		= 0x5,
214 	UNIT_DESC_PARAM_LU_Q_DEPTH		= 0x6,
215 	UNIT_DESC_PARAM_PSA_SENSITIVE		= 0x7,
216 	UNIT_DESC_PARAM_MEM_TYPE		= 0x8,
217 	UNIT_DESC_PARAM_DATA_RELIABILITY	= 0x9,
218 	UNIT_DESC_PARAM_LOGICAL_BLK_SIZE	= 0xA,
219 	UNIT_DESC_PARAM_LOGICAL_BLK_COUNT	= 0xB,
220 	UNIT_DESC_PARAM_ERASE_BLK_SIZE		= 0x13,
221 	UNIT_DESC_PARAM_PROVISIONING_TYPE	= 0x17,
222 	UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT	= 0x18,
223 	UNIT_DESC_PARAM_CTX_CAPABILITIES	= 0x20,
224 	UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1	= 0x22,
225 	UNIT_DESC_PARAM_HPB_LU_MAX_ACTIVE_RGNS	= 0x23,
226 	UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF	= 0x25,
227 	UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS	= 0x27,
228 	UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS	= 0x29,
229 };
230 
231 /* RPMB Unit descriptor parameters offsets in bytes*/
232 enum rpmb_unit_desc_param {
233 	RPMB_UNIT_DESC_PARAM_LEN		= 0x0,
234 	RPMB_UNIT_DESC_PARAM_TYPE		= 0x1,
235 	RPMB_UNIT_DESC_PARAM_UNIT_INDEX		= 0x2,
236 	RPMB_UNIT_DESC_PARAM_LU_ENABLE		= 0x3,
237 	RPMB_UNIT_DESC_PARAM_BOOT_LUN_ID	= 0x4,
238 	RPMB_UNIT_DESC_PARAM_LU_WR_PROTECT	= 0x5,
239 	RPMB_UNIT_DESC_PARAM_LU_Q_DEPTH		= 0x6,
240 	RPMB_UNIT_DESC_PARAM_PSA_SENSITIVE	= 0x7,
241 	RPMB_UNIT_DESC_PARAM_MEM_TYPE		= 0x8,
242 	RPMB_UNIT_DESC_PARAM_REGION_EN		= 0x9,
243 	RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_SIZE	= 0xA,
244 	RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_COUNT	= 0xB,
245 	RPMB_UNIT_DESC_PARAM_REGION0_SIZE	= 0x13,
246 	RPMB_UNIT_DESC_PARAM_REGION1_SIZE	= 0x14,
247 	RPMB_UNIT_DESC_PARAM_REGION2_SIZE	= 0x15,
248 	RPMB_UNIT_DESC_PARAM_REGION3_SIZE	= 0x16,
249 	RPMB_UNIT_DESC_PARAM_PROVISIONING_TYPE	= 0x17,
250 	RPMB_UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT	= 0x18,
251 };
252 
253 /* Device descriptor parameters offsets in bytes*/
254 enum device_desc_param {
255 	DEVICE_DESC_PARAM_LEN			= 0x0,
256 	DEVICE_DESC_PARAM_TYPE			= 0x1,
257 	DEVICE_DESC_PARAM_DEVICE_TYPE		= 0x2,
258 	DEVICE_DESC_PARAM_DEVICE_CLASS		= 0x3,
259 	DEVICE_DESC_PARAM_DEVICE_SUB_CLASS	= 0x4,
260 	DEVICE_DESC_PARAM_PRTCL			= 0x5,
261 	DEVICE_DESC_PARAM_NUM_LU		= 0x6,
262 	DEVICE_DESC_PARAM_NUM_WLU		= 0x7,
263 	DEVICE_DESC_PARAM_BOOT_ENBL		= 0x8,
264 	DEVICE_DESC_PARAM_DESC_ACCSS_ENBL	= 0x9,
265 	DEVICE_DESC_PARAM_INIT_PWR_MODE		= 0xA,
266 	DEVICE_DESC_PARAM_HIGH_PR_LUN		= 0xB,
267 	DEVICE_DESC_PARAM_SEC_RMV_TYPE		= 0xC,
268 	DEVICE_DESC_PARAM_SEC_LU		= 0xD,
269 	DEVICE_DESC_PARAM_BKOP_TERM_LT		= 0xE,
270 	DEVICE_DESC_PARAM_ACTVE_ICC_LVL		= 0xF,
271 	DEVICE_DESC_PARAM_SPEC_VER		= 0x10,
272 	DEVICE_DESC_PARAM_MANF_DATE		= 0x12,
273 	DEVICE_DESC_PARAM_MANF_NAME		= 0x14,
274 	DEVICE_DESC_PARAM_PRDCT_NAME		= 0x15,
275 	DEVICE_DESC_PARAM_SN			= 0x16,
276 	DEVICE_DESC_PARAM_OEM_ID		= 0x17,
277 	DEVICE_DESC_PARAM_MANF_ID		= 0x18,
278 	DEVICE_DESC_PARAM_UD_OFFSET		= 0x1A,
279 	DEVICE_DESC_PARAM_UD_LEN		= 0x1B,
280 	DEVICE_DESC_PARAM_RTT_CAP		= 0x1C,
281 	DEVICE_DESC_PARAM_FRQ_RTC		= 0x1D,
282 	DEVICE_DESC_PARAM_UFS_FEAT		= 0x1F,
283 	DEVICE_DESC_PARAM_FFU_TMT		= 0x20,
284 	DEVICE_DESC_PARAM_Q_DPTH		= 0x21,
285 	DEVICE_DESC_PARAM_DEV_VER		= 0x22,
286 	DEVICE_DESC_PARAM_NUM_SEC_WPA		= 0x24,
287 	DEVICE_DESC_PARAM_PSA_MAX_DATA		= 0x25,
288 	DEVICE_DESC_PARAM_PSA_TMT		= 0x29,
289 	DEVICE_DESC_PARAM_PRDCT_REV		= 0x2A,
290 	DEVICE_DESC_PARAM_HPB_VER		= 0x40,
291 	DEVICE_DESC_PARAM_HPB_CONTROL		= 0x42,
292 	DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP	= 0x4F,
293 	DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN	= 0x53,
294 	DEVICE_DESC_PARAM_WB_TYPE		= 0x54,
295 	DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
296 };
297 
298 /* Interconnect descriptor parameters offsets in bytes*/
299 enum interconnect_desc_param {
300 	INTERCONNECT_DESC_PARAM_LEN		= 0x0,
301 	INTERCONNECT_DESC_PARAM_TYPE		= 0x1,
302 	INTERCONNECT_DESC_PARAM_UNIPRO_VER	= 0x2,
303 	INTERCONNECT_DESC_PARAM_MPHY_VER	= 0x4,
304 };
305 
306 /* Geometry descriptor parameters offsets in bytes*/
307 enum geometry_desc_param {
308 	GEOMETRY_DESC_PARAM_LEN			= 0x0,
309 	GEOMETRY_DESC_PARAM_TYPE		= 0x1,
310 	GEOMETRY_DESC_PARAM_DEV_CAP		= 0x4,
311 	GEOMETRY_DESC_PARAM_MAX_NUM_LUN		= 0xC,
312 	GEOMETRY_DESC_PARAM_SEG_SIZE		= 0xD,
313 	GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE	= 0x11,
314 	GEOMETRY_DESC_PARAM_MIN_BLK_SIZE	= 0x12,
315 	GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE	= 0x13,
316 	GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE	= 0x14,
317 	GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE	= 0x15,
318 	GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE	= 0x16,
319 	GEOMETRY_DESC_PARAM_RPMB_RW_SIZE	= 0x17,
320 	GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC	= 0x18,
321 	GEOMETRY_DESC_PARAM_DATA_ORDER		= 0x19,
322 	GEOMETRY_DESC_PARAM_MAX_NUM_CTX		= 0x1A,
323 	GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE	= 0x1B,
324 	GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE	= 0x1C,
325 	GEOMETRY_DESC_PARAM_SEC_RM_TYPES	= 0x1D,
326 	GEOMETRY_DESC_PARAM_MEM_TYPES		= 0x1E,
327 	GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS	= 0x20,
328 	GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR	= 0x24,
329 	GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS	= 0x26,
330 	GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR	= 0x2A,
331 	GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS	= 0x2C,
332 	GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR	= 0x30,
333 	GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS	= 0x32,
334 	GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR	= 0x36,
335 	GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS	= 0x38,
336 	GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR	= 0x3C,
337 	GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS	= 0x3E,
338 	GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR	= 0x42,
339 	GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE	= 0x44,
340 	GEOMETRY_DESC_PARAM_HPB_REGION_SIZE	= 0x48,
341 	GEOMETRY_DESC_PARAM_HPB_NUMBER_LU	= 0x49,
342 	GEOMETRY_DESC_PARAM_HPB_SUBREGION_SIZE	= 0x4A,
343 	GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS	= 0x4B,
344 	GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS	= 0x4F,
345 	GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS	= 0x53,
346 	GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ	= 0x54,
347 	GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE	= 0x55,
348 	GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE	= 0x56,
349 };
350 
351 /* Health descriptor parameters offsets in bytes*/
352 enum health_desc_param {
353 	HEALTH_DESC_PARAM_LEN			= 0x0,
354 	HEALTH_DESC_PARAM_TYPE			= 0x1,
355 	HEALTH_DESC_PARAM_EOL_INFO		= 0x2,
356 	HEALTH_DESC_PARAM_LIFE_TIME_EST_A	= 0x3,
357 	HEALTH_DESC_PARAM_LIFE_TIME_EST_B	= 0x4,
358 };
359 
360 /* WriteBooster buffer mode */
361 enum {
362 	WB_BUF_MODE_LU_DEDICATED	= 0x0,
363 	WB_BUF_MODE_SHARED		= 0x1,
364 };
365 
366 /*
367  * Logical Unit Write Protect
368  * 00h: LU not write protected
369  * 01h: LU write protected when fPowerOnWPEn =1
370  * 02h: LU permanently write protected when fPermanentWPEn =1
371  */
372 enum ufs_lu_wp_type {
373 	UFS_LU_NO_WP		= 0x00,
374 	UFS_LU_POWER_ON_WP	= 0x01,
375 	UFS_LU_PERM_WP		= 0x02,
376 };
377 
378 /* bActiveICCLevel parameter current units */
379 enum {
380 	UFSHCD_NANO_AMP		= 0,
381 	UFSHCD_MICRO_AMP	= 1,
382 	UFSHCD_MILI_AMP		= 2,
383 	UFSHCD_AMP		= 3,
384 };
385 
386 /* Possible values for dExtendedUFSFeaturesSupport */
387 enum {
388 	UFS_DEV_LOW_TEMP_NOTIF		= BIT(4),
389 	UFS_DEV_HIGH_TEMP_NOTIF		= BIT(5),
390 	UFS_DEV_EXT_TEMP_NOTIF		= BIT(6),
391 	UFS_DEV_HPB_SUPPORT		= BIT(7),
392 	UFS_DEV_WRITE_BOOSTER_SUP	= BIT(8),
393 	UFS_DEV_EXT_IID_SUP		= BIT(16),
394 };
395 #define UFS_DEV_HPB_SUPPORT_VERSION		0x310
396 
397 #define POWER_DESC_MAX_ACTV_ICC_LVLS		16
398 
399 /* Attribute  bActiveICCLevel parameter bit masks definitions */
400 #define ATTR_ICC_LVL_UNIT_OFFSET	14
401 #define ATTR_ICC_LVL_UNIT_MASK		(0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
402 #define ATTR_ICC_LVL_VALUE_MASK		0x3FF
403 
404 /* Power descriptor parameters offsets in bytes */
405 enum power_desc_param_offset {
406 	PWR_DESC_LEN			= 0x0,
407 	PWR_DESC_TYPE			= 0x1,
408 	PWR_DESC_ACTIVE_LVLS_VCC_0	= 0x2,
409 	PWR_DESC_ACTIVE_LVLS_VCCQ_0	= 0x22,
410 	PWR_DESC_ACTIVE_LVLS_VCCQ2_0	= 0x42,
411 };
412 
413 /* Exception event mask values */
414 enum {
415 	MASK_EE_STATUS			= 0xFFFF,
416 	MASK_EE_DYNCAP_EVENT		= BIT(0),
417 	MASK_EE_SYSPOOL_EVENT		= BIT(1),
418 	MASK_EE_URGENT_BKOPS		= BIT(2),
419 	MASK_EE_TOO_HIGH_TEMP		= BIT(3),
420 	MASK_EE_TOO_LOW_TEMP		= BIT(4),
421 	MASK_EE_WRITEBOOSTER_EVENT	= BIT(5),
422 	MASK_EE_PERFORMANCE_THROTTLING	= BIT(6),
423 };
424 #define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP)
425 
426 /* Background operation status */
427 enum bkops_status {
428 	BKOPS_STATUS_NO_OP               = 0x0,
429 	BKOPS_STATUS_NON_CRITICAL        = 0x1,
430 	BKOPS_STATUS_PERF_IMPACT         = 0x2,
431 	BKOPS_STATUS_CRITICAL            = 0x3,
432 	BKOPS_STATUS_MAX		 = BKOPS_STATUS_CRITICAL,
433 };
434 
435 /* UTP QUERY Transaction Specific Fields OpCode */
436 enum query_opcode {
437 	UPIU_QUERY_OPCODE_NOP		= 0x0,
438 	UPIU_QUERY_OPCODE_READ_DESC	= 0x1,
439 	UPIU_QUERY_OPCODE_WRITE_DESC	= 0x2,
440 	UPIU_QUERY_OPCODE_READ_ATTR	= 0x3,
441 	UPIU_QUERY_OPCODE_WRITE_ATTR	= 0x4,
442 	UPIU_QUERY_OPCODE_READ_FLAG	= 0x5,
443 	UPIU_QUERY_OPCODE_SET_FLAG	= 0x6,
444 	UPIU_QUERY_OPCODE_CLEAR_FLAG	= 0x7,
445 	UPIU_QUERY_OPCODE_TOGGLE_FLAG	= 0x8,
446 };
447 
448 /* bRefClkFreq attribute values */
449 enum ufs_ref_clk_freq {
450 	REF_CLK_FREQ_19_2_MHZ	= 0,
451 	REF_CLK_FREQ_26_MHZ	= 1,
452 	REF_CLK_FREQ_38_4_MHZ	= 2,
453 	REF_CLK_FREQ_52_MHZ	= 3,
454 	REF_CLK_FREQ_INVAL	= -1,
455 };
456 
457 /* Query response result code */
458 enum {
459 	QUERY_RESULT_SUCCESS                    = 0x00,
460 	QUERY_RESULT_NOT_READABLE               = 0xF6,
461 	QUERY_RESULT_NOT_WRITEABLE              = 0xF7,
462 	QUERY_RESULT_ALREADY_WRITTEN            = 0xF8,
463 	QUERY_RESULT_INVALID_LENGTH             = 0xF9,
464 	QUERY_RESULT_INVALID_VALUE              = 0xFA,
465 	QUERY_RESULT_INVALID_SELECTOR           = 0xFB,
466 	QUERY_RESULT_INVALID_INDEX              = 0xFC,
467 	QUERY_RESULT_INVALID_IDN                = 0xFD,
468 	QUERY_RESULT_INVALID_OPCODE             = 0xFE,
469 	QUERY_RESULT_GENERAL_FAILURE            = 0xFF,
470 };
471 
472 /* UTP Transfer Request Command Type (CT) */
473 enum {
474 	UPIU_COMMAND_SET_TYPE_SCSI	= 0x0,
475 	UPIU_COMMAND_SET_TYPE_UFS	= 0x1,
476 	UPIU_COMMAND_SET_TYPE_QUERY	= 0x2,
477 };
478 
479 /* Offset of the response code in the UPIU header */
480 #define UPIU_RSP_CODE_OFFSET		8
481 
482 enum {
483 	MASK_TM_SERVICE_RESP		= 0xFF,
484 };
485 
486 /* Task management service response */
487 enum {
488 	UPIU_TASK_MANAGEMENT_FUNC_COMPL		= 0x00,
489 	UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
490 	UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED	= 0x08,
491 	UPIU_TASK_MANAGEMENT_FUNC_FAILED	= 0x05,
492 	UPIU_INCORRECT_LOGICAL_UNIT_NO		= 0x09,
493 };
494 
495 /* UFS device power modes */
496 enum ufs_dev_pwr_mode {
497 	UFS_ACTIVE_PWR_MODE	= 1,
498 	UFS_SLEEP_PWR_MODE	= 2,
499 	UFS_POWERDOWN_PWR_MODE	= 3,
500 	UFS_DEEPSLEEP_PWR_MODE	= 4,
501 };
502 
503 #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10)
504 
505 /**
506  * struct utp_cmd_rsp - Response UPIU structure
507  * @residual_transfer_count: Residual transfer count DW-3
508  * @reserved: Reserved double words DW-4 to DW-7
509  * @sense_data_len: Sense data length DW-8 U16
510  * @sense_data: Sense data field DW-8 to DW-12
511  */
512 struct utp_cmd_rsp {
513 	__be32 residual_transfer_count;
514 	__be32 reserved[4];
515 	__be16 sense_data_len;
516 	u8 sense_data[UFS_SENSE_SIZE];
517 };
518 
519 /**
520  * struct utp_upiu_rsp - general upiu response structure
521  * @header: UPIU header structure DW-0 to DW-2
522  * @sr: fields structure for scsi command DW-3 to DW-12
523  * @qr: fields structure for query request DW-3 to DW-7
524  */
525 struct utp_upiu_rsp {
526 	struct utp_upiu_header header;
527 	union {
528 		struct utp_cmd_rsp sr;
529 		struct utp_upiu_query qr;
530 	};
531 };
532 
533 /*
534  * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
535  * and link is in Hibern8 state.
536  */
537 #define UFS_VREG_LPM_LOAD_UA	1000 /* uA */
538 
539 struct ufs_vreg {
540 	struct regulator *reg;
541 	const char *name;
542 	bool always_on;
543 	bool enabled;
544 	int max_uA;
545 };
546 
547 struct ufs_vreg_info {
548 	struct ufs_vreg *vcc;
549 	struct ufs_vreg *vccq;
550 	struct ufs_vreg *vccq2;
551 	struct ufs_vreg *vdd_hba;
552 };
553 
554 struct ufs_dev_info {
555 	bool	f_power_on_wp_en;
556 	/* Keeps information if any of the LU is power on write protected */
557 	bool	is_lu_power_on_wp;
558 	/* Maximum number of general LU supported by the UFS device */
559 	u8	max_lu_supported;
560 	u16	wmanufacturerid;
561 	/*UFS device Product Name */
562 	u8	*model;
563 	u16	wspecversion;
564 	u32	clk_gating_wait_us;
565 	/* Stores the depth of queue in UFS device */
566 	u8	bqueuedepth;
567 
568 	/* UFS WB related flags */
569 	bool    wb_enabled;
570 	bool    wb_buf_flush_enabled;
571 	u8	wb_dedicated_lu;
572 	u8      wb_buffer_type;
573 
574 	bool	b_rpm_dev_flush_capable;
575 	u8	b_presrv_uspc_en;
576 
577 	bool    b_advanced_rpmb_en;
578 
579 	/* UFS EXT_IID Enable */
580 	bool	b_ext_iid_en;
581 };
582 
583 /*
584  * This enum is used in string mapping in include/trace/events/ufs.h.
585  */
586 enum ufs_trace_str_t {
587 	UFS_CMD_SEND, UFS_CMD_COMP, UFS_DEV_COMP,
588 	UFS_QUERY_SEND, UFS_QUERY_COMP, UFS_QUERY_ERR,
589 	UFS_TM_SEND, UFS_TM_COMP, UFS_TM_ERR
590 };
591 
592 /*
593  * Transaction Specific Fields (TSF) type in the UPIU package, this enum is
594  * used in include/trace/events/ufs.h for UFS command trace.
595  */
596 enum ufs_trace_tsf_t {
597 	UFS_TSF_CDB, UFS_TSF_OSF, UFS_TSF_TM_INPUT, UFS_TSF_TM_OUTPUT
598 };
599 
600 #endif /* End of Header */
601