xref: /linux/include/uapi/rdma/hfi/hfi1_ioctl.h (revision 38e8b671bf04af09fc8de74ea857f920285bd211)
1*38e8b671SLeon Romanovsky /*
2*38e8b671SLeon Romanovsky  *
3*38e8b671SLeon Romanovsky  * This file is provided under a dual BSD/GPLv2 license.  When using or
4*38e8b671SLeon Romanovsky  * redistributing this file, you may do so under either license.
5*38e8b671SLeon Romanovsky  *
6*38e8b671SLeon Romanovsky  * GPL LICENSE SUMMARY
7*38e8b671SLeon Romanovsky  *
8*38e8b671SLeon Romanovsky  * Copyright(c) 2015 Intel Corporation.
9*38e8b671SLeon Romanovsky  *
10*38e8b671SLeon Romanovsky  * This program is free software; you can redistribute it and/or modify
11*38e8b671SLeon Romanovsky  * it under the terms of version 2 of the GNU General Public License as
12*38e8b671SLeon Romanovsky  * published by the Free Software Foundation.
13*38e8b671SLeon Romanovsky  *
14*38e8b671SLeon Romanovsky  * This program is distributed in the hope that it will be useful, but
15*38e8b671SLeon Romanovsky  * WITHOUT ANY WARRANTY; without even the implied warranty of
16*38e8b671SLeon Romanovsky  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17*38e8b671SLeon Romanovsky  * General Public License for more details.
18*38e8b671SLeon Romanovsky  *
19*38e8b671SLeon Romanovsky  * BSD LICENSE
20*38e8b671SLeon Romanovsky  *
21*38e8b671SLeon Romanovsky  * Copyright(c) 2015 Intel Corporation.
22*38e8b671SLeon Romanovsky  *
23*38e8b671SLeon Romanovsky  * Redistribution and use in source and binary forms, with or without
24*38e8b671SLeon Romanovsky  * modification, are permitted provided that the following conditions
25*38e8b671SLeon Romanovsky  * are met:
26*38e8b671SLeon Romanovsky  *
27*38e8b671SLeon Romanovsky  *  - Redistributions of source code must retain the above copyright
28*38e8b671SLeon Romanovsky  *    notice, this list of conditions and the following disclaimer.
29*38e8b671SLeon Romanovsky  *  - Redistributions in binary form must reproduce the above copyright
30*38e8b671SLeon Romanovsky  *    notice, this list of conditions and the following disclaimer in
31*38e8b671SLeon Romanovsky  *    the documentation and/or other materials provided with the
32*38e8b671SLeon Romanovsky  *    distribution.
33*38e8b671SLeon Romanovsky  *  - Neither the name of Intel Corporation nor the names of its
34*38e8b671SLeon Romanovsky  *    contributors may be used to endorse or promote products derived
35*38e8b671SLeon Romanovsky  *    from this software without specific prior written permission.
36*38e8b671SLeon Romanovsky  *
37*38e8b671SLeon Romanovsky  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38*38e8b671SLeon Romanovsky  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39*38e8b671SLeon Romanovsky  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40*38e8b671SLeon Romanovsky  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41*38e8b671SLeon Romanovsky  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42*38e8b671SLeon Romanovsky  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43*38e8b671SLeon Romanovsky  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44*38e8b671SLeon Romanovsky  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45*38e8b671SLeon Romanovsky  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46*38e8b671SLeon Romanovsky  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47*38e8b671SLeon Romanovsky  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48*38e8b671SLeon Romanovsky  *
49*38e8b671SLeon Romanovsky  */
50*38e8b671SLeon Romanovsky 
51*38e8b671SLeon Romanovsky #ifndef _LINUX__HFI1_IOCTL_H
52*38e8b671SLeon Romanovsky #define _LINUX__HFI1_IOCTL_H
53*38e8b671SLeon Romanovsky #include <linux/types.h>
54*38e8b671SLeon Romanovsky 
55*38e8b671SLeon Romanovsky /*
56*38e8b671SLeon Romanovsky  * This structure is passed to the driver to tell it where
57*38e8b671SLeon Romanovsky  * user code buffers are, sizes, etc.   The offsets and sizes of the
58*38e8b671SLeon Romanovsky  * fields must remain unchanged, for binary compatibility.  It can
59*38e8b671SLeon Romanovsky  * be extended, if userversion is changed so user code can tell, if needed
60*38e8b671SLeon Romanovsky  */
61*38e8b671SLeon Romanovsky struct hfi1_user_info {
62*38e8b671SLeon Romanovsky 	/*
63*38e8b671SLeon Romanovsky 	 * version of user software, to detect compatibility issues.
64*38e8b671SLeon Romanovsky 	 * Should be set to HFI1_USER_SWVERSION.
65*38e8b671SLeon Romanovsky 	 */
66*38e8b671SLeon Romanovsky 	__u32 userversion;
67*38e8b671SLeon Romanovsky 	__u32 pad;
68*38e8b671SLeon Romanovsky 	/*
69*38e8b671SLeon Romanovsky 	 * If two or more processes wish to share a context, each process
70*38e8b671SLeon Romanovsky 	 * must set the subcontext_cnt and subcontext_id to the same
71*38e8b671SLeon Romanovsky 	 * values.  The only restriction on the subcontext_id is that
72*38e8b671SLeon Romanovsky 	 * it be unique for a given node.
73*38e8b671SLeon Romanovsky 	 */
74*38e8b671SLeon Romanovsky 	__u16 subctxt_cnt;
75*38e8b671SLeon Romanovsky 	__u16 subctxt_id;
76*38e8b671SLeon Romanovsky 	/* 128bit UUID passed in by PSM. */
77*38e8b671SLeon Romanovsky 	__u8 uuid[16];
78*38e8b671SLeon Romanovsky };
79*38e8b671SLeon Romanovsky 
80*38e8b671SLeon Romanovsky struct hfi1_ctxt_info {
81*38e8b671SLeon Romanovsky 	__u64 runtime_flags;    /* chip/drv runtime flags (HFI1_CAP_*) */
82*38e8b671SLeon Romanovsky 	__u32 rcvegr_size;      /* size of each eager buffer */
83*38e8b671SLeon Romanovsky 	__u16 num_active;       /* number of active units */
84*38e8b671SLeon Romanovsky 	__u16 unit;             /* unit (chip) assigned to caller */
85*38e8b671SLeon Romanovsky 	__u16 ctxt;             /* ctxt on unit assigned to caller */
86*38e8b671SLeon Romanovsky 	__u16 subctxt;          /* subctxt on unit assigned to caller */
87*38e8b671SLeon Romanovsky 	__u16 rcvtids;          /* number of Rcv TIDs for this context */
88*38e8b671SLeon Romanovsky 	__u16 credits;          /* number of PIO credits for this context */
89*38e8b671SLeon Romanovsky 	__u16 numa_node;        /* NUMA node of the assigned device */
90*38e8b671SLeon Romanovsky 	__u16 rec_cpu;          /* cpu # for affinity (0xffff if none) */
91*38e8b671SLeon Romanovsky 	__u16 send_ctxt;        /* send context in use by this user context */
92*38e8b671SLeon Romanovsky 	__u16 egrtids;          /* number of RcvArray entries for Eager Rcvs */
93*38e8b671SLeon Romanovsky 	__u16 rcvhdrq_cnt;      /* number of RcvHdrQ entries */
94*38e8b671SLeon Romanovsky 	__u16 rcvhdrq_entsize;  /* size (in bytes) for each RcvHdrQ entry */
95*38e8b671SLeon Romanovsky 	__u16 sdma_ring_size;   /* number of entries in SDMA request ring */
96*38e8b671SLeon Romanovsky };
97*38e8b671SLeon Romanovsky 
98*38e8b671SLeon Romanovsky struct hfi1_tid_info {
99*38e8b671SLeon Romanovsky 	/* virtual address of first page in transfer */
100*38e8b671SLeon Romanovsky 	__u64 vaddr;
101*38e8b671SLeon Romanovsky 	/* pointer to tid array. this array is big enough */
102*38e8b671SLeon Romanovsky 	__u64 tidlist;
103*38e8b671SLeon Romanovsky 	/* number of tids programmed by this request */
104*38e8b671SLeon Romanovsky 	__u32 tidcnt;
105*38e8b671SLeon Romanovsky 	/* length of transfer buffer programmed by this request */
106*38e8b671SLeon Romanovsky 	__u32 length;
107*38e8b671SLeon Romanovsky };
108*38e8b671SLeon Romanovsky 
109*38e8b671SLeon Romanovsky /*
110*38e8b671SLeon Romanovsky  * This structure is returned by the driver immediately after
111*38e8b671SLeon Romanovsky  * open to get implementation-specific info, and info specific to this
112*38e8b671SLeon Romanovsky  * instance.
113*38e8b671SLeon Romanovsky  *
114*38e8b671SLeon Romanovsky  * This struct must have explicit pad fields where type sizes
115*38e8b671SLeon Romanovsky  * may result in different alignments between 32 and 64 bit
116*38e8b671SLeon Romanovsky  * programs, since the 64 bit * bit kernel requires the user code
117*38e8b671SLeon Romanovsky  * to have matching offsets
118*38e8b671SLeon Romanovsky  */
119*38e8b671SLeon Romanovsky struct hfi1_base_info {
120*38e8b671SLeon Romanovsky 	/* version of hardware, for feature checking. */
121*38e8b671SLeon Romanovsky 	__u32 hw_version;
122*38e8b671SLeon Romanovsky 	/* version of software, for feature checking. */
123*38e8b671SLeon Romanovsky 	__u32 sw_version;
124*38e8b671SLeon Romanovsky 	/* Job key */
125*38e8b671SLeon Romanovsky 	__u16 jkey;
126*38e8b671SLeon Romanovsky 	__u16 padding1;
127*38e8b671SLeon Romanovsky 	/*
128*38e8b671SLeon Romanovsky 	 * The special QP (queue pair) value that identifies PSM
129*38e8b671SLeon Romanovsky 	 * protocol packet from standard IB packets.
130*38e8b671SLeon Romanovsky 	 */
131*38e8b671SLeon Romanovsky 	__u32 bthqp;
132*38e8b671SLeon Romanovsky 	/* PIO credit return address, */
133*38e8b671SLeon Romanovsky 	__u64 sc_credits_addr;
134*38e8b671SLeon Romanovsky 	/*
135*38e8b671SLeon Romanovsky 	 * Base address of write-only pio buffers for this process.
136*38e8b671SLeon Romanovsky 	 * Each buffer has sendpio_credits*64 bytes.
137*38e8b671SLeon Romanovsky 	 */
138*38e8b671SLeon Romanovsky 	__u64 pio_bufbase_sop;
139*38e8b671SLeon Romanovsky 	/*
140*38e8b671SLeon Romanovsky 	 * Base address of write-only pio buffers for this process.
141*38e8b671SLeon Romanovsky 	 * Each buffer has sendpio_credits*64 bytes.
142*38e8b671SLeon Romanovsky 	 */
143*38e8b671SLeon Romanovsky 	__u64 pio_bufbase;
144*38e8b671SLeon Romanovsky 	/* address where receive buffer queue is mapped into */
145*38e8b671SLeon Romanovsky 	__u64 rcvhdr_bufbase;
146*38e8b671SLeon Romanovsky 	/* base address of Eager receive buffers. */
147*38e8b671SLeon Romanovsky 	__u64 rcvegr_bufbase;
148*38e8b671SLeon Romanovsky 	/* base address of SDMA completion ring */
149*38e8b671SLeon Romanovsky 	__u64 sdma_comp_bufbase;
150*38e8b671SLeon Romanovsky 	/*
151*38e8b671SLeon Romanovsky 	 * User register base for init code, not to be used directly by
152*38e8b671SLeon Romanovsky 	 * protocol or applications.  Always maps real chip register space.
153*38e8b671SLeon Romanovsky 	 * the register addresses are:
154*38e8b671SLeon Romanovsky 	 * ur_rcvhdrhead, ur_rcvhdrtail, ur_rcvegrhead, ur_rcvegrtail,
155*38e8b671SLeon Romanovsky 	 * ur_rcvtidflow
156*38e8b671SLeon Romanovsky 	 */
157*38e8b671SLeon Romanovsky 	__u64 user_regbase;
158*38e8b671SLeon Romanovsky 	/* notification events */
159*38e8b671SLeon Romanovsky 	__u64 events_bufbase;
160*38e8b671SLeon Romanovsky 	/* status page */
161*38e8b671SLeon Romanovsky 	__u64 status_bufbase;
162*38e8b671SLeon Romanovsky 	/* rcvhdrtail update */
163*38e8b671SLeon Romanovsky 	__u64 rcvhdrtail_base;
164*38e8b671SLeon Romanovsky 	/*
165*38e8b671SLeon Romanovsky 	 * shared memory pages for subctxts if ctxt is shared; these cover
166*38e8b671SLeon Romanovsky 	 * all the processes in the group sharing a single context.
167*38e8b671SLeon Romanovsky 	 * all have enough space for the num_subcontexts value on this job.
168*38e8b671SLeon Romanovsky 	 */
169*38e8b671SLeon Romanovsky 	__u64 subctxt_uregbase;
170*38e8b671SLeon Romanovsky 	__u64 subctxt_rcvegrbuf;
171*38e8b671SLeon Romanovsky 	__u64 subctxt_rcvhdrbuf;
172*38e8b671SLeon Romanovsky };
173*38e8b671SLeon Romanovsky #endif /* _LINIUX__HFI1_IOCTL_H */
174