1e2be04c7SGreg Kroah-Hartman /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */ 21ac5a404SSelvin Xavier /* 31ac5a404SSelvin Xavier * Broadcom NetXtreme-E RoCE driver. 41ac5a404SSelvin Xavier * 51ac5a404SSelvin Xavier * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 61ac5a404SSelvin Xavier * Broadcom refers to Broadcom Limited and/or its subsidiaries. 71ac5a404SSelvin Xavier * 81ac5a404SSelvin Xavier * This software is available to you under a choice of one of two 91ac5a404SSelvin Xavier * licenses. You may choose to be licensed under the terms of the GNU 101ac5a404SSelvin Xavier * General Public License (GPL) Version 2, available from the file 111ac5a404SSelvin Xavier * COPYING in the main directory of this source tree, or the 121ac5a404SSelvin Xavier * BSD license below: 131ac5a404SSelvin Xavier * 141ac5a404SSelvin Xavier * Redistribution and use in source and binary forms, with or without 151ac5a404SSelvin Xavier * modification, are permitted provided that the following conditions 161ac5a404SSelvin Xavier * are met: 171ac5a404SSelvin Xavier * 181ac5a404SSelvin Xavier * 1. Redistributions of source code must retain the above copyright 191ac5a404SSelvin Xavier * notice, this list of conditions and the following disclaimer. 201ac5a404SSelvin Xavier * 2. Redistributions in binary form must reproduce the above copyright 211ac5a404SSelvin Xavier * notice, this list of conditions and the following disclaimer in 221ac5a404SSelvin Xavier * the documentation and/or other materials provided with the 231ac5a404SSelvin Xavier * distribution. 241ac5a404SSelvin Xavier * 251ac5a404SSelvin Xavier * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 261ac5a404SSelvin Xavier * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 271ac5a404SSelvin Xavier * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 281ac5a404SSelvin Xavier * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 291ac5a404SSelvin Xavier * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 301ac5a404SSelvin Xavier * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 311ac5a404SSelvin Xavier * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 321ac5a404SSelvin Xavier * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 331ac5a404SSelvin Xavier * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 341ac5a404SSelvin Xavier * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 351ac5a404SSelvin Xavier * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 361ac5a404SSelvin Xavier * 371ac5a404SSelvin Xavier * Description: Uverbs ABI header file 381ac5a404SSelvin Xavier */ 391ac5a404SSelvin Xavier 401ac5a404SSelvin Xavier #ifndef __BNXT_RE_UVERBS_ABI_H__ 411ac5a404SSelvin Xavier #define __BNXT_RE_UVERBS_ABI_H__ 421ac5a404SSelvin Xavier 439078b4eeSNicolas Dichtel #include <linux/types.h> 449078b4eeSNicolas Dichtel 451ac5a404SSelvin Xavier #define BNXT_RE_ABI_VERSION 1 461ac5a404SSelvin Xavier 4795b86d1cSDevesh Sharma #define BNXT_RE_CHIP_ID0_CHIP_NUM_SFT 0x00 4895b86d1cSDevesh Sharma #define BNXT_RE_CHIP_ID0_CHIP_REV_SFT 0x10 4995b86d1cSDevesh Sharma #define BNXT_RE_CHIP_ID0_CHIP_MET_SFT 0x18 5095b86d1cSDevesh Sharma 5195b86d1cSDevesh Sharma enum { 52*87974051SDevesh Sharma BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL, 53*87974051SDevesh Sharma BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL, 54*87974051SDevesh Sharma }; 55*87974051SDevesh Sharma 56*87974051SDevesh Sharma enum bnxt_re_wqe_mode { 57*87974051SDevesh Sharma BNXT_QPLIB_WQE_MODE_STATIC = 0x00, 58*87974051SDevesh Sharma BNXT_QPLIB_WQE_MODE_VARIABLE = 0x01, 59*87974051SDevesh Sharma BNXT_QPLIB_WQE_MODE_INVALID = 0x02, 6095b86d1cSDevesh Sharma }; 6195b86d1cSDevesh Sharma 621ac5a404SSelvin Xavier struct bnxt_re_uctx_resp { 631ac5a404SSelvin Xavier __u32 dev_id; 641ac5a404SSelvin Xavier __u32 max_qp; 651ac5a404SSelvin Xavier __u32 pg_size; 661ac5a404SSelvin Xavier __u32 cqe_sz; 671ac5a404SSelvin Xavier __u32 max_cqd; 681ac5a404SSelvin Xavier __u32 rsvd; 6995b86d1cSDevesh Sharma __aligned_u64 comp_mask; 7095b86d1cSDevesh Sharma __u32 chip_id0; 7195b86d1cSDevesh Sharma __u32 chip_id1; 72*87974051SDevesh Sharma __u32 mode; 73*87974051SDevesh Sharma __u32 rsvd1; /* padding */ 741ac5a404SSelvin Xavier }; 751ac5a404SSelvin Xavier 76958d2c1bSJason Gunthorpe /* 77958d2c1bSJason Gunthorpe * This struct is placed after the ib_uverbs_alloc_pd_resp struct, which is 78958d2c1bSJason Gunthorpe * not 8 byted aligned. To avoid undesired padding in various cases we have to 79958d2c1bSJason Gunthorpe * set this struct to packed. 80958d2c1bSJason Gunthorpe */ 811ac5a404SSelvin Xavier struct bnxt_re_pd_resp { 821ac5a404SSelvin Xavier __u32 pdid; 831ac5a404SSelvin Xavier __u32 dpi; 841ac5a404SSelvin Xavier __u64 dbr; 85958d2c1bSJason Gunthorpe } __attribute__((packed, aligned(4))); 861ac5a404SSelvin Xavier 871ac5a404SSelvin Xavier struct bnxt_re_cq_req { 8826b99066SJason Gunthorpe __aligned_u64 cq_va; 8926b99066SJason Gunthorpe __aligned_u64 cq_handle; 901ac5a404SSelvin Xavier }; 911ac5a404SSelvin Xavier 921ac5a404SSelvin Xavier struct bnxt_re_cq_resp { 931ac5a404SSelvin Xavier __u32 cqid; 941ac5a404SSelvin Xavier __u32 tail; 951ac5a404SSelvin Xavier __u32 phase; 961ac5a404SSelvin Xavier __u32 rsvd; 971ac5a404SSelvin Xavier }; 981ac5a404SSelvin Xavier 991ac5a404SSelvin Xavier struct bnxt_re_qp_req { 10026b99066SJason Gunthorpe __aligned_u64 qpsva; 10126b99066SJason Gunthorpe __aligned_u64 qprva; 10226b99066SJason Gunthorpe __aligned_u64 qp_handle; 1031ac5a404SSelvin Xavier }; 1041ac5a404SSelvin Xavier 1051ac5a404SSelvin Xavier struct bnxt_re_qp_resp { 1061ac5a404SSelvin Xavier __u32 qpid; 1071ac5a404SSelvin Xavier __u32 rsvd; 1081ac5a404SSelvin Xavier }; 1091ac5a404SSelvin Xavier 11037cb11acSDevesh Sharma struct bnxt_re_srq_req { 11126b99066SJason Gunthorpe __aligned_u64 srqva; 11226b99066SJason Gunthorpe __aligned_u64 srq_handle; 11337cb11acSDevesh Sharma }; 11437cb11acSDevesh Sharma 11537cb11acSDevesh Sharma struct bnxt_re_srq_resp { 11637cb11acSDevesh Sharma __u32 srqid; 11737cb11acSDevesh Sharma }; 11837cb11acSDevesh Sharma 1191ac5a404SSelvin Xavier enum bnxt_re_shpg_offt { 1201ac5a404SSelvin Xavier BNXT_RE_BEG_RESV_OFFT = 0x00, 1211ac5a404SSelvin Xavier BNXT_RE_AVID_OFFT = 0x10, 1221ac5a404SSelvin Xavier BNXT_RE_AVID_SIZE = 0x04, 1231ac5a404SSelvin Xavier BNXT_RE_END_RESV_OFFT = 0xFF0 1241ac5a404SSelvin Xavier }; 1251ac5a404SSelvin Xavier 1261ac5a404SSelvin Xavier #endif /* __BNXT_RE_UVERBS_ABI_H__*/ 127