1607ca46eSDavid Howells /* 2607ca46eSDavid Howells * linux/drivers/char/serial_core.h 3607ca46eSDavid Howells * 4607ca46eSDavid Howells * Copyright (C) 2000 Deep Blue Solutions Ltd. 5607ca46eSDavid Howells * 6607ca46eSDavid Howells * This program is free software; you can redistribute it and/or modify 7607ca46eSDavid Howells * it under the terms of the GNU General Public License as published by 8607ca46eSDavid Howells * the Free Software Foundation; either version 2 of the License, or 9607ca46eSDavid Howells * (at your option) any later version. 10607ca46eSDavid Howells * 11607ca46eSDavid Howells * This program is distributed in the hope that it will be useful, 12607ca46eSDavid Howells * but WITHOUT ANY WARRANTY; without even the implied warranty of 13607ca46eSDavid Howells * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14607ca46eSDavid Howells * GNU General Public License for more details. 15607ca46eSDavid Howells * 16607ca46eSDavid Howells * You should have received a copy of the GNU General Public License 17607ca46eSDavid Howells * along with this program; if not, write to the Free Software 18607ca46eSDavid Howells * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19607ca46eSDavid Howells */ 20607ca46eSDavid Howells #ifndef _UAPILINUX_SERIAL_CORE_H 21607ca46eSDavid Howells #define _UAPILINUX_SERIAL_CORE_H 22607ca46eSDavid Howells 23607ca46eSDavid Howells #include <linux/serial.h> 24607ca46eSDavid Howells 25607ca46eSDavid Howells /* 26607ca46eSDavid Howells * The type definitions. These are from Ted Ts'o's serial.h 27607ca46eSDavid Howells */ 28607ca46eSDavid Howells #define PORT_UNKNOWN 0 29607ca46eSDavid Howells #define PORT_8250 1 30607ca46eSDavid Howells #define PORT_16450 2 31607ca46eSDavid Howells #define PORT_16550 3 32607ca46eSDavid Howells #define PORT_16550A 4 33607ca46eSDavid Howells #define PORT_CIRRUS 5 34607ca46eSDavid Howells #define PORT_16650 6 35607ca46eSDavid Howells #define PORT_16650V2 7 36607ca46eSDavid Howells #define PORT_16750 8 37607ca46eSDavid Howells #define PORT_STARTECH 9 38607ca46eSDavid Howells #define PORT_16C950 10 39607ca46eSDavid Howells #define PORT_16654 11 40607ca46eSDavid Howells #define PORT_16850 12 41607ca46eSDavid Howells #define PORT_RSA 13 42607ca46eSDavid Howells #define PORT_NS16550A 14 43607ca46eSDavid Howells #define PORT_XSCALE 15 44607ca46eSDavid Howells #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 45607ca46eSDavid Howells #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 46607ca46eSDavid Howells #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 47607ca46eSDavid Howells #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ 48607ca46eSDavid Howells #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */ 49607ca46eSDavid Howells #define PORT_XR17D15X 21 /* Exar XR17D15x UART */ 50607ca46eSDavid Howells #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */ 51607ca46eSDavid Howells #define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */ 52dc96efb7SMatt Schulte #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */ 5385f02440SMichael Chan #define PORT_BRCM_TRUMANAGE 25 54e06c93caSLey Foon Tan #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */ 55e06c93caSLey Foon Tan #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */ 56e06c93caSLey Foon Tan #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */ 579b8777e3SJohn Crispin #define PORT_RT2880 29 /* Ralink RT2880 internal UART */ 58fddceb8bSVijay Rai #define PORT_16550A_FSL64 30 /* Freescale 16550 UART with 64 FIFOs */ 59607ca46eSDavid Howells 60607ca46eSDavid Howells /* 61607ca46eSDavid Howells * ARM specific type numbers. These are not currently guaranteed 62607ca46eSDavid Howells * to be implemented, and will change in the future. These are 63607ca46eSDavid Howells * separate so any additions to the old serial.c that occur before 64607ca46eSDavid Howells * we are merged can be easily merged here. 65607ca46eSDavid Howells */ 66607ca46eSDavid Howells #define PORT_PXA 31 67607ca46eSDavid Howells #define PORT_AMBA 32 68607ca46eSDavid Howells #define PORT_CLPS711X 33 69607ca46eSDavid Howells #define PORT_SA1100 34 70607ca46eSDavid Howells #define PORT_UART00 35 71fc60a8b6SAndreas Färber #define PORT_OWL 36 72607ca46eSDavid Howells #define PORT_21285 37 73607ca46eSDavid Howells 74607ca46eSDavid Howells /* Sparc type numbers. */ 75607ca46eSDavid Howells #define PORT_SUNZILOG 38 76607ca46eSDavid Howells #define PORT_SUNSAB 39 77607ca46eSDavid Howells 7863e8d439SAndy Shevchenko /* Intel EG20 */ 7963e8d439SAndy Shevchenko #define PORT_PCH_8LINE 44 8063e8d439SAndy Shevchenko #define PORT_PCH_2LINE 45 8163e8d439SAndy Shevchenko 82607ca46eSDavid Howells /* DEC */ 83607ca46eSDavid Howells #define PORT_DZ 46 84607ca46eSDavid Howells #define PORT_ZS 47 85607ca46eSDavid Howells 86607ca46eSDavid Howells /* Parisc type numbers. */ 87607ca46eSDavid Howells #define PORT_MUX 48 88607ca46eSDavid Howells 8972ce5732SAndy Shevchenko /* Atmel AT91 SoC */ 90607ca46eSDavid Howells #define PORT_ATMEL 49 91607ca46eSDavid Howells 92607ca46eSDavid Howells /* Macintosh Zilog type numbers */ 93607ca46eSDavid Howells #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 94607ca46eSDavid Howells #define PORT_PMAC_ZILOG 51 95607ca46eSDavid Howells 96607ca46eSDavid Howells /* SH-SCI */ 97607ca46eSDavid Howells #define PORT_SCI 52 98607ca46eSDavid Howells #define PORT_SCIF 53 99607ca46eSDavid Howells #define PORT_IRDA 54 100607ca46eSDavid Howells 101607ca46eSDavid Howells /* Samsung S3C2410 SoC and derivatives thereof */ 102607ca46eSDavid Howells #define PORT_S3C2410 55 103607ca46eSDavid Howells 104607ca46eSDavid Howells /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 105607ca46eSDavid Howells #define PORT_IP22ZILOG 56 106607ca46eSDavid Howells 107607ca46eSDavid Howells /* Sharp LH7a40x -- an ARM9 SoC series */ 108607ca46eSDavid Howells #define PORT_LH7A40X 57 109607ca46eSDavid Howells 110607ca46eSDavid Howells /* PPC CPM type number */ 111607ca46eSDavid Howells #define PORT_CPM 58 112607ca46eSDavid Howells 113607ca46eSDavid Howells /* MPC52xx (and MPC512x) type numbers */ 114607ca46eSDavid Howells #define PORT_MPC52xx 59 115607ca46eSDavid Howells 116607ca46eSDavid Howells /* IBM icom */ 117607ca46eSDavid Howells #define PORT_ICOM 60 118607ca46eSDavid Howells 119607ca46eSDavid Howells /* Samsung S3C2440 SoC */ 120607ca46eSDavid Howells #define PORT_S3C2440 61 121607ca46eSDavid Howells 122607ca46eSDavid Howells /* Motorola i.MX SoC */ 123607ca46eSDavid Howells #define PORT_IMX 62 124607ca46eSDavid Howells 125607ca46eSDavid Howells /* Marvell MPSC */ 126607ca46eSDavid Howells #define PORT_MPSC 63 127607ca46eSDavid Howells 128607ca46eSDavid Howells /* TXX9 type number */ 129607ca46eSDavid Howells #define PORT_TXX9 64 130607ca46eSDavid Howells 131607ca46eSDavid Howells /* NEC VR4100 series SIU/DSIU */ 132607ca46eSDavid Howells #define PORT_VR41XX_SIU 65 133607ca46eSDavid Howells #define PORT_VR41XX_DSIU 66 134607ca46eSDavid Howells 135607ca46eSDavid Howells /* Samsung S3C2400 SoC */ 136607ca46eSDavid Howells #define PORT_S3C2400 67 137607ca46eSDavid Howells 138607ca46eSDavid Howells /* M32R SIO */ 139607ca46eSDavid Howells #define PORT_M32R_SIO 68 140607ca46eSDavid Howells 141607ca46eSDavid Howells /*Digi jsm */ 142607ca46eSDavid Howells #define PORT_JSM 69 143607ca46eSDavid Howells 144607ca46eSDavid Howells #define PORT_PNX8XXX 70 145607ca46eSDavid Howells 146607ca46eSDavid Howells /* Hilscher netx */ 147607ca46eSDavid Howells #define PORT_NETX 71 148607ca46eSDavid Howells 149607ca46eSDavid Howells /* SUN4V Hypervisor Console */ 150607ca46eSDavid Howells #define PORT_SUNHV 72 151607ca46eSDavid Howells 152607ca46eSDavid Howells #define PORT_S3C2412 73 153607ca46eSDavid Howells 154607ca46eSDavid Howells /* Xilinx uartlite */ 155607ca46eSDavid Howells #define PORT_UARTLITE 74 156607ca46eSDavid Howells 157607ca46eSDavid Howells /* Blackfin bf5xx */ 158607ca46eSDavid Howells #define PORT_BFIN 75 159607ca46eSDavid Howells 160607ca46eSDavid Howells /* Micrel KS8695 */ 161607ca46eSDavid Howells #define PORT_KS8695 76 162607ca46eSDavid Howells 163607ca46eSDavid Howells /* Broadcom SB1250, etc. SOC */ 164607ca46eSDavid Howells #define PORT_SB1250_DUART 77 165607ca46eSDavid Howells 166607ca46eSDavid Howells /* Freescale ColdFire */ 167607ca46eSDavid Howells #define PORT_MCF 78 168607ca46eSDavid Howells 169607ca46eSDavid Howells /* Blackfin SPORT */ 170607ca46eSDavid Howells #define PORT_BFIN_SPORT 79 171607ca46eSDavid Howells 172607ca46eSDavid Howells /* MN10300 on-chip UART numbers */ 173607ca46eSDavid Howells #define PORT_MN10300 80 174607ca46eSDavid Howells #define PORT_MN10300_CTS 81 175607ca46eSDavid Howells 176607ca46eSDavid Howells #define PORT_SC26XX 82 177607ca46eSDavid Howells 178607ca46eSDavid Howells /* SH-SCI */ 179607ca46eSDavid Howells #define PORT_SCIFA 83 180607ca46eSDavid Howells 181607ca46eSDavid Howells #define PORT_S3C6400 84 182607ca46eSDavid Howells 183d1b5c87fSArnd Bergmann /* NWPSERIAL, now removed */ 184607ca46eSDavid Howells #define PORT_NWPSERIAL 85 185607ca46eSDavid Howells 186607ca46eSDavid Howells /* MAX3100 */ 187607ca46eSDavid Howells #define PORT_MAX3100 86 188607ca46eSDavid Howells 189607ca46eSDavid Howells /* Timberdale UART */ 190607ca46eSDavid Howells #define PORT_TIMBUART 87 191607ca46eSDavid Howells 192607ca46eSDavid Howells /* Qualcomm MSM SoCs */ 193607ca46eSDavid Howells #define PORT_MSM 88 194607ca46eSDavid Howells 195607ca46eSDavid Howells /* BCM63xx family SoCs */ 196607ca46eSDavid Howells #define PORT_BCM63XX 89 197607ca46eSDavid Howells 198607ca46eSDavid Howells /* Aeroflex Gaisler GRLIB APBUART */ 199607ca46eSDavid Howells #define PORT_APBUART 90 200607ca46eSDavid Howells 201607ca46eSDavid Howells /* Altera UARTs */ 202607ca46eSDavid Howells #define PORT_ALTERA_JTAGUART 91 203607ca46eSDavid Howells #define PORT_ALTERA_UART 92 204607ca46eSDavid Howells 205607ca46eSDavid Howells /* SH-SCI */ 206607ca46eSDavid Howells #define PORT_SCIFB 93 207607ca46eSDavid Howells 208607ca46eSDavid Howells /* MAX310X */ 209607ca46eSDavid Howells #define PORT_MAX310X 94 210607ca46eSDavid Howells 211ee1c90ccSAndy Shevchenko /* TI DA8xx/66AK2x */ 212ee1c90ccSAndy Shevchenko #define PORT_DA830 95 213ee1c90ccSAndy Shevchenko 214607ca46eSDavid Howells /* TI OMAP-UART */ 215607ca46eSDavid Howells #define PORT_OMAP 96 216607ca46eSDavid Howells 217607ca46eSDavid Howells /* VIA VT8500 SoC */ 218607ca46eSDavid Howells #define PORT_VT8500 97 219607ca46eSDavid Howells 220d9bb3fb1SSoren Brinkmann /* Cadence (Xilinx Zynq) UART */ 221607ca46eSDavid Howells #define PORT_XUARTPS 98 222607ca46eSDavid Howells 223607ca46eSDavid Howells /* Atheros AR933X SoC */ 224607ca46eSDavid Howells #define PORT_AR933X 99 225607ca46eSDavid Howells 226607ca46eSDavid Howells /* Energy Micro efm32 SoC */ 227607ca46eSDavid Howells #define PORT_EFMUART 100 228607ca46eSDavid Howells 2292ac4ad2aSVineet Gupta /* ARC (Synopsys) on-chip UART */ 2302ac4ad2aSVineet Gupta #define PORT_ARC 101 231607ca46eSDavid Howells 2327d9f49afSKevin Cernekee /* Rocketport EXPRESS/INFINITY */ 2337d9f49afSKevin Cernekee #define PORT_RP2 102 2347d9f49afSKevin Cernekee 235c9e2e946SJingchang Lu /* Freescale lpuart */ 236c9e2e946SJingchang Lu #define PORT_LPUART 103 237c9e2e946SJingchang Lu 238f303b364SUlrich Hecht /* SH-SCI */ 23942daabf6SLinus Torvalds #define PORT_HSCIF 104 240f303b364SUlrich Hecht 241c4b05856SSrinivas Kandagatla /* ST ASC type numbers */ 242c4b05856SSrinivas Kandagatla #define PORT_ASC 105 243c4b05856SSrinivas Kandagatla 244b5c6c1a7SChris Metcalf /* Tilera TILE-Gx UART */ 2454de9ad9bSLinus Torvalds #define PORT_TILEGX 106 246b5c6c1a7SChris Metcalf 247e264ebf4SJohannes Thumshirn /* MEN 16z135 UART */ 248e264ebf4SJohannes Thumshirn #define PORT_MEN_Z135 107 249e264ebf4SJohannes Thumshirn 250dfeae619SJon Ringle /* SC16IS74xx */ 251dfeae619SJon Ringle #define PORT_SC16IS7XX 108 252dfeae619SJon Ringle 253ff7693d0SCarlo Caione /* MESON */ 254ff7693d0SCarlo Caione #define PORT_MESON 109 255ff7693d0SCarlo Caione 2565930cb35SBaruch Siach /* Conexant Digicolor */ 2575930cb35SBaruch Siach #define PORT_DIGICOLOR 110 2585930cb35SBaruch Siach 259b7396a38SChunyan Zhang /* SPRD SERIAL */ 260b7396a38SChunyan Zhang #define PORT_SPRD 111 261b7396a38SChunyan Zhang 262692132b5SNiklas Cassel /* Cris v10 / v32 SoC */ 263692132b5SNiklas Cassel #define PORT_CRIS 112 264692132b5SNiklas Cassel 26548a6092fSMaxime Coquelin /* STM32 USART */ 26648a6092fSMaxime Coquelin #define PORT_STM32 113 26748a6092fSMaxime Coquelin 26830530791SWilson Ding /* MVEBU UART */ 26930530791SWilson Ding #define PORT_MVEBU 114 27030530791SWilson Ding 271157b9394SAndrei Pistirica /* Microchip PIC32 UART */ 27207b75260SLinus Torvalds #define PORT_PIC32 115 273157b9394SAndrei Pistirica 274041f031dSVladimir Murzin /* MPS2 UART */ 275e10abc62SLinus Torvalds #define PORT_MPS2UART 116 276041f031dSVladimir Murzin 277*1c16ae65SSean Wang /* MediaTek BTIF */ 278*1c16ae65SSean Wang #define PORT_MTK_BTIF 117 279*1c16ae65SSean Wang 280607ca46eSDavid Howells #endif /* _UAPILINUX_SERIAL_CORE_H */ 281