xref: /linux/include/uapi/linux/ndctl.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
162232e45SDan Williams /*
2baa51277SDan Williams  * Copyright (c) 2014-2016, Intel Corporation.
362232e45SDan Williams  *
462232e45SDan Williams  * This program is free software; you can redistribute it and/or modify it
562232e45SDan Williams  * under the terms and conditions of the GNU Lesser General Public License,
662232e45SDan Williams  * version 2.1, as published by the Free Software Foundation.
762232e45SDan Williams  *
862232e45SDan Williams  * This program is distributed in the hope it will be useful, but WITHOUT ANY
962232e45SDan Williams  * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
1062232e45SDan Williams  * FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License for
1162232e45SDan Williams  * more details.
1262232e45SDan Williams  */
1362232e45SDan Williams #ifndef __NDCTL_H__
1462232e45SDan Williams #define __NDCTL_H__
1562232e45SDan Williams 
1662232e45SDan Williams #include <linux/types.h>
1762232e45SDan Williams 
1862232e45SDan Williams struct nd_cmd_dimm_flags {
1962232e45SDan Williams 	__u32 status;
2062232e45SDan Williams 	__u32 flags;
2162232e45SDan Williams } __packed;
2262232e45SDan Williams 
2362232e45SDan Williams struct nd_cmd_get_config_size {
2462232e45SDan Williams 	__u32 status;
2562232e45SDan Williams 	__u32 config_size;
2662232e45SDan Williams 	__u32 max_xfer;
2762232e45SDan Williams } __packed;
2862232e45SDan Williams 
2962232e45SDan Williams struct nd_cmd_get_config_data_hdr {
3062232e45SDan Williams 	__u32 in_offset;
3162232e45SDan Williams 	__u32 in_length;
3262232e45SDan Williams 	__u32 status;
33*94dfc73eSGustavo A. R. Silva 	__u8 out_buf[];
3462232e45SDan Williams } __packed;
3562232e45SDan Williams 
3662232e45SDan Williams struct nd_cmd_set_config_hdr {
3762232e45SDan Williams 	__u32 in_offset;
3862232e45SDan Williams 	__u32 in_length;
39*94dfc73eSGustavo A. R. Silva 	__u8 in_buf[];
4062232e45SDan Williams } __packed;
4162232e45SDan Williams 
4262232e45SDan Williams struct nd_cmd_vendor_hdr {
4362232e45SDan Williams 	__u32 opcode;
4462232e45SDan Williams 	__u32 in_length;
45*94dfc73eSGustavo A. R. Silva 	__u8 in_buf[];
4662232e45SDan Williams } __packed;
4762232e45SDan Williams 
4862232e45SDan Williams struct nd_cmd_vendor_tail {
4962232e45SDan Williams 	__u32 status;
5062232e45SDan Williams 	__u32 out_length;
51*94dfc73eSGustavo A. R. Silva 	__u8 out_buf[];
5262232e45SDan Williams } __packed;
5362232e45SDan Williams 
5462232e45SDan Williams struct nd_cmd_ars_cap {
5562232e45SDan Williams 	__u64 address;
5662232e45SDan Williams 	__u64 length;
5762232e45SDan Williams 	__u32 status;
5862232e45SDan Williams 	__u32 max_ars_out;
594577b066SDan Williams 	__u32 clear_err_unit;
60759d6a96SJerry Hoemann 	__u16 flags;
61759d6a96SJerry Hoemann 	__u16 reserved;
6262232e45SDan Williams } __packed;
6362232e45SDan Williams 
6462232e45SDan Williams struct nd_cmd_ars_start {
6562232e45SDan Williams 	__u64 address;
6662232e45SDan Williams 	__u64 length;
6762232e45SDan Williams 	__u16 type;
684577b066SDan Williams 	__u8 flags;
694577b066SDan Williams 	__u8 reserved[5];
7062232e45SDan Williams 	__u32 status;
714577b066SDan Williams 	__u32 scrub_time;
7262232e45SDan Williams } __packed;
7362232e45SDan Williams 
7462232e45SDan Williams struct nd_cmd_ars_status {
7562232e45SDan Williams 	__u32 status;
7662232e45SDan Williams 	__u32 out_length;
7762232e45SDan Williams 	__u64 address;
7862232e45SDan Williams 	__u64 length;
794577b066SDan Williams 	__u64 restart_address;
804577b066SDan Williams 	__u64 restart_length;
8162232e45SDan Williams 	__u16 type;
824577b066SDan Williams 	__u16 flags;
8362232e45SDan Williams 	__u32 num_records;
8462232e45SDan Williams 	struct nd_ars_record {
8562232e45SDan Williams 		__u32 handle;
864577b066SDan Williams 		__u32 reserved;
8762232e45SDan Williams 		__u64 err_address;
88ec92777fSVishal Verma 		__u64 length;
89*94dfc73eSGustavo A. R. Silva 	} __packed records[];
9062232e45SDan Williams } __packed;
9162232e45SDan Williams 
92d4f32367SDan Williams struct nd_cmd_clear_error {
93d4f32367SDan Williams 	__u64 address;
94d4f32367SDan Williams 	__u64 length;
95d4f32367SDan Williams 	__u32 status;
96d4f32367SDan Williams 	__u8 reserved[4];
97d4f32367SDan Williams 	__u64 cleared;
98d4f32367SDan Williams } __packed;
99d4f32367SDan Williams 
10062232e45SDan Williams enum {
10162232e45SDan Williams 	ND_CMD_IMPLEMENTED = 0,
10262232e45SDan Williams 
10362232e45SDan Williams 	/* bus commands */
10462232e45SDan Williams 	ND_CMD_ARS_CAP = 1,
10562232e45SDan Williams 	ND_CMD_ARS_START = 2,
10662232e45SDan Williams 	ND_CMD_ARS_STATUS = 3,
107d4f32367SDan Williams 	ND_CMD_CLEAR_ERROR = 4,
10862232e45SDan Williams 
10962232e45SDan Williams 	/* per-dimm commands */
11062232e45SDan Williams 	ND_CMD_SMART = 1,
11162232e45SDan Williams 	ND_CMD_SMART_THRESHOLD = 2,
11262232e45SDan Williams 	ND_CMD_DIMM_FLAGS = 3,
11362232e45SDan Williams 	ND_CMD_GET_CONFIG_SIZE = 4,
11462232e45SDan Williams 	ND_CMD_GET_CONFIG_DATA = 5,
11562232e45SDan Williams 	ND_CMD_SET_CONFIG_DATA = 6,
11662232e45SDan Williams 	ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7,
11762232e45SDan Williams 	ND_CMD_VENDOR_EFFECT_LOG = 8,
11862232e45SDan Williams 	ND_CMD_VENDOR = 9,
11931eca76bSDan Williams 	ND_CMD_CALL = 10,
12062232e45SDan Williams };
12162232e45SDan Williams 
12239c686b8SVishal Verma enum {
12339c686b8SVishal Verma 	ND_ARS_VOLATILE = 1,
12439c686b8SVishal Verma 	ND_ARS_PERSISTENT = 2,
12580790039SToshi Kani 	ND_ARS_RETURN_PREV_DATA = 1 << 1,
1269d62ed96SDan Williams 	ND_CONFIG_LOCKED = 1,
12739c686b8SVishal Verma };
12839c686b8SVishal Verma 
nvdimm_bus_cmd_name(unsigned cmd)12962232e45SDan Williams static inline const char *nvdimm_bus_cmd_name(unsigned cmd)
13062232e45SDan Williams {
1319607871fSDavid Howells 	switch (cmd) {
1329607871fSDavid Howells 	case ND_CMD_ARS_CAP:		return "ars_cap";
1339607871fSDavid Howells 	case ND_CMD_ARS_START:		return "ars_start";
1349607871fSDavid Howells 	case ND_CMD_ARS_STATUS:		return "ars_status";
1359607871fSDavid Howells 	case ND_CMD_CLEAR_ERROR:	return "clear_error";
1369607871fSDavid Howells 	case ND_CMD_CALL:		return "cmd_call";
1379607871fSDavid Howells 	default:			return "unknown";
1389607871fSDavid Howells 	}
13962232e45SDan Williams }
14062232e45SDan Williams 
nvdimm_cmd_name(unsigned cmd)14162232e45SDan Williams static inline const char *nvdimm_cmd_name(unsigned cmd)
14262232e45SDan Williams {
1439607871fSDavid Howells 	switch (cmd) {
1449607871fSDavid Howells 	case ND_CMD_SMART:			return "smart";
1459607871fSDavid Howells 	case ND_CMD_SMART_THRESHOLD:		return "smart_thresh";
1469607871fSDavid Howells 	case ND_CMD_DIMM_FLAGS:			return "flags";
1479607871fSDavid Howells 	case ND_CMD_GET_CONFIG_SIZE:		return "get_size";
1489607871fSDavid Howells 	case ND_CMD_GET_CONFIG_DATA:		return "get_data";
1499607871fSDavid Howells 	case ND_CMD_SET_CONFIG_DATA:		return "set_data";
1509607871fSDavid Howells 	case ND_CMD_VENDOR_EFFECT_LOG_SIZE:	return "effect_size";
1519607871fSDavid Howells 	case ND_CMD_VENDOR_EFFECT_LOG:		return "effect_log";
1529607871fSDavid Howells 	case ND_CMD_VENDOR:			return "vendor";
1539607871fSDavid Howells 	case ND_CMD_CALL:			return "cmd_call";
1549607871fSDavid Howells 	default:				return "unknown";
1559607871fSDavid Howells 	}
15662232e45SDan Williams }
15762232e45SDan Williams 
15862232e45SDan Williams #define ND_IOCTL 'N'
15962232e45SDan Williams 
16062232e45SDan Williams #define ND_IOCTL_DIMM_FLAGS		_IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\
16162232e45SDan Williams 					struct nd_cmd_dimm_flags)
16262232e45SDan Williams 
16362232e45SDan Williams #define ND_IOCTL_GET_CONFIG_SIZE	_IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\
16462232e45SDan Williams 					struct nd_cmd_get_config_size)
16562232e45SDan Williams 
16662232e45SDan Williams #define ND_IOCTL_GET_CONFIG_DATA	_IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\
16762232e45SDan Williams 					struct nd_cmd_get_config_data_hdr)
16862232e45SDan Williams 
16962232e45SDan Williams #define ND_IOCTL_SET_CONFIG_DATA	_IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\
17062232e45SDan Williams 					struct nd_cmd_set_config_hdr)
17162232e45SDan Williams 
17262232e45SDan Williams #define ND_IOCTL_VENDOR			_IOWR(ND_IOCTL, ND_CMD_VENDOR,\
17362232e45SDan Williams 					struct nd_cmd_vendor_hdr)
17462232e45SDan Williams 
17562232e45SDan Williams #define ND_IOCTL_ARS_CAP		_IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\
17662232e45SDan Williams 					struct nd_cmd_ars_cap)
17762232e45SDan Williams 
17862232e45SDan Williams #define ND_IOCTL_ARS_START		_IOWR(ND_IOCTL, ND_CMD_ARS_START,\
17962232e45SDan Williams 					struct nd_cmd_ars_start)
18062232e45SDan Williams 
18162232e45SDan Williams #define ND_IOCTL_ARS_STATUS		_IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\
18262232e45SDan Williams 					struct nd_cmd_ars_status)
18362232e45SDan Williams 
184d4f32367SDan Williams #define ND_IOCTL_CLEAR_ERROR		_IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\
185d4f32367SDan Williams 					struct nd_cmd_clear_error)
186d4f32367SDan Williams 
1874d88a97aSDan Williams #define ND_DEVICE_DIMM 1            /* nd_dimm: container for "config data" */
1883d88002eSDan Williams #define ND_DEVICE_REGION_PMEM 2     /* nd_region: (parent of PMEM namespaces) */
1893d88002eSDan Williams #define ND_DEVICE_REGION_BLK 3      /* nd_region: (parent of BLK namespaces) */
1903d88002eSDan Williams #define ND_DEVICE_NAMESPACE_IO 4    /* legacy persistent memory */
1913d88002eSDan Williams #define ND_DEVICE_NAMESPACE_PMEM 5  /* PMEM namespace (may alias with BLK) */
192cd03412aSDan Williams #define ND_DEVICE_DAX_PMEM 7        /* Device DAX interface to pmem */
1934d88a97aSDan Williams 
1944d88a97aSDan Williams enum nd_driver_flags {
1954d88a97aSDan Williams 	ND_DRIVER_DIMM            = 1 << ND_DEVICE_DIMM,
1963d88002eSDan Williams 	ND_DRIVER_REGION_PMEM     = 1 << ND_DEVICE_REGION_PMEM,
1973d88002eSDan Williams 	ND_DRIVER_REGION_BLK      = 1 << ND_DEVICE_REGION_BLK,
1983d88002eSDan Williams 	ND_DRIVER_NAMESPACE_IO    = 1 << ND_DEVICE_NAMESPACE_IO,
1993d88002eSDan Williams 	ND_DRIVER_NAMESPACE_PMEM  = 1 << ND_DEVICE_NAMESPACE_PMEM,
200cd03412aSDan Williams 	ND_DRIVER_DAX_PMEM	  = 1 << ND_DEVICE_DAX_PMEM,
2014d88a97aSDan Williams };
202bf9bccc1SDan Williams 
20339c686b8SVishal Verma enum ars_masks {
20439c686b8SVishal Verma 	ARS_STATUS_MASK = 0x0000FFFF,
20539c686b8SVishal Verma 	ARS_EXT_STATUS_SHIFT = 16,
20639c686b8SVishal Verma };
20731eca76bSDan Williams 
20831eca76bSDan Williams /*
20931eca76bSDan Williams  * struct nd_cmd_pkg
21031eca76bSDan Williams  *
21131eca76bSDan Williams  * is a wrapper to a quasi pass thru interface for invoking firmware
21231eca76bSDan Williams  * associated with nvdimms.
21331eca76bSDan Williams  *
21431eca76bSDan Williams  * INPUT PARAMETERS
21531eca76bSDan Williams  *
21631eca76bSDan Williams  * nd_family corresponds to the firmware (e.g. DSM) interface.
21731eca76bSDan Williams  *
21831eca76bSDan Williams  * nd_command are the function index advertised by the firmware.
21931eca76bSDan Williams  *
22031eca76bSDan Williams  * nd_size_in is the size of the input parameters being passed to firmware
22131eca76bSDan Williams  *
22231eca76bSDan Williams  * OUTPUT PARAMETERS
22331eca76bSDan Williams  *
22431eca76bSDan Williams  * nd_fw_size is the size of the data firmware wants to return for
22531eca76bSDan Williams  * the call.  If nd_fw_size is greater than size of nd_size_out, only
22631eca76bSDan Williams  * the first nd_size_out bytes are returned.
22731eca76bSDan Williams  */
22831eca76bSDan Williams 
22931eca76bSDan Williams struct nd_cmd_pkg {
23031eca76bSDan Williams 	__u64   nd_family;		/* family of commands */
23131eca76bSDan Williams 	__u64   nd_command;
23231eca76bSDan Williams 	__u32   nd_size_in;		/* INPUT: size of input args */
23331eca76bSDan Williams 	__u32   nd_size_out;		/* INPUT: size of payload */
23431eca76bSDan Williams 	__u32   nd_reserved2[9];	/* reserved must be zero */
23531eca76bSDan Williams 	__u32   nd_fw_size;		/* OUTPUT: size fw wants to return */
23631eca76bSDan Williams 	unsigned char nd_payload[];	/* Contents of call      */
23731eca76bSDan Williams };
23831eca76bSDan Williams 
23931eca76bSDan Williams /* These NVDIMM families represent pre-standardization command sets */
24031eca76bSDan Williams #define NVDIMM_FAMILY_INTEL 0
24131eca76bSDan Williams #define NVDIMM_FAMILY_HPE1 1
24231eca76bSDan Williams #define NVDIMM_FAMILY_HPE2 2
243e02fb726Sstuart hayes #define NVDIMM_FAMILY_MSFT 3
2441194c413SDexuan Cui #define NVDIMM_FAMILY_HYPERV 4
245f517f792SVaibhav Jain #define NVDIMM_FAMILY_PAPR 5
24692fe2aa8SDan Williams #define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_PAPR
24792fe2aa8SDan Williams 
24892fe2aa8SDan Williams #define NVDIMM_BUS_FAMILY_NFIT 0
2496450ddbdSDan Williams #define NVDIMM_BUS_FAMILY_INTEL 1
2506450ddbdSDan Williams #define NVDIMM_BUS_FAMILY_MAX NVDIMM_BUS_FAMILY_INTEL
25131eca76bSDan Williams 
25231eca76bSDan Williams #define ND_IOCTL_CALL			_IOWR(ND_IOCTL, ND_CMD_CALL,\
25331eca76bSDan Williams 					struct nd_cmd_pkg)
25431eca76bSDan Williams 
25562232e45SDan Williams #endif /* __NDCTL_H__ */
256