xref: /linux/include/uapi/linux/fdreg.h (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
16f52b16cSGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2607ca46eSDavid Howells #ifndef _LINUX_FDREG_H
3607ca46eSDavid Howells #define _LINUX_FDREG_H
4607ca46eSDavid Howells /*
5607ca46eSDavid Howells  * This file contains some defines for the floppy disk controller.
6607ca46eSDavid Howells  * Various sources. Mostly "IBM Microcomputers: A Programmers
7607ca46eSDavid Howells  * Handbook", Sanches and Canton.
8607ca46eSDavid Howells  */
9607ca46eSDavid Howells 
10*7d33850aSWilly Tarreau /* 82077's auxiliary status registers A & B (R) */
11*7d33850aSWilly Tarreau #define FD_SRA		0
12*7d33850aSWilly Tarreau #define FD_SRB		1
13607ca46eSDavid Howells 
14607ca46eSDavid Howells /* Digital Output Register */
15e2032464SWilly Tarreau #define FD_DOR		2
16607ca46eSDavid Howells 
17*7d33850aSWilly Tarreau /* 82077's tape drive register (R/W) */
18*7d33850aSWilly Tarreau #define FD_TDR		3
19*7d33850aSWilly Tarreau 
20*7d33850aSWilly Tarreau /* 82077's data rate select register (W) */
21*7d33850aSWilly Tarreau #define FD_DSR		4
22*7d33850aSWilly Tarreau 
23*7d33850aSWilly Tarreau /* Fd controller regs. S&C, about page 340 */
24*7d33850aSWilly Tarreau #define FD_STATUS	4
25*7d33850aSWilly Tarreau #define FD_DATA		5
26*7d33850aSWilly Tarreau 
27607ca46eSDavid Howells /* Digital Input Register (read) */
28e2032464SWilly Tarreau #define FD_DIR		7
29607ca46eSDavid Howells 
30607ca46eSDavid Howells /* Diskette Control Register (write)*/
31e2032464SWilly Tarreau #define FD_DCR		7
32607ca46eSDavid Howells 
33607ca46eSDavid Howells /* Bits of main status register */
34607ca46eSDavid Howells #define STATUS_BUSYMASK	0x0F		/* drive busy mask */
35607ca46eSDavid Howells #define STATUS_BUSY	0x10		/* FDC busy */
36607ca46eSDavid Howells #define STATUS_DMA	0x20		/* 0- DMA mode */
37607ca46eSDavid Howells #define STATUS_DIR	0x40		/* 0- cpu->fdc */
38607ca46eSDavid Howells #define STATUS_READY	0x80		/* Data reg ready */
39607ca46eSDavid Howells 
40607ca46eSDavid Howells /* Bits of FD_ST0 */
41607ca46eSDavid Howells #define ST0_DS		0x03		/* drive select mask */
42607ca46eSDavid Howells #define ST0_HA		0x04		/* Head (Address) */
43607ca46eSDavid Howells #define ST0_NR		0x08		/* Not Ready */
44607ca46eSDavid Howells #define ST0_ECE		0x10		/* Equipment check error */
45607ca46eSDavid Howells #define ST0_SE		0x20		/* Seek end */
46607ca46eSDavid Howells #define ST0_INTR	0xC0		/* Interrupt code mask */
47607ca46eSDavid Howells 
48607ca46eSDavid Howells /* Bits of FD_ST1 */
49607ca46eSDavid Howells #define ST1_MAM		0x01		/* Missing Address Mark */
50607ca46eSDavid Howells #define ST1_WP		0x02		/* Write Protect */
51607ca46eSDavid Howells #define ST1_ND		0x04		/* No Data - unreadable */
52607ca46eSDavid Howells #define ST1_OR		0x10		/* OverRun */
53607ca46eSDavid Howells #define ST1_CRC		0x20		/* CRC error in data or addr */
54607ca46eSDavid Howells #define ST1_EOC		0x80		/* End Of Cylinder */
55607ca46eSDavid Howells 
56607ca46eSDavid Howells /* Bits of FD_ST2 */
57607ca46eSDavid Howells #define ST2_MAM		0x01		/* Missing Address Mark (again) */
58607ca46eSDavid Howells #define ST2_BC		0x02		/* Bad Cylinder */
59607ca46eSDavid Howells #define ST2_SNS		0x04		/* Scan Not Satisfied */
60607ca46eSDavid Howells #define ST2_SEH		0x08		/* Scan Equal Hit */
61607ca46eSDavid Howells #define ST2_WC		0x10		/* Wrong Cylinder */
62607ca46eSDavid Howells #define ST2_CRC		0x20		/* CRC error in data field */
63607ca46eSDavid Howells #define ST2_CM		0x40		/* Control Mark = deleted */
64607ca46eSDavid Howells 
65607ca46eSDavid Howells /* Bits of FD_ST3 */
66607ca46eSDavid Howells #define ST3_HA		0x04		/* Head (Address) */
67607ca46eSDavid Howells #define ST3_DS		0x08		/* drive is double-sided */
68607ca46eSDavid Howells #define ST3_TZ		0x10		/* Track Zero signal (1=track 0) */
69607ca46eSDavid Howells #define ST3_RY		0x20		/* drive is ready */
70607ca46eSDavid Howells #define ST3_WP		0x40		/* Write Protect */
71607ca46eSDavid Howells #define ST3_FT		0x80		/* Drive Fault */
72607ca46eSDavid Howells 
73607ca46eSDavid Howells /* Values for FD_COMMAND */
74607ca46eSDavid Howells #define FD_RECALIBRATE		0x07	/* move to track 0 */
75607ca46eSDavid Howells #define FD_SEEK			0x0F	/* seek track */
76607ca46eSDavid Howells #define FD_READ			0xE6	/* read with MT, MFM, SKip deleted */
77607ca46eSDavid Howells #define FD_WRITE		0xC5	/* write with MT, MFM */
78607ca46eSDavid Howells #define FD_SENSEI		0x08	/* Sense Interrupt Status */
79607ca46eSDavid Howells #define FD_SPECIFY		0x03	/* specify HUT etc */
80607ca46eSDavid Howells #define FD_FORMAT		0x4D	/* format one track */
81607ca46eSDavid Howells #define FD_VERSION		0x10	/* get version code */
82607ca46eSDavid Howells #define FD_CONFIGURE		0x13	/* configure FIFO operation */
83607ca46eSDavid Howells #define FD_PERPENDICULAR	0x12	/* perpendicular r/w mode */
84607ca46eSDavid Howells #define FD_GETSTATUS		0x04	/* read ST3 */
85607ca46eSDavid Howells #define FD_DUMPREGS		0x0E	/* dump the contents of the fdc regs */
86607ca46eSDavid Howells #define FD_READID		0xEA	/* prints the header of a sector */
87607ca46eSDavid Howells #define FD_UNLOCK		0x14	/* Fifo config unlock */
88607ca46eSDavid Howells #define FD_LOCK			0x94	/* Fifo config lock */
89607ca46eSDavid Howells #define FD_RSEEK_OUT		0x8f	/* seek out (i.e. to lower tracks) */
90607ca46eSDavid Howells #define FD_RSEEK_IN		0xcf	/* seek in (i.e. to higher tracks) */
91607ca46eSDavid Howells 
92607ca46eSDavid Howells /* the following commands are new in the 82078. They are not used in the
93607ca46eSDavid Howells  * floppy driver, except the first three. These commands may be useful for apps
94607ca46eSDavid Howells  * which use the FDRAWCMD interface. For doc, get the 82078 spec sheets at
95607ca46eSDavid Howells  * http://www.intel.com/design/archives/periphrl/docs/29046803.htm */
96607ca46eSDavid Howells 
97607ca46eSDavid Howells #define FD_PARTID		0x18	/* part id ("extended" version cmd) */
98607ca46eSDavid Howells #define FD_SAVE			0x2e	/* save fdc regs for later restore */
99607ca46eSDavid Howells #define FD_DRIVESPEC		0x8e	/* drive specification: Access to the
100607ca46eSDavid Howells 					 * 2 Mbps data transfer rate for tape
101607ca46eSDavid Howells 					 * drives */
102607ca46eSDavid Howells 
103607ca46eSDavid Howells #define FD_RESTORE		0x4e    /* later restore */
104607ca46eSDavid Howells #define FD_POWERDOWN		0x27	/* configure FDC's powersave features */
105607ca46eSDavid Howells #define FD_FORMAT_N_WRITE	0xef    /* format and write in one go. */
106607ca46eSDavid Howells #define FD_OPTION		0x33	/* ISO format (which is a clean way to
107607ca46eSDavid Howells 					 * pack more sectors on a track) */
108607ca46eSDavid Howells 
109607ca46eSDavid Howells /* DMA commands */
110607ca46eSDavid Howells #define DMA_READ	0x46
111607ca46eSDavid Howells #define DMA_WRITE	0x4A
112607ca46eSDavid Howells 
113607ca46eSDavid Howells /* FDC version return types */
114607ca46eSDavid Howells #define FDC_NONE	0x00
115607ca46eSDavid Howells #define FDC_UNKNOWN	0x10	/* DO NOT USE THIS TYPE EXCEPT IF IDENTIFICATION
116607ca46eSDavid Howells 				   FAILS EARLY */
117607ca46eSDavid Howells #define FDC_8272A	0x20	/* Intel 8272a, NEC 765 */
118607ca46eSDavid Howells #define FDC_765ED	0x30	/* Non-Intel 1MB-compatible FDC, can't detect */
119607ca46eSDavid Howells #define FDC_82072	0x40	/* Intel 82072; 8272a + FIFO + DUMPREGS */
120607ca46eSDavid Howells #define FDC_82072A	0x45	/* 82072A (on Sparcs) */
121607ca46eSDavid Howells #define FDC_82077_ORIG	0x51	/* Original version of 82077AA, sans LOCK */
122607ca46eSDavid Howells #define FDC_82077	0x52	/* 82077AA-1 */
123607ca46eSDavid Howells #define FDC_82078_UNKN	0x5f	/* Unknown 82078 variant */
124607ca46eSDavid Howells #define FDC_82078	0x60	/* 44pin 82078 or 64pin 82078SL */
125607ca46eSDavid Howells #define FDC_82078_1	0x61	/* 82078-1 (2Mbps fdc) */
126607ca46eSDavid Howells #define FDC_S82078B	0x62	/* S82078B (first seen on Adaptec AVA-2825 VLB
127607ca46eSDavid Howells 				 * SCSI/EIDE/Floppy controller) */
128607ca46eSDavid Howells #define FDC_87306	0x63	/* National Semiconductor PC 87306 */
129607ca46eSDavid Howells 
130607ca46eSDavid Howells /*
131607ca46eSDavid Howells  * Beware: the fdc type list is roughly sorted by increasing features.
132607ca46eSDavid Howells  * Presence of features is tested by comparing the FDC version id with the
133607ca46eSDavid Howells  * "oldest" version that has the needed feature.
134607ca46eSDavid Howells  * If during FDC detection, an obscure test fails late in the sequence, don't
135607ca46eSDavid Howells  * assign FDC_UNKNOWN. Else the FDC will be treated as a dumb 8272a, or worse.
136607ca46eSDavid Howells  * This is especially true if the tests are unneeded.
137607ca46eSDavid Howells  */
138607ca46eSDavid Howells 
139607ca46eSDavid Howells #define FD_RESET_DELAY 20
140607ca46eSDavid Howells #endif
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