xref: /linux/include/uapi/drm/panfrost_drm.h (revision af873fcecef567abf8a3468b06dd4e4aab46da6d)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2014-2018 Broadcom
4  * Copyright © 2019 Collabora ltd.
5  */
6 #ifndef _PANFROST_DRM_H_
7 #define _PANFROST_DRM_H_
8 
9 #include "drm.h"
10 
11 #if defined(__cplusplus)
12 extern "C" {
13 #endif
14 
15 #define DRM_PANFROST_SUBMIT			0x00
16 #define DRM_PANFROST_WAIT_BO			0x01
17 #define DRM_PANFROST_CREATE_BO			0x02
18 #define DRM_PANFROST_MMAP_BO			0x03
19 #define DRM_PANFROST_GET_PARAM			0x04
20 #define DRM_PANFROST_GET_BO_OFFSET		0x05
21 
22 #define DRM_IOCTL_PANFROST_SUBMIT		DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_SUBMIT, struct drm_panfrost_submit)
23 #define DRM_IOCTL_PANFROST_WAIT_BO		DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_WAIT_BO, struct drm_panfrost_wait_bo)
24 #define DRM_IOCTL_PANFROST_CREATE_BO		DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_CREATE_BO, struct drm_panfrost_create_bo)
25 #define DRM_IOCTL_PANFROST_MMAP_BO		DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_MMAP_BO, struct drm_panfrost_mmap_bo)
26 #define DRM_IOCTL_PANFROST_GET_PARAM		DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_PARAM, struct drm_panfrost_get_param)
27 #define DRM_IOCTL_PANFROST_GET_BO_OFFSET	DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_BO_OFFSET, struct drm_panfrost_get_bo_offset)
28 
29 #define PANFROST_JD_REQ_FS (1 << 0)
30 /**
31  * struct drm_panfrost_submit - ioctl argument for submitting commands to the 3D
32  * engine.
33  *
34  * This asks the kernel to have the GPU execute a render command list.
35  */
36 struct drm_panfrost_submit {
37 
38 	/** Address to GPU mapping of job descriptor */
39 	__u64 jc;
40 
41 	/** An optional array of sync objects to wait on before starting this job. */
42 	__u64 in_syncs;
43 
44 	/** Number of sync objects to wait on before starting this job. */
45 	__u32 in_sync_count;
46 
47 	/** An optional sync object to place the completion fence in. */
48 	__u32 out_sync;
49 
50 	/** Pointer to a u32 array of the BOs that are referenced by the job. */
51 	__u64 bo_handles;
52 
53 	/** Number of BO handles passed in (size is that times 4). */
54 	__u32 bo_handle_count;
55 
56 	/** A combination of PANFROST_JD_REQ_* */
57 	__u32 requirements;
58 };
59 
60 /**
61  * struct drm_panfrost_wait_bo - ioctl argument for waiting for
62  * completion of the last DRM_PANFROST_SUBMIT on a BO.
63  *
64  * This is useful for cases where multiple processes might be
65  * rendering to a BO and you want to wait for all rendering to be
66  * completed.
67  */
68 struct drm_panfrost_wait_bo {
69 	__u32 handle;
70 	__u32 pad;
71 	__s64 timeout_ns;	/* absolute */
72 };
73 
74 /**
75  * struct drm_panfrost_create_bo - ioctl argument for creating Panfrost BOs.
76  *
77  * There are currently no values for the flags argument, but it may be
78  * used in a future extension.
79  */
80 struct drm_panfrost_create_bo {
81 	__u32 size;
82 	__u32 flags;
83 	/** Returned GEM handle for the BO. */
84 	__u32 handle;
85 	/* Pad, must be zero-filled. */
86 	__u32 pad;
87 	/**
88 	 * Returned offset for the BO in the GPU address space.  This offset
89 	 * is private to the DRM fd and is valid for the lifetime of the GEM
90 	 * handle.
91 	 *
92 	 * This offset value will always be nonzero, since various HW
93 	 * units treat 0 specially.
94 	 */
95 	__u64 offset;
96 };
97 
98 /**
99  * struct drm_panfrost_mmap_bo - ioctl argument for mapping Panfrost BOs.
100  *
101  * This doesn't actually perform an mmap.  Instead, it returns the
102  * offset you need to use in an mmap on the DRM device node.  This
103  * means that tools like valgrind end up knowing about the mapped
104  * memory.
105  *
106  * There are currently no values for the flags argument, but it may be
107  * used in a future extension.
108  */
109 struct drm_panfrost_mmap_bo {
110 	/** Handle for the object being mapped. */
111 	__u32 handle;
112 	__u32 flags;
113 	/** offset into the drm node to use for subsequent mmap call. */
114 	__u64 offset;
115 };
116 
117 enum drm_panfrost_param {
118 	DRM_PANFROST_PARAM_GPU_PROD_ID,
119 };
120 
121 struct drm_panfrost_get_param {
122 	__u32 param;
123 	__u32 pad;
124 	__u64 value;
125 };
126 
127 /**
128  * Returns the offset for the BO in the GPU address space for this DRM fd.
129  * This is the same value returned by drm_panfrost_create_bo, if that was called
130  * from this DRM fd.
131  */
132 struct drm_panfrost_get_bo_offset {
133 	__u32 handle;
134 	__u32 pad;
135 	__u64 offset;
136 };
137 
138 #if defined(__cplusplus)
139 }
140 #endif
141 
142 #endif /* _PANFROST_DRM_H_ */
143