1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * include/uapi/drm/omap_drm.h 4 * 5 * Copyright (C) 2011 Texas Instruments 6 * Author: Rob Clark <rob@ti.com> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 as published by 10 * the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program. If not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #ifndef __OMAP_DRM_H__ 22 #define __OMAP_DRM_H__ 23 24 #include "drm.h" 25 26 #if defined(__cplusplus) 27 extern "C" { 28 #endif 29 30 /* Please note that modifications to all structs defined here are 31 * subject to backwards-compatibility constraints. 32 */ 33 34 #define OMAP_PARAM_CHIPSET_ID 1 /* ie. 0x3430, 0x4430, etc */ 35 36 struct drm_omap_param { 37 __u64 param; /* in */ 38 __u64 value; /* in (set_param), out (get_param) */ 39 }; 40 41 /* Scanout buffer, consumable by DSS */ 42 #define OMAP_BO_SCANOUT 0x00000001 43 44 /* Buffer CPU caching mode: cached, write-combining or uncached. */ 45 #define OMAP_BO_CACHED 0x00000000 46 #define OMAP_BO_WC 0x00000002 47 #define OMAP_BO_UNCACHED 0x00000004 48 #define OMAP_BO_CACHE_MASK 0x00000006 49 50 /* Force allocation from contiguous DMA memory */ 51 #define OMAP_BO_MEM_CONTIG 0x00000008 52 53 /* Force allocation via DMM */ 54 #define OMAP_BO_MEM_DMM 0x00000010 55 56 /* Pin the buffer when allocating and keep pinned */ 57 #define OMAP_BO_MEM_PIN 0x00000020 58 59 /* Use TILER for the buffer. The TILER container unit can be 8, 16 or 32 bits. */ 60 #define OMAP_BO_TILED_8 0x00000100 61 #define OMAP_BO_TILED_16 0x00000200 62 #define OMAP_BO_TILED_32 0x00000300 63 #define OMAP_BO_TILED_MASK 0x00000f00 64 65 union omap_gem_size { 66 __u32 bytes; /* (for non-tiled formats) */ 67 struct { 68 __u16 width; 69 __u16 height; 70 } tiled; /* (for tiled formats) */ 71 }; 72 73 struct drm_omap_gem_new { 74 union omap_gem_size size; /* in */ 75 __u32 flags; /* in */ 76 __u32 handle; /* out */ 77 __u32 __pad; 78 }; 79 80 /* mask of operations: */ 81 enum omap_gem_op { 82 OMAP_GEM_READ = 0x01, 83 OMAP_GEM_WRITE = 0x02, 84 }; 85 86 struct drm_omap_gem_cpu_prep { 87 __u32 handle; /* buffer handle (in) */ 88 __u32 op; /* mask of omap_gem_op (in) */ 89 }; 90 91 struct drm_omap_gem_cpu_fini { 92 __u32 handle; /* buffer handle (in) */ 93 __u32 op; /* mask of omap_gem_op (in) */ 94 /* TODO maybe here we pass down info about what regions are touched 95 * by sw so we can be clever about cache ops? For now a placeholder, 96 * set to zero and we just do full buffer flush.. 97 */ 98 __u32 nregions; 99 __u32 __pad; 100 }; 101 102 struct drm_omap_gem_info { 103 __u32 handle; /* buffer handle (in) */ 104 __u32 pad; 105 __u64 offset; /* mmap offset (out) */ 106 /* note: in case of tiled buffers, the user virtual size can be 107 * different from the physical size (ie. how many pages are needed 108 * to back the object) which is returned in DRM_IOCTL_GEM_OPEN.. 109 * This size here is the one that should be used if you want to 110 * mmap() the buffer: 111 */ 112 __u32 size; /* virtual size for mmap'ing (out) */ 113 __u32 __pad; 114 }; 115 116 #define DRM_OMAP_GET_PARAM 0x00 117 #define DRM_OMAP_SET_PARAM 0x01 118 #define DRM_OMAP_GEM_NEW 0x03 119 #define DRM_OMAP_GEM_CPU_PREP 0x04 /* Deprecated, to be removed */ 120 #define DRM_OMAP_GEM_CPU_FINI 0x05 /* Deprecated, to be removed */ 121 #define DRM_OMAP_GEM_INFO 0x06 122 #define DRM_OMAP_NUM_IOCTLS 0x07 123 124 #define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param) 125 #define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param) 126 #define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new) 127 #define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep) 128 #define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini) 129 #define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info) 130 131 #if defined(__cplusplus) 132 } 133 #endif 134 135 #endif /* __OMAP_DRM_H__ */ 136