1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Header for the Direct Rendering Manager 4 * 5 * Author: Rickard E. (Rik) Faith <faith@valinux.com> 6 * 7 * Acknowledgments: 8 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg. 9 */ 10 11 /* 12 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 14 * All rights reserved. 15 */ 16 17 #ifndef _DRM_H_ 18 #define _DRM_H_ 19 20 #if defined(__KERNEL__) 21 22 #include <linux/types.h> 23 #include <asm/ioctl.h> 24 typedef unsigned int drm_handle_t; 25 26 #elif defined(__linux__) 27 28 #include <linux/types.h> 29 #include <asm/ioctl.h> 30 typedef unsigned int drm_handle_t; 31 32 #else /* One of the BSDs */ 33 34 #include <stdint.h> 35 #include <sys/ioccom.h> 36 #include <sys/types.h> 37 typedef int8_t __s8; 38 typedef uint8_t __u8; 39 typedef int16_t __s16; 40 typedef uint16_t __u16; 41 typedef int32_t __s32; 42 typedef uint32_t __u32; 43 typedef int64_t __s64; 44 typedef uint64_t __u64; 45 typedef size_t __kernel_size_t; 46 typedef unsigned long drm_handle_t; 47 48 #endif 49 50 #if defined(__cplusplus) 51 extern "C" { 52 #endif 53 54 #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ 55 #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ 56 #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ 57 #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ 58 59 #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ 60 #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ 61 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 62 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 63 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 64 65 typedef unsigned int drm_context_t; 66 typedef unsigned int drm_drawable_t; 67 typedef unsigned int drm_magic_t; 68 69 /* 70 * Cliprect. 71 * 72 * \warning: If you change this structure, make sure you change 73 * XF86DRIClipRectRec in the server as well 74 * 75 * \note KW: Actually it's illegal to change either for 76 * backwards-compatibility reasons. 77 */ 78 struct drm_clip_rect { 79 unsigned short x1; 80 unsigned short y1; 81 unsigned short x2; 82 unsigned short y2; 83 }; 84 85 /* 86 * Drawable information. 87 */ 88 struct drm_drawable_info { 89 unsigned int num_rects; 90 struct drm_clip_rect *rects; 91 }; 92 93 /* 94 * Texture region, 95 */ 96 struct drm_tex_region { 97 unsigned char next; 98 unsigned char prev; 99 unsigned char in_use; 100 unsigned char padding; 101 unsigned int age; 102 }; 103 104 /* 105 * Hardware lock. 106 * 107 * The lock structure is a simple cache-line aligned integer. To avoid 108 * processor bus contention on a multiprocessor system, there should not be any 109 * other data stored in the same cache line. 110 */ 111 struct drm_hw_lock { 112 __volatile__ unsigned int lock; /**< lock variable */ 113 char padding[60]; /**< Pad to cache line */ 114 }; 115 116 /* 117 * DRM_IOCTL_VERSION ioctl argument type. 118 * 119 * \sa drmGetVersion(). 120 */ 121 struct drm_version { 122 int version_major; /**< Major version */ 123 int version_minor; /**< Minor version */ 124 int version_patchlevel; /**< Patch level */ 125 __kernel_size_t name_len; /**< Length of name buffer */ 126 char __user *name; /**< Name of driver */ 127 __kernel_size_t date_len; /**< Length of date buffer */ 128 char __user *date; /**< User-space buffer to hold date */ 129 __kernel_size_t desc_len; /**< Length of desc buffer */ 130 char __user *desc; /**< User-space buffer to hold desc */ 131 }; 132 133 /* 134 * DRM_IOCTL_GET_UNIQUE ioctl argument type. 135 * 136 * \sa drmGetBusid() and drmSetBusId(). 137 */ 138 struct drm_unique { 139 __kernel_size_t unique_len; /**< Length of unique */ 140 char __user *unique; /**< Unique name for driver instantiation */ 141 }; 142 143 struct drm_list { 144 int count; /**< Length of user-space structures */ 145 struct drm_version __user *version; 146 }; 147 148 struct drm_block { 149 int unused; 150 }; 151 152 /* 153 * DRM_IOCTL_CONTROL ioctl argument type. 154 * 155 * \sa drmCtlInstHandler() and drmCtlUninstHandler(). 156 */ 157 struct drm_control { 158 enum { 159 DRM_ADD_COMMAND, 160 DRM_RM_COMMAND, 161 DRM_INST_HANDLER, 162 DRM_UNINST_HANDLER 163 } func; 164 int irq; 165 }; 166 167 /* 168 * Type of memory to map. 169 */ 170 enum drm_map_type { 171 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ 172 _DRM_REGISTERS = 1, /**< no caching, no core dump */ 173 _DRM_SHM = 2, /**< shared, cached */ 174 _DRM_AGP = 3, /**< AGP/GART */ 175 _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ 176 _DRM_CONSISTENT = 5 /**< Consistent memory for PCI DMA */ 177 }; 178 179 /* 180 * Memory mapping flags. 181 */ 182 enum drm_map_flags { 183 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ 184 _DRM_READ_ONLY = 0x02, 185 _DRM_LOCKED = 0x04, /**< shared, cached, locked */ 186 _DRM_KERNEL = 0x08, /**< kernel requires access */ 187 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ 188 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ 189 _DRM_REMOVABLE = 0x40, /**< Removable mapping */ 190 _DRM_DRIVER = 0x80 /**< Managed by driver */ 191 }; 192 193 struct drm_ctx_priv_map { 194 unsigned int ctx_id; /**< Context requesting private mapping */ 195 void *handle; /**< Handle of map */ 196 }; 197 198 /* 199 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls 200 * argument type. 201 * 202 * \sa drmAddMap(). 203 */ 204 struct drm_map { 205 unsigned long offset; /**< Requested physical address (0 for SAREA)*/ 206 unsigned long size; /**< Requested physical size (bytes) */ 207 enum drm_map_type type; /**< Type of memory to map */ 208 enum drm_map_flags flags; /**< Flags */ 209 void *handle; /**< User-space: "Handle" to pass to mmap() */ 210 /**< Kernel-space: kernel-virtual address */ 211 int mtrr; /**< MTRR slot used */ 212 /* Private data */ 213 }; 214 215 /* 216 * DRM_IOCTL_GET_CLIENT ioctl argument type. 217 */ 218 struct drm_client { 219 int idx; /**< Which client desired? */ 220 int auth; /**< Is client authenticated? */ 221 unsigned long pid; /**< Process ID */ 222 unsigned long uid; /**< User ID */ 223 unsigned long magic; /**< Magic */ 224 unsigned long iocs; /**< Ioctl count */ 225 }; 226 227 enum drm_stat_type { 228 _DRM_STAT_LOCK, 229 _DRM_STAT_OPENS, 230 _DRM_STAT_CLOSES, 231 _DRM_STAT_IOCTLS, 232 _DRM_STAT_LOCKS, 233 _DRM_STAT_UNLOCKS, 234 _DRM_STAT_VALUE, /**< Generic value */ 235 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ 236 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ 237 238 _DRM_STAT_IRQ, /**< IRQ */ 239 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ 240 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ 241 _DRM_STAT_DMA, /**< DMA */ 242 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ 243 _DRM_STAT_MISSED /**< Missed DMA opportunity */ 244 /* Add to the *END* of the list */ 245 }; 246 247 /* 248 * DRM_IOCTL_GET_STATS ioctl argument type. 249 */ 250 struct drm_stats { 251 unsigned long count; 252 struct { 253 unsigned long value; 254 enum drm_stat_type type; 255 } data[15]; 256 }; 257 258 /* 259 * Hardware locking flags. 260 */ 261 enum drm_lock_flags { 262 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ 263 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ 264 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ 265 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ 266 /* These *HALT* flags aren't supported yet 267 -- they will be used to support the 268 full-screen DGA-like mode. */ 269 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ 270 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ 271 }; 272 273 /* 274 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. 275 * 276 * \sa drmGetLock() and drmUnlock(). 277 */ 278 struct drm_lock { 279 int context; 280 enum drm_lock_flags flags; 281 }; 282 283 /* 284 * DMA flags 285 * 286 * \warning 287 * These values \e must match xf86drm.h. 288 * 289 * \sa drm_dma. 290 */ 291 enum drm_dma_flags { 292 /* Flags for DMA buffer dispatch */ 293 _DRM_DMA_BLOCK = 0x01, /**< 294 * Block until buffer dispatched. 295 * 296 * \note The buffer may not yet have 297 * been processed by the hardware -- 298 * getting a hardware lock with the 299 * hardware quiescent will ensure 300 * that the buffer has been 301 * processed. 302 */ 303 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ 304 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ 305 306 /* Flags for DMA buffer request */ 307 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ 308 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ 309 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ 310 }; 311 312 /* 313 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. 314 * 315 * \sa drmAddBufs(). 316 */ 317 struct drm_buf_desc { 318 int count; /**< Number of buffers of this size */ 319 int size; /**< Size in bytes */ 320 int low_mark; /**< Low water mark */ 321 int high_mark; /**< High water mark */ 322 enum { 323 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ 324 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ 325 _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ 326 _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */ 327 _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */ 328 } flags; 329 unsigned long agp_start; /**< 330 * Start address of where the AGP buffers are 331 * in the AGP aperture 332 */ 333 }; 334 335 /* 336 * DRM_IOCTL_INFO_BUFS ioctl argument type. 337 */ 338 struct drm_buf_info { 339 int count; /**< Entries in list */ 340 struct drm_buf_desc __user *list; 341 }; 342 343 /* 344 * DRM_IOCTL_FREE_BUFS ioctl argument type. 345 */ 346 struct drm_buf_free { 347 int count; 348 int __user *list; 349 }; 350 351 /* 352 * Buffer information 353 * 354 * \sa drm_buf_map. 355 */ 356 struct drm_buf_pub { 357 int idx; /**< Index into the master buffer list */ 358 int total; /**< Buffer size */ 359 int used; /**< Amount of buffer in use (for DMA) */ 360 void __user *address; /**< Address of buffer */ 361 }; 362 363 /* 364 * DRM_IOCTL_MAP_BUFS ioctl argument type. 365 */ 366 struct drm_buf_map { 367 int count; /**< Length of the buffer list */ 368 #ifdef __cplusplus 369 void __user *virt; 370 #else 371 void __user *virtual; /**< Mmap'd area in user-virtual */ 372 #endif 373 struct drm_buf_pub __user *list; /**< Buffer information */ 374 }; 375 376 /* 377 * DRM_IOCTL_DMA ioctl argument type. 378 * 379 * Indices here refer to the offset into the buffer list in drm_buf_get. 380 * 381 * \sa drmDMA(). 382 */ 383 struct drm_dma { 384 int context; /**< Context handle */ 385 int send_count; /**< Number of buffers to send */ 386 int __user *send_indices; /**< List of handles to buffers */ 387 int __user *send_sizes; /**< Lengths of data to send */ 388 enum drm_dma_flags flags; /**< Flags */ 389 int request_count; /**< Number of buffers requested */ 390 int request_size; /**< Desired size for buffers */ 391 int __user *request_indices; /**< Buffer information */ 392 int __user *request_sizes; 393 int granted_count; /**< Number of buffers granted */ 394 }; 395 396 enum drm_ctx_flags { 397 _DRM_CONTEXT_PRESERVED = 0x01, 398 _DRM_CONTEXT_2DONLY = 0x02 399 }; 400 401 /* 402 * DRM_IOCTL_ADD_CTX ioctl argument type. 403 * 404 * \sa drmCreateContext() and drmDestroyContext(). 405 */ 406 struct drm_ctx { 407 drm_context_t handle; 408 enum drm_ctx_flags flags; 409 }; 410 411 /* 412 * DRM_IOCTL_RES_CTX ioctl argument type. 413 */ 414 struct drm_ctx_res { 415 int count; 416 struct drm_ctx __user *contexts; 417 }; 418 419 /* 420 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. 421 */ 422 struct drm_draw { 423 drm_drawable_t handle; 424 }; 425 426 /* 427 * DRM_IOCTL_UPDATE_DRAW ioctl argument type. 428 */ 429 typedef enum { 430 DRM_DRAWABLE_CLIPRECTS 431 } drm_drawable_info_type_t; 432 433 struct drm_update_draw { 434 drm_drawable_t handle; 435 unsigned int type; 436 unsigned int num; 437 unsigned long long data; 438 }; 439 440 /* 441 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. 442 */ 443 struct drm_auth { 444 drm_magic_t magic; 445 }; 446 447 /* 448 * DRM_IOCTL_IRQ_BUSID ioctl argument type. 449 * 450 * \sa drmGetInterruptFromBusID(). 451 */ 452 struct drm_irq_busid { 453 int irq; /**< IRQ number */ 454 int busnum; /**< bus number */ 455 int devnum; /**< device number */ 456 int funcnum; /**< function number */ 457 }; 458 459 enum drm_vblank_seq_type { 460 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 461 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 462 /* bits 1-6 are reserved for high crtcs */ 463 _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e, 464 _DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */ 465 _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ 466 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ 467 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ 468 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */ 469 }; 470 #define _DRM_VBLANK_HIGH_CRTC_SHIFT 1 471 472 #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE) 473 #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \ 474 _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS) 475 476 struct drm_wait_vblank_request { 477 enum drm_vblank_seq_type type; 478 unsigned int sequence; 479 unsigned long signal; 480 }; 481 482 struct drm_wait_vblank_reply { 483 enum drm_vblank_seq_type type; 484 unsigned int sequence; 485 long tval_sec; 486 long tval_usec; 487 }; 488 489 /* 490 * DRM_IOCTL_WAIT_VBLANK ioctl argument type. 491 * 492 * \sa drmWaitVBlank(). 493 */ 494 union drm_wait_vblank { 495 struct drm_wait_vblank_request request; 496 struct drm_wait_vblank_reply reply; 497 }; 498 499 #define _DRM_PRE_MODESET 1 500 #define _DRM_POST_MODESET 2 501 502 /* 503 * DRM_IOCTL_MODESET_CTL ioctl argument type 504 * 505 * \sa drmModesetCtl(). 506 */ 507 struct drm_modeset_ctl { 508 __u32 crtc; 509 __u32 cmd; 510 }; 511 512 /* 513 * DRM_IOCTL_AGP_ENABLE ioctl argument type. 514 * 515 * \sa drmAgpEnable(). 516 */ 517 struct drm_agp_mode { 518 unsigned long mode; /**< AGP mode */ 519 }; 520 521 /* 522 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. 523 * 524 * \sa drmAgpAlloc() and drmAgpFree(). 525 */ 526 struct drm_agp_buffer { 527 unsigned long size; /**< In bytes -- will round to page boundary */ 528 unsigned long handle; /**< Used for binding / unbinding */ 529 unsigned long type; /**< Type of memory to allocate */ 530 unsigned long physical; /**< Physical used by i810 */ 531 }; 532 533 /* 534 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. 535 * 536 * \sa drmAgpBind() and drmAgpUnbind(). 537 */ 538 struct drm_agp_binding { 539 unsigned long handle; /**< From drm_agp_buffer */ 540 unsigned long offset; /**< In bytes -- will round to page boundary */ 541 }; 542 543 /* 544 * DRM_IOCTL_AGP_INFO ioctl argument type. 545 * 546 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), 547 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), 548 * drmAgpVendorId() and drmAgpDeviceId(). 549 */ 550 struct drm_agp_info { 551 int agp_version_major; 552 int agp_version_minor; 553 unsigned long mode; 554 unsigned long aperture_base; /* physical address */ 555 unsigned long aperture_size; /* bytes */ 556 unsigned long memory_allowed; /* bytes */ 557 unsigned long memory_used; 558 559 /* PCI information */ 560 unsigned short id_vendor; 561 unsigned short id_device; 562 }; 563 564 /* 565 * DRM_IOCTL_SG_ALLOC ioctl argument type. 566 */ 567 struct drm_scatter_gather { 568 unsigned long size; /**< In bytes -- will round to page boundary */ 569 unsigned long handle; /**< Used for mapping / unmapping */ 570 }; 571 572 /* 573 * DRM_IOCTL_SET_VERSION ioctl argument type. 574 */ 575 struct drm_set_version { 576 int drm_di_major; 577 int drm_di_minor; 578 int drm_dd_major; 579 int drm_dd_minor; 580 }; 581 582 /** 583 * struct drm_gem_close - Argument for &DRM_IOCTL_GEM_CLOSE ioctl. 584 * @handle: Handle of the object to be closed. 585 * @pad: Padding. 586 * 587 * Releases the handle to an mm object. 588 */ 589 struct drm_gem_close { 590 __u32 handle; 591 __u32 pad; 592 }; 593 594 /** 595 * struct drm_gem_flink - Argument for &DRM_IOCTL_GEM_FLINK ioctl. 596 * @handle: Handle for the object being named. 597 * @name: Returned global name. 598 * 599 * Create a global name for an object, returning the name. 600 * 601 * Note that the name does not hold a reference; when the object 602 * is freed, the name goes away. 603 */ 604 struct drm_gem_flink { 605 __u32 handle; 606 __u32 name; 607 }; 608 609 /** 610 * struct drm_gem_open - Argument for &DRM_IOCTL_GEM_OPEN ioctl. 611 * @name: Name of object being opened. 612 * @handle: Returned handle for the object. 613 * @size: Returned size of the object 614 * 615 * Open an object using the global name, returning a handle and the size. 616 * 617 * This handle (of course) holds a reference to the object, so the object 618 * will not go away until the handle is deleted. 619 */ 620 struct drm_gem_open { 621 __u32 name; 622 __u32 handle; 623 __u64 size; 624 }; 625 626 /** 627 * struct drm_gem_change_handle - Argument for &DRM_IOCTL_GEM_CHANGE_HANDLE ioctl. 628 * @handle: The handle of a gem object. 629 * @new_handle: An available gem handle. 630 * 631 * This ioctl changes the handle of a GEM object to the specified one. 632 * The new handle must be unused. On success the old handle is closed 633 * and all further IOCTL should refer to the new handle only. 634 * Calls to DRM_IOCTL_PRIME_FD_TO_HANDLE will return the new handle. 635 */ 636 struct drm_gem_change_handle { 637 __u32 handle; 638 __u32 new_handle; 639 }; 640 641 /** 642 * DRM_CAP_DUMB_BUFFER 643 * 644 * If set to 1, the driver supports creating dumb buffers via the 645 * &DRM_IOCTL_MODE_CREATE_DUMB ioctl. 646 */ 647 #define DRM_CAP_DUMB_BUFFER 0x1 648 /** 649 * DRM_CAP_VBLANK_HIGH_CRTC 650 * 651 * If set to 1, the kernel supports specifying a :ref:`CRTC index<crtc_index>` 652 * in the high bits of &drm_wait_vblank_request.type. 653 * 654 * Starting kernel version 2.6.39, this capability is always set to 1. 655 */ 656 #define DRM_CAP_VBLANK_HIGH_CRTC 0x2 657 /** 658 * DRM_CAP_DUMB_PREFERRED_DEPTH 659 * 660 * The preferred bit depth for dumb buffers. 661 * 662 * The bit depth is the number of bits used to indicate the color of a single 663 * pixel excluding any padding. This is different from the number of bits per 664 * pixel. For instance, XRGB8888 has a bit depth of 24 but has 32 bits per 665 * pixel. 666 * 667 * Note that this preference only applies to dumb buffers, it's irrelevant for 668 * other types of buffers. 669 */ 670 #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 671 /** 672 * DRM_CAP_DUMB_PREFER_SHADOW 673 * 674 * If set to 1, the driver prefers userspace to render to a shadow buffer 675 * instead of directly rendering to a dumb buffer. For best speed, userspace 676 * should do streaming ordered memory copies into the dumb buffer and never 677 * read from it. 678 * 679 * Note that this preference only applies to dumb buffers, it's irrelevant for 680 * other types of buffers. 681 */ 682 #define DRM_CAP_DUMB_PREFER_SHADOW 0x4 683 /** 684 * DRM_CAP_PRIME 685 * 686 * Bitfield of supported PRIME sharing capabilities. See &DRM_PRIME_CAP_IMPORT 687 * and &DRM_PRIME_CAP_EXPORT. 688 * 689 * Starting from kernel version 6.6, both &DRM_PRIME_CAP_IMPORT and 690 * &DRM_PRIME_CAP_EXPORT are always advertised. 691 * 692 * PRIME buffers are exposed as dma-buf file descriptors. 693 * See :ref:`prime_buffer_sharing`. 694 */ 695 #define DRM_CAP_PRIME 0x5 696 /** 697 * DRM_PRIME_CAP_IMPORT 698 * 699 * If this bit is set in &DRM_CAP_PRIME, the driver supports importing PRIME 700 * buffers via the &DRM_IOCTL_PRIME_FD_TO_HANDLE ioctl. 701 * 702 * Starting from kernel version 6.6, this bit is always set in &DRM_CAP_PRIME. 703 */ 704 #define DRM_PRIME_CAP_IMPORT 0x1 705 /** 706 * DRM_PRIME_CAP_EXPORT 707 * 708 * If this bit is set in &DRM_CAP_PRIME, the driver supports exporting PRIME 709 * buffers via the &DRM_IOCTL_PRIME_HANDLE_TO_FD ioctl. 710 * 711 * Starting from kernel version 6.6, this bit is always set in &DRM_CAP_PRIME. 712 */ 713 #define DRM_PRIME_CAP_EXPORT 0x2 714 /** 715 * DRM_CAP_TIMESTAMP_MONOTONIC 716 * 717 * If set to 0, the kernel will report timestamps with ``CLOCK_REALTIME`` in 718 * struct drm_event_vblank. If set to 1, the kernel will report timestamps with 719 * ``CLOCK_MONOTONIC``. See ``clock_gettime(2)`` for the definition of these 720 * clocks. 721 * 722 * Starting from kernel version 2.6.39, the default value for this capability 723 * is 1. Starting kernel version 4.15, this capability is always set to 1. 724 */ 725 #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6 726 /** 727 * DRM_CAP_ASYNC_PAGE_FLIP 728 * 729 * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for legacy 730 * page-flips. 731 */ 732 #define DRM_CAP_ASYNC_PAGE_FLIP 0x7 733 /** 734 * DRM_CAP_CURSOR_WIDTH 735 * 736 * The ``CURSOR_WIDTH`` and ``CURSOR_HEIGHT`` capabilities return a valid 737 * width x height combination for the hardware cursor. The intention is that a 738 * hardware agnostic userspace can query a cursor plane size to use. 739 * 740 * Note that the cross-driver contract is to merely return a valid size; 741 * drivers are free to attach another meaning on top, eg. i915 returns the 742 * maximum plane size. 743 */ 744 #define DRM_CAP_CURSOR_WIDTH 0x8 745 /** 746 * DRM_CAP_CURSOR_HEIGHT 747 * 748 * See &DRM_CAP_CURSOR_WIDTH. 749 */ 750 #define DRM_CAP_CURSOR_HEIGHT 0x9 751 /** 752 * DRM_CAP_ADDFB2_MODIFIERS 753 * 754 * If set to 1, the driver supports supplying modifiers in the 755 * &DRM_IOCTL_MODE_ADDFB2 ioctl. 756 */ 757 #define DRM_CAP_ADDFB2_MODIFIERS 0x10 758 /** 759 * DRM_CAP_PAGE_FLIP_TARGET 760 * 761 * If set to 1, the driver supports the &DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE and 762 * &DRM_MODE_PAGE_FLIP_TARGET_RELATIVE flags in 763 * &drm_mode_crtc_page_flip_target.flags for the &DRM_IOCTL_MODE_PAGE_FLIP 764 * ioctl. 765 */ 766 #define DRM_CAP_PAGE_FLIP_TARGET 0x11 767 /** 768 * DRM_CAP_CRTC_IN_VBLANK_EVENT 769 * 770 * If set to 1, the kernel supports reporting the CRTC ID in 771 * &drm_event_vblank.crtc_id for the &DRM_EVENT_VBLANK and 772 * &DRM_EVENT_FLIP_COMPLETE events. 773 * 774 * Starting kernel version 4.12, this capability is always set to 1. 775 */ 776 #define DRM_CAP_CRTC_IN_VBLANK_EVENT 0x12 777 /** 778 * DRM_CAP_SYNCOBJ 779 * 780 * If set to 1, the driver supports sync objects. See :ref:`drm_sync_objects`. 781 */ 782 #define DRM_CAP_SYNCOBJ 0x13 783 /** 784 * DRM_CAP_SYNCOBJ_TIMELINE 785 * 786 * If set to 1, the driver supports timeline operations on sync objects. See 787 * :ref:`drm_sync_objects`. 788 */ 789 #define DRM_CAP_SYNCOBJ_TIMELINE 0x14 790 /** 791 * DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP 792 * 793 * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for atomic 794 * commits. 795 */ 796 #define DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP 0x15 797 798 /* DRM_IOCTL_GET_CAP ioctl argument type */ 799 struct drm_get_cap { 800 __u64 capability; 801 __u64 value; 802 }; 803 804 /** 805 * DRM_CLIENT_CAP_STEREO_3D 806 * 807 * If set to 1, the DRM core will expose the stereo 3D capabilities of the 808 * monitor by advertising the supported 3D layouts in the flags of struct 809 * drm_mode_modeinfo. See ``DRM_MODE_FLAG_3D_*``. 810 * 811 * This capability is always supported for all drivers starting from kernel 812 * version 3.13. 813 */ 814 #define DRM_CLIENT_CAP_STEREO_3D 1 815 816 /** 817 * DRM_CLIENT_CAP_UNIVERSAL_PLANES 818 * 819 * If set to 1, the DRM core will expose all planes (overlay, primary, and 820 * cursor) to userspace. 821 * 822 * This capability has been introduced in kernel version 3.15. Starting from 823 * kernel version 3.17, this capability is always supported for all drivers. 824 */ 825 #define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2 826 827 /** 828 * DRM_CLIENT_CAP_ATOMIC 829 * 830 * If set to 1, the DRM core will expose atomic properties to userspace. This 831 * implicitly enables &DRM_CLIENT_CAP_UNIVERSAL_PLANES and 832 * &DRM_CLIENT_CAP_ASPECT_RATIO. 833 * 834 * If the driver doesn't support atomic mode-setting, enabling this capability 835 * will fail with -EOPNOTSUPP. 836 * 837 * This capability has been introduced in kernel version 4.0. Starting from 838 * kernel version 4.2, this capability is always supported for atomic-capable 839 * drivers. 840 */ 841 #define DRM_CLIENT_CAP_ATOMIC 3 842 843 /** 844 * DRM_CLIENT_CAP_ASPECT_RATIO 845 * 846 * If set to 1, the DRM core will provide aspect ratio information in modes. 847 * See ``DRM_MODE_FLAG_PIC_AR_*``. 848 * 849 * This capability is always supported for all drivers starting from kernel 850 * version 4.18. 851 */ 852 #define DRM_CLIENT_CAP_ASPECT_RATIO 4 853 854 /** 855 * DRM_CLIENT_CAP_WRITEBACK_CONNECTORS 856 * 857 * If set to 1, the DRM core will expose special connectors to be used for 858 * writing back to memory the scene setup in the commit. The client must enable 859 * &DRM_CLIENT_CAP_ATOMIC first. 860 * 861 * This capability is always supported for atomic-capable drivers starting from 862 * kernel version 4.19. 863 */ 864 #define DRM_CLIENT_CAP_WRITEBACK_CONNECTORS 5 865 866 /** 867 * DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 868 * 869 * Drivers for para-virtualized hardware (e.g. vmwgfx, qxl, virtio and 870 * virtualbox) have additional restrictions for cursor planes (thus 871 * making cursor planes on those drivers not truly universal,) e.g. 872 * they need cursor planes to act like one would expect from a mouse 873 * cursor and have correctly set hotspot properties. 874 * If this client cap is not set the DRM core will hide cursor plane on 875 * those virtualized drivers because not setting it implies that the 876 * client is not capable of dealing with those extra restictions. 877 * Clients which do set cursor hotspot and treat the cursor plane 878 * like a mouse cursor should set this property. 879 * The client must enable &DRM_CLIENT_CAP_ATOMIC first. 880 * 881 * Setting this property on drivers which do not special case 882 * cursor planes (i.e. non-virtualized drivers) will return 883 * EOPNOTSUPP, which can be used by userspace to gauge 884 * requirements of the hardware/drivers they're running on. 885 * 886 * This capability is always supported for atomic-capable virtualized 887 * drivers starting from kernel version 6.6. 888 */ 889 #define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6 890 891 /** 892 * DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 893 * 894 * If set to 1 the DRM core will allow setting the COLOR_PIPELINE 895 * property on a &drm_plane, as well as drm_colorop properties. 896 * 897 * Setting of these plane properties will be rejected when this client 898 * cap is set: 899 * - COLOR_ENCODING 900 * - COLOR_RANGE 901 * 902 * The client must enable &DRM_CLIENT_CAP_ATOMIC first. 903 */ 904 #define DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 7 905 906 /* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ 907 struct drm_set_client_cap { 908 __u64 capability; 909 __u64 value; 910 }; 911 912 #define DRM_RDWR O_RDWR 913 #define DRM_CLOEXEC O_CLOEXEC 914 struct drm_prime_handle { 915 __u32 handle; 916 917 /** Flags.. only applicable for handle->fd */ 918 __u32 flags; 919 920 /** Returned dmabuf file descriptor */ 921 __s32 fd; 922 }; 923 924 struct drm_syncobj_create { 925 __u32 handle; 926 #define DRM_SYNCOBJ_CREATE_SIGNALED (1 << 0) 927 __u32 flags; 928 }; 929 930 struct drm_syncobj_destroy { 931 __u32 handle; 932 __u32 pad; 933 }; 934 935 #define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0) 936 #define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_TIMELINE (1 << 1) 937 #define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0) 938 #define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_TIMELINE (1 << 1) 939 struct drm_syncobj_handle { 940 __u32 handle; 941 __u32 flags; 942 943 __s32 fd; 944 __u32 pad; 945 946 __u64 point; 947 }; 948 949 struct drm_syncobj_transfer { 950 __u32 src_handle; 951 __u32 dst_handle; 952 __u64 src_point; 953 __u64 dst_point; 954 __u32 flags; 955 __u32 pad; 956 }; 957 958 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0) 959 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1) 960 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point to become available */ 961 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE (1 << 3) /* set fence deadline to deadline_nsec */ 962 struct drm_syncobj_wait { 963 __u64 handles; 964 /* absolute timeout */ 965 __s64 timeout_nsec; 966 __u32 count_handles; 967 __u32 flags; 968 __u32 first_signaled; /* only valid when not waiting all */ 969 __u32 pad; 970 /** 971 * @deadline_nsec - fence deadline hint 972 * 973 * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing 974 * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is 975 * set. 976 */ 977 __u64 deadline_nsec; 978 }; 979 980 struct drm_syncobj_timeline_wait { 981 __u64 handles; 982 /* wait on specific timeline point for every handles*/ 983 __u64 points; 984 /* absolute timeout */ 985 __s64 timeout_nsec; 986 __u32 count_handles; 987 __u32 flags; 988 __u32 first_signaled; /* only valid when not waiting all */ 989 __u32 pad; 990 /** 991 * @deadline_nsec - fence deadline hint 992 * 993 * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing 994 * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is 995 * set. 996 */ 997 __u64 deadline_nsec; 998 }; 999 1000 /** 1001 * struct drm_syncobj_eventfd 1002 * @handle: syncobj handle. 1003 * @flags: Zero to wait for the point to be signalled, or 1004 * &DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE to wait for a fence to be 1005 * available for the point. 1006 * @point: syncobj timeline point (set to zero for binary syncobjs). 1007 * @fd: Existing eventfd to sent events to. 1008 * @pad: Must be zero. 1009 * 1010 * Register an eventfd to be signalled by a syncobj. The eventfd counter will 1011 * be incremented by one. 1012 */ 1013 struct drm_syncobj_eventfd { 1014 __u32 handle; 1015 __u32 flags; 1016 __u64 point; 1017 __s32 fd; 1018 __u32 pad; 1019 }; 1020 1021 1022 struct drm_syncobj_array { 1023 __u64 handles; 1024 __u32 count_handles; 1025 __u32 pad; 1026 }; 1027 1028 #define DRM_SYNCOBJ_QUERY_FLAGS_LAST_SUBMITTED (1 << 0) /* last available point on timeline syncobj */ 1029 struct drm_syncobj_timeline_array { 1030 __u64 handles; 1031 __u64 points; 1032 __u32 count_handles; 1033 __u32 flags; 1034 }; 1035 1036 1037 /* Query current scanout sequence number */ 1038 struct drm_crtc_get_sequence { 1039 __u32 crtc_id; /* requested crtc_id */ 1040 __u32 active; /* return: crtc output is active */ 1041 __u64 sequence; /* return: most recent vblank sequence */ 1042 __s64 sequence_ns; /* return: most recent time of first pixel out */ 1043 }; 1044 1045 /* Queue event to be delivered at specified sequence. Time stamp marks 1046 * when the first pixel of the refresh cycle leaves the display engine 1047 * for the display 1048 */ 1049 #define DRM_CRTC_SEQUENCE_RELATIVE 0x00000001 /* sequence is relative to current */ 1050 #define DRM_CRTC_SEQUENCE_NEXT_ON_MISS 0x00000002 /* Use next sequence if we've missed */ 1051 1052 struct drm_crtc_queue_sequence { 1053 __u32 crtc_id; 1054 __u32 flags; 1055 __u64 sequence; /* on input, target sequence. on output, actual sequence */ 1056 __u64 user_data; /* user data passed to event */ 1057 }; 1058 1059 #define DRM_CLIENT_NAME_MAX_LEN 64 1060 struct drm_set_client_name { 1061 __u64 name_len; 1062 __u64 name; 1063 }; 1064 1065 1066 #if defined(__cplusplus) 1067 } 1068 #endif 1069 1070 #include "drm_mode.h" 1071 1072 #if defined(__cplusplus) 1073 extern "C" { 1074 #endif 1075 1076 #define DRM_IOCTL_BASE 'd' 1077 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 1078 #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 1079 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) 1080 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 1081 1082 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version) 1083 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique) 1084 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth) 1085 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid) 1086 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map) 1087 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) 1088 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) 1089 #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) 1090 #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl) 1091 /** 1092 * DRM_IOCTL_GEM_CLOSE - Close a GEM handle. 1093 * 1094 * GEM handles are not reference-counted by the kernel. User-space is 1095 * responsible for managing their lifetime. For example, if user-space imports 1096 * the same memory object twice on the same DRM file description, the same GEM 1097 * handle is returned by both imports, and user-space needs to ensure 1098 * &DRM_IOCTL_GEM_CLOSE is performed once only. The same situation can happen 1099 * when a memory object is allocated, then exported and imported again on the 1100 * same DRM file description. The &DRM_IOCTL_MODE_GETFB2 IOCTL is an exception 1101 * and always returns fresh new GEM handles even if an existing GEM handle 1102 * already refers to the same memory object before the IOCTL is performed. 1103 */ 1104 #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close) 1105 #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) 1106 #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) 1107 #define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap) 1108 #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap) 1109 1110 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) 1111 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) 1112 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block) 1113 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block) 1114 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control) 1115 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map) 1116 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc) 1117 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc) 1118 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info) 1119 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map) 1120 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free) 1121 1122 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map) 1123 1124 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map) 1125 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map) 1126 1127 #define DRM_IOCTL_SET_MASTER DRM_IO(0x1e) 1128 #define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f) 1129 1130 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx) 1131 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx) 1132 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx) 1133 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx) 1134 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx) 1135 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx) 1136 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res) 1137 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw) 1138 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw) 1139 #define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma) 1140 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock) 1141 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock) 1142 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock) 1143 1144 /** 1145 * DRM_IOCTL_PRIME_HANDLE_TO_FD - Convert a GEM handle to a DMA-BUF FD. 1146 * 1147 * User-space sets &drm_prime_handle.handle with the GEM handle to export and 1148 * &drm_prime_handle.flags, and gets back a DMA-BUF file descriptor in 1149 * &drm_prime_handle.fd. 1150 * 1151 * The export can fail for any driver-specific reason, e.g. because export is 1152 * not supported for this specific GEM handle (but might be for others). 1153 * 1154 * Support for exporting DMA-BUFs is advertised via &DRM_PRIME_CAP_EXPORT. 1155 */ 1156 #define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle) 1157 /** 1158 * DRM_IOCTL_PRIME_FD_TO_HANDLE - Convert a DMA-BUF FD to a GEM handle. 1159 * 1160 * User-space sets &drm_prime_handle.fd with a DMA-BUF file descriptor to 1161 * import, and gets back a GEM handle in &drm_prime_handle.handle. 1162 * &drm_prime_handle.flags is unused. 1163 * 1164 * If an existing GEM handle refers to the memory object backing the DMA-BUF, 1165 * that GEM handle is returned. Therefore user-space which needs to handle 1166 * arbitrary DMA-BUFs must have a user-space lookup data structure to manually 1167 * reference-count duplicated GEM handles. For more information see 1168 * &DRM_IOCTL_GEM_CLOSE. 1169 * 1170 * The import can fail for any driver-specific reason, e.g. because import is 1171 * only supported for DMA-BUFs allocated on this DRM device. 1172 * 1173 * Support for importing DMA-BUFs is advertised via &DRM_PRIME_CAP_IMPORT. 1174 */ 1175 #define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle) 1176 1177 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 1178 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 1179 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode) 1180 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info) 1181 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer) 1182 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer) 1183 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding) 1184 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding) 1185 1186 #define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather) 1187 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather) 1188 1189 #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank) 1190 1191 #define DRM_IOCTL_CRTC_GET_SEQUENCE DRM_IOWR(0x3b, struct drm_crtc_get_sequence) 1192 #define DRM_IOCTL_CRTC_QUEUE_SEQUENCE DRM_IOWR(0x3c, struct drm_crtc_queue_sequence) 1193 1194 #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw) 1195 1196 #define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res) 1197 #define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc) 1198 #define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc) 1199 #define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor) 1200 #define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut) 1201 #define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut) 1202 #define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder) 1203 #define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector) 1204 #define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */ 1205 #define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */ 1206 1207 #define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property) 1208 #define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property) 1209 #define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob) 1210 #define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd) 1211 #define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd) 1212 /** 1213 * DRM_IOCTL_MODE_RMFB - Remove a framebuffer. 1214 * 1215 * This removes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL 1216 * argument is a framebuffer object ID. 1217 * 1218 * Warning: removing a framebuffer currently in-use on an enabled plane will 1219 * disable that plane. The CRTC the plane is linked to may also be disabled 1220 * (depending on driver capabilities). 1221 */ 1222 #define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int) 1223 #define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip) 1224 #define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd) 1225 1226 /** 1227 * DRM_IOCTL_MODE_CREATE_DUMB - Create a new dumb buffer object. 1228 * 1229 * KMS dumb buffers provide a very primitive way to allocate a buffer object 1230 * suitable for scanout and map it for software rendering. KMS dumb buffers are 1231 * not suitable for hardware-accelerated rendering nor video decoding. KMS dumb 1232 * buffers are not suitable to be displayed on any other device than the KMS 1233 * device where they were allocated from. Also see 1234 * :ref:`kms_dumb_buffer_objects`. 1235 * 1236 * The IOCTL argument is a struct drm_mode_create_dumb. 1237 * 1238 * User-space is expected to create a KMS dumb buffer via this IOCTL, then add 1239 * it as a KMS framebuffer via &DRM_IOCTL_MODE_ADDFB and map it via 1240 * &DRM_IOCTL_MODE_MAP_DUMB. 1241 * 1242 * &DRM_CAP_DUMB_BUFFER indicates whether this IOCTL is supported. 1243 * &DRM_CAP_DUMB_PREFERRED_DEPTH and &DRM_CAP_DUMB_PREFER_SHADOW indicate 1244 * driver preferences for dumb buffers. 1245 */ 1246 #define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb) 1247 #define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb) 1248 #define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb) 1249 #define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res) 1250 #define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane) 1251 #define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane) 1252 #define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2) 1253 #define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties) 1254 #define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property) 1255 #define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2) 1256 #define DRM_IOCTL_MODE_ATOMIC DRM_IOWR(0xBC, struct drm_mode_atomic) 1257 #define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob) 1258 #define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob) 1259 1260 #define DRM_IOCTL_SYNCOBJ_CREATE DRM_IOWR(0xBF, struct drm_syncobj_create) 1261 #define DRM_IOCTL_SYNCOBJ_DESTROY DRM_IOWR(0xC0, struct drm_syncobj_destroy) 1262 #define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle) 1263 #define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE DRM_IOWR(0xC2, struct drm_syncobj_handle) 1264 #define DRM_IOCTL_SYNCOBJ_WAIT DRM_IOWR(0xC3, struct drm_syncobj_wait) 1265 #define DRM_IOCTL_SYNCOBJ_RESET DRM_IOWR(0xC4, struct drm_syncobj_array) 1266 #define DRM_IOCTL_SYNCOBJ_SIGNAL DRM_IOWR(0xC5, struct drm_syncobj_array) 1267 1268 #define DRM_IOCTL_MODE_CREATE_LEASE DRM_IOWR(0xC6, struct drm_mode_create_lease) 1269 #define DRM_IOCTL_MODE_LIST_LESSEES DRM_IOWR(0xC7, struct drm_mode_list_lessees) 1270 #define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct drm_mode_get_lease) 1271 #define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease) 1272 1273 #define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct drm_syncobj_timeline_wait) 1274 #define DRM_IOCTL_SYNCOBJ_QUERY DRM_IOWR(0xCB, struct drm_syncobj_timeline_array) 1275 #define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct drm_syncobj_transfer) 1276 #define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct drm_syncobj_timeline_array) 1277 1278 /** 1279 * DRM_IOCTL_MODE_GETFB2 - Get framebuffer metadata. 1280 * 1281 * This queries metadata about a framebuffer. User-space fills 1282 * &drm_mode_fb_cmd2.fb_id as the input, and the kernels fills the rest of the 1283 * struct as the output. 1284 * 1285 * If the client is DRM master or has &CAP_SYS_ADMIN, &drm_mode_fb_cmd2.handles 1286 * will be filled with GEM buffer handles. Fresh new GEM handles are always 1287 * returned, even if another GEM handle referring to the same memory object 1288 * already exists on the DRM file description. The caller is responsible for 1289 * removing the new handles, e.g. via the &DRM_IOCTL_GEM_CLOSE IOCTL. The same 1290 * new handle will be returned for multiple planes in case they use the same 1291 * memory object. Planes are valid until one has a zero handle -- this can be 1292 * used to compute the number of planes. 1293 * 1294 * Otherwise, &drm_mode_fb_cmd2.handles will be zeroed and planes are valid 1295 * until one has a zero &drm_mode_fb_cmd2.pitches. 1296 * 1297 * If the framebuffer has a format modifier, &DRM_MODE_FB_MODIFIERS will be set 1298 * in &drm_mode_fb_cmd2.flags and &drm_mode_fb_cmd2.modifier will contain the 1299 * modifier. Otherwise, user-space must ignore &drm_mode_fb_cmd2.modifier. 1300 * 1301 * To obtain DMA-BUF FDs for each plane without leaking GEM handles, user-space 1302 * can export each handle via &DRM_IOCTL_PRIME_HANDLE_TO_FD, then immediately 1303 * close each unique handle via &DRM_IOCTL_GEM_CLOSE, making sure to not 1304 * double-close handles which are specified multiple times in the array. 1305 */ 1306 #define DRM_IOCTL_MODE_GETFB2 DRM_IOWR(0xCE, struct drm_mode_fb_cmd2) 1307 1308 /** 1309 * DRM_IOCTL_SYNCOBJ_EVENTFD - Register an eventfd to be signalled by a syncobj. 1310 * 1311 * This can be used to integrate a syncobj in an event loop. 1312 * 1313 * The IOCTL argument is a struct drm_syncobj_eventfd. 1314 */ 1315 #define DRM_IOCTL_SYNCOBJ_EVENTFD DRM_IOWR(0xCF, struct drm_syncobj_eventfd) 1316 1317 /** 1318 * DRM_IOCTL_MODE_CLOSEFB - Close a framebuffer. 1319 * 1320 * This closes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL 1321 * argument is a framebuffer object ID. 1322 * 1323 * This IOCTL is similar to &DRM_IOCTL_MODE_RMFB, except it doesn't disable 1324 * planes and CRTCs. As long as the framebuffer is used by a plane, it's kept 1325 * alive. When the plane no longer uses the framebuffer (because the 1326 * framebuffer is replaced with another one, or the plane is disabled), the 1327 * framebuffer is cleaned up. 1328 * 1329 * This is useful to implement flicker-free transitions between two processes. 1330 * 1331 * Depending on the threat model, user-space may want to ensure that the 1332 * framebuffer doesn't expose any sensitive user information: closed 1333 * framebuffers attached to a plane can be read back by the next DRM master. 1334 */ 1335 #define DRM_IOCTL_MODE_CLOSEFB DRM_IOWR(0xD0, struct drm_mode_closefb) 1336 1337 /** 1338 * DRM_IOCTL_SET_CLIENT_NAME - Attach a name to a drm_file 1339 * 1340 * Having a name allows for easier tracking and debugging. 1341 * The length of the name (without null ending char) must be 1342 * <= DRM_CLIENT_NAME_MAX_LEN. 1343 * The call will fail if the name contains whitespaces or non-printable chars. 1344 */ 1345 #define DRM_IOCTL_SET_CLIENT_NAME DRM_IOWR(0xD1, struct drm_set_client_name) 1346 1347 /** 1348 * DRM_IOCTL_GEM_CHANGE_HANDLE - Move an object to a different handle 1349 * 1350 * Some applications (notably CRIU) need objects to have specific gem handles. 1351 * This ioctl changes the object at one gem handle to use a new gem handle. 1352 */ 1353 #define DRM_IOCTL_GEM_CHANGE_HANDLE DRM_IOWR(0xD2, struct drm_gem_change_handle) 1354 1355 /* 1356 * Device specific ioctls should only be in their respective headers 1357 * The device specific ioctl range is from 0x40 to 0x9f. 1358 * Generic IOCTLS restart at 0xA0. 1359 * 1360 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and 1361 * drmCommandReadWrite(). 1362 */ 1363 #define DRM_COMMAND_BASE 0x40 1364 #define DRM_COMMAND_END 0xA0 1365 1366 /** 1367 * struct drm_event - Header for DRM events 1368 * @type: event type. 1369 * @length: total number of payload bytes (including header). 1370 * 1371 * This struct is a header for events written back to user-space on the DRM FD. 1372 * A read on the DRM FD will always only return complete events: e.g. if the 1373 * read buffer is 100 bytes large and there are two 64 byte events pending, 1374 * only one will be returned. 1375 * 1376 * Event types 0 - 0x7fffffff are generic DRM events, 0x80000000 and 1377 * up are chipset specific. Generic DRM events include &DRM_EVENT_VBLANK, 1378 * &DRM_EVENT_FLIP_COMPLETE and &DRM_EVENT_CRTC_SEQUENCE. 1379 */ 1380 struct drm_event { 1381 __u32 type; 1382 __u32 length; 1383 }; 1384 1385 /** 1386 * DRM_EVENT_VBLANK - vertical blanking event 1387 * 1388 * This event is sent in response to &DRM_IOCTL_WAIT_VBLANK with the 1389 * &_DRM_VBLANK_EVENT flag set. 1390 * 1391 * The event payload is a struct drm_event_vblank. 1392 */ 1393 #define DRM_EVENT_VBLANK 0x01 1394 /** 1395 * DRM_EVENT_FLIP_COMPLETE - page-flip completion event 1396 * 1397 * This event is sent in response to an atomic commit or legacy page-flip with 1398 * the &DRM_MODE_PAGE_FLIP_EVENT flag set. 1399 * 1400 * The event payload is a struct drm_event_vblank. 1401 */ 1402 #define DRM_EVENT_FLIP_COMPLETE 0x02 1403 /** 1404 * DRM_EVENT_CRTC_SEQUENCE - CRTC sequence event 1405 * 1406 * This event is sent in response to &DRM_IOCTL_CRTC_QUEUE_SEQUENCE. 1407 * 1408 * The event payload is a struct drm_event_crtc_sequence. 1409 */ 1410 #define DRM_EVENT_CRTC_SEQUENCE 0x03 1411 1412 struct drm_event_vblank { 1413 struct drm_event base; 1414 __u64 user_data; 1415 __u32 tv_sec; 1416 __u32 tv_usec; 1417 __u32 sequence; 1418 __u32 crtc_id; /* 0 on older kernels that do not support this */ 1419 }; 1420 1421 /* Event delivered at sequence. Time stamp marks when the first pixel 1422 * of the refresh cycle leaves the display engine for the display 1423 */ 1424 struct drm_event_crtc_sequence { 1425 struct drm_event base; 1426 __u64 user_data; 1427 __s64 time_ns; 1428 __u64 sequence; 1429 }; 1430 1431 /* typedef area */ 1432 #ifndef __KERNEL__ 1433 typedef struct drm_clip_rect drm_clip_rect_t; 1434 typedef struct drm_drawable_info drm_drawable_info_t; 1435 typedef struct drm_tex_region drm_tex_region_t; 1436 typedef struct drm_hw_lock drm_hw_lock_t; 1437 typedef struct drm_version drm_version_t; 1438 typedef struct drm_unique drm_unique_t; 1439 typedef struct drm_list drm_list_t; 1440 typedef struct drm_block drm_block_t; 1441 typedef struct drm_control drm_control_t; 1442 typedef enum drm_map_type drm_map_type_t; 1443 typedef enum drm_map_flags drm_map_flags_t; 1444 typedef struct drm_ctx_priv_map drm_ctx_priv_map_t; 1445 typedef struct drm_map drm_map_t; 1446 typedef struct drm_client drm_client_t; 1447 typedef enum drm_stat_type drm_stat_type_t; 1448 typedef struct drm_stats drm_stats_t; 1449 typedef enum drm_lock_flags drm_lock_flags_t; 1450 typedef struct drm_lock drm_lock_t; 1451 typedef enum drm_dma_flags drm_dma_flags_t; 1452 typedef struct drm_buf_desc drm_buf_desc_t; 1453 typedef struct drm_buf_info drm_buf_info_t; 1454 typedef struct drm_buf_free drm_buf_free_t; 1455 typedef struct drm_buf_pub drm_buf_pub_t; 1456 typedef struct drm_buf_map drm_buf_map_t; 1457 typedef struct drm_dma drm_dma_t; 1458 typedef union drm_wait_vblank drm_wait_vblank_t; 1459 typedef struct drm_agp_mode drm_agp_mode_t; 1460 typedef enum drm_ctx_flags drm_ctx_flags_t; 1461 typedef struct drm_ctx drm_ctx_t; 1462 typedef struct drm_ctx_res drm_ctx_res_t; 1463 typedef struct drm_draw drm_draw_t; 1464 typedef struct drm_update_draw drm_update_draw_t; 1465 typedef struct drm_auth drm_auth_t; 1466 typedef struct drm_irq_busid drm_irq_busid_t; 1467 typedef enum drm_vblank_seq_type drm_vblank_seq_type_t; 1468 1469 typedef struct drm_agp_buffer drm_agp_buffer_t; 1470 typedef struct drm_agp_binding drm_agp_binding_t; 1471 typedef struct drm_agp_info drm_agp_info_t; 1472 typedef struct drm_scatter_gather drm_scatter_gather_t; 1473 typedef struct drm_set_version drm_set_version_t; 1474 #endif 1475 1476 #if defined(__cplusplus) 1477 } 1478 #endif 1479 1480 #endif 1481