1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 #undef TRACE_SYSTEM 6 #define TRACE_SYSTEM qcom_geni_se 7 8 #if !defined(_TRACE_QCOM_GENI_SE_H) || defined(TRACE_HEADER_MULTI_READ) 9 #define _TRACE_QCOM_GENI_SE_H 10 11 #include <linux/io.h> 12 #include <linux/tracepoint.h> 13 #include <linux/soc/qcom/geni-se.h> 14 15 TRACE_EVENT(geni_se_regs, 16 TP_PROTO(struct geni_se *se), 17 18 TP_ARGS(se), 19 20 TP_STRUCT__entry(__string(geni_se_name, dev_name(se->dev)) 21 __field(u32, geni_se_m_cmd0) 22 __field(u32, geni_se_m_irq_status) 23 __field(u32, geni_se_s_cmd0) 24 __field(u32, geni_se_s_irq_status) 25 __field(u32, geni_se_status) 26 __field(u32, geni_se_ios) 27 __field(u32, geni_se_m_cmd_ctrl) 28 __field(u32, geni_se_m_cmd_err) 29 __field(u32, geni_se_m_fw_err) 30 __field(u32, geni_se_tx_fifo_status) 31 __field(u32, geni_se_rx_fifo_status) 32 __field(u32, geni_se_tx_watermark) 33 __field(u32, geni_se_rx_watermark) 34 __field(u32, geni_se_rx_watermark_rfr) 35 __field(u32, geni_se_m_gp_length) 36 __field(u32, geni_se_s_gp_length) 37 __field(u32, geni_se_dma_tx_irq) 38 __field(u32, geni_se_dma_rx_irq) 39 __field(u32, geni_se_dma_tx_irq_en) 40 __field(u32, geni_se_dma_rx_irq_en) 41 __field(u32, geni_se_dma_rx_len) 42 __field(u32, geni_se_dma_rx_len_in) 43 __field(u32, geni_se_dma_tx_len) 44 __field(u32, geni_se_dma_tx_len_in) 45 __field(u32, geni_se_dma_tx_ptr_l) 46 __field(u32, geni_se_dma_tx_ptr_h) 47 __field(u32, geni_se_dma_rx_ptr_l) 48 __field(u32, geni_se_dma_rx_ptr_h) 49 __field(u32, geni_se_dma_tx_attr) 50 __field(u32, geni_se_dma_tx_max_burst) 51 __field(u32, geni_se_dma_rx_attr) 52 __field(u32, geni_se_dma_rx_max_burst) 53 __field(u32, geni_se_dma_if_en) 54 __field(u32, geni_se_dma_if_en_ro) 55 __field(u32, geni_se_dma_general_cfg) 56 __field(u32, geni_se_dma_qsb_trans_cfg) 57 __field(u32, geni_se_dma_dbg) 58 __field(u32, geni_se_m_irq_en) 59 __field(u32, geni_se_s_irq_en) 60 __field(u32, geni_se_gsi_event_en) 61 __field(u32, geni_se_irq_en) 62 __field(u32, geni_se_ser_m_clk_cfg) 63 __field(u32, geni_se_ser_s_clk_cfg) 64 __field(u32, geni_se_general_cfg) 65 __field(u32, geni_se_output_ctrl) 66 __field(u32, geni_se_clk_ctrl_ro) 67 __field(u32, geni_se_fifo_if_disable) 68 __field(u32, geni_se_fw_multilock_msa) 69 __field(u32, geni_se_clk_sel) 70 ), 71 72 TP_fast_assign(__assign_str(geni_se_name); 73 __entry->geni_se_m_cmd0 = readl(se->base + SE_GENI_M_CMD0); 74 __entry->geni_se_m_irq_status = readl(se->base + SE_GENI_M_IRQ_STATUS); 75 __entry->geni_se_s_cmd0 = readl(se->base + SE_GENI_S_CMD0); 76 __entry->geni_se_s_irq_status = readl(se->base + SE_GENI_S_IRQ_STATUS); 77 __entry->geni_se_status = readl(se->base + SE_GENI_STATUS); 78 __entry->geni_se_ios = readl(se->base + SE_GENI_IOS); 79 __entry->geni_se_m_cmd_ctrl = readl(se->base + SE_GENI_M_CMD_CTRL_REG); 80 __entry->geni_se_m_cmd_err = readl(se->base + M_CMD_ERR_STATUS); 81 __entry->geni_se_m_fw_err = readl(se->base + M_FW_ERR_STATUS); 82 __entry->geni_se_tx_fifo_status = readl(se->base + SE_GENI_TX_FIFO_STATUS); 83 __entry->geni_se_rx_fifo_status = readl(se->base + SE_GENI_RX_FIFO_STATUS); 84 __entry->geni_se_tx_watermark = readl(se->base + SE_GENI_TX_WATERMARK_REG); 85 __entry->geni_se_rx_watermark = readl(se->base + SE_GENI_RX_WATERMARK_REG); 86 __entry->geni_se_rx_watermark_rfr = readl(se->base + SE_GENI_RX_RFR_WATERMARK_REG); 87 __entry->geni_se_m_gp_length = readl(se->base + SE_GENI_M_GP_LENGTH); 88 __entry->geni_se_s_gp_length = readl(se->base + SE_GENI_S_GP_LENGTH); 89 __entry->geni_se_dma_tx_irq = readl(se->base + SE_DMA_TX_IRQ_STAT); 90 __entry->geni_se_dma_rx_irq = readl(se->base + SE_DMA_RX_IRQ_STAT); 91 __entry->geni_se_dma_tx_irq_en = readl(se->base + SE_DMA_TX_IRQ_EN); 92 __entry->geni_se_dma_rx_irq_en = readl(se->base + SE_DMA_RX_IRQ_EN); 93 __entry->geni_se_dma_rx_len = readl(se->base + SE_DMA_RX_LEN); 94 __entry->geni_se_dma_rx_len_in = readl(se->base + SE_DMA_RX_LEN_IN); 95 __entry->geni_se_dma_tx_len = readl(se->base + SE_DMA_TX_LEN); 96 __entry->geni_se_dma_tx_len_in = readl(se->base + SE_DMA_TX_LEN_IN); 97 __entry->geni_se_dma_tx_ptr_l = readl(se->base + SE_DMA_TX_PTR_L); 98 __entry->geni_se_dma_tx_ptr_h = readl(se->base + SE_DMA_TX_PTR_H); 99 __entry->geni_se_dma_rx_ptr_l = readl(se->base + SE_DMA_RX_PTR_L); 100 __entry->geni_se_dma_rx_ptr_h = readl(se->base + SE_DMA_RX_PTR_H); 101 __entry->geni_se_dma_tx_attr = readl(se->base + SE_DMA_TX_ATTR); 102 __entry->geni_se_dma_tx_max_burst = readl(se->base + SE_DMA_TX_MAX_BURST); 103 __entry->geni_se_dma_rx_attr = readl(se->base + SE_DMA_RX_ATTR); 104 __entry->geni_se_dma_rx_max_burst = readl(se->base + SE_DMA_RX_MAX_BURST); 105 __entry->geni_se_dma_if_en = readl(se->base + SE_DMA_IF_EN); 106 __entry->geni_se_dma_if_en_ro = readl(se->base + DMA_IF_EN_RO); 107 __entry->geni_se_dma_general_cfg = readl(se->base + DMA_GENERAL_CFG); 108 __entry->geni_se_dma_qsb_trans_cfg = readl(se->base + SE_DMA_QSB_TRANS_CFG); 109 __entry->geni_se_dma_dbg = readl(se->base + SE_DMA_DEBUG_REG0); 110 __entry->geni_se_m_irq_en = readl(se->base + SE_GENI_M_IRQ_EN); 111 __entry->geni_se_s_irq_en = readl(se->base + SE_GENI_S_IRQ_EN); 112 __entry->geni_se_gsi_event_en = readl(se->base + SE_GSI_EVENT_EN); 113 __entry->geni_se_irq_en = readl(se->base + SE_IRQ_EN); 114 __entry->geni_se_ser_m_clk_cfg = readl(se->base + GENI_SER_M_CLK_CFG); 115 __entry->geni_se_ser_s_clk_cfg = readl(se->base + GENI_SER_S_CLK_CFG); 116 __entry->geni_se_general_cfg = readl(se->base + GENI_GENERAL_CFG); 117 __entry->geni_se_output_ctrl = readl(se->base + GENI_OUTPUT_CTRL); 118 __entry->geni_se_clk_ctrl_ro = readl(se->base + GENI_CLK_CTRL_RO); 119 __entry->geni_se_fifo_if_disable = readl(se->base + GENI_IF_DISABLE_RO); 120 __entry->geni_se_fw_multilock_msa = readl(se->base + GENI_FW_MULTILOCK_MSA_RO); 121 __entry->geni_se_clk_sel = readl(se->base + SE_GENI_CLK_SEL); 122 ), 123 124 TP_printk("%s: m_cmd0=0x%08x m_irq_status=0x%08x s_cmd0=0x%08x s_irq_status=0x%08x geni_status=0x%08x geni_ios=0x%08x m_cmd_ctrl=0x%08x m_cmd_err=0x%08x m_fw_err=0x%08x tx_fifo_sts=0x%08x rx_fifo_sts=0x%08x tx_watermark=0x%08x rx_watermark=0x%08x rx_watermark_rfr=0x%08x m_gp_length=0x%08x s_gp_length=0x%08x dma_tx_irq=0x%08x dma_rx_irq=0x%08x dma_tx_irq_en=0x%08x dma_rx_irq_en=0x%08x dma_rx_len=0x%08x dma_rx_len_in=0x%08x dma_tx_len=0x%08x dma_tx_len_in=0x%08x dma_tx_ptr_l=0x%08x dma_tx_ptr_h=0x%08x dma_rx_ptr_l=0x%08x dma_rx_ptr_h=0x%08x dma_tx_attr=0x%08x dma_tx_max_burst=0x%08x dma_rx_attr=0x%08x dma_rx_max_burst=0x%08x dma_if_en=0x%08x dma_if_en_ro=0x%08x dma_general_cfg=0x%08x dma_qsb_trans_cfg=0x%08x dma_dbg=0x%08x m_irq_en=0x%08x s_irq_en=0x%08x gsi_event_en=0x%08x se_irq_en=0x%08x ser_m_clk_cfg=0x%08x ser_s_clk_cfg=0x%08x general_cfg=0x%08x output_ctrl=0x%08x clk_ctrl_ro=0x%08x fifo_if_dis=0x%08x fw_multilock_msa=0x%08x clk_sel=0x%08x", 125 __get_str(geni_se_name), 126 __entry->geni_se_m_cmd0, __entry->geni_se_m_irq_status, 127 __entry->geni_se_s_cmd0, __entry->geni_se_s_irq_status, 128 __entry->geni_se_status, __entry->geni_se_ios, 129 __entry->geni_se_m_cmd_ctrl, 130 __entry->geni_se_m_cmd_err, __entry->geni_se_m_fw_err, 131 __entry->geni_se_tx_fifo_status, __entry->geni_se_rx_fifo_status, 132 __entry->geni_se_tx_watermark, __entry->geni_se_rx_watermark, 133 __entry->geni_se_rx_watermark_rfr, 134 __entry->geni_se_m_gp_length, __entry->geni_se_s_gp_length, 135 __entry->geni_se_dma_tx_irq, __entry->geni_se_dma_rx_irq, 136 __entry->geni_se_dma_tx_irq_en, __entry->geni_se_dma_rx_irq_en, 137 __entry->geni_se_dma_rx_len, __entry->geni_se_dma_rx_len_in, 138 __entry->geni_se_dma_tx_len, __entry->geni_se_dma_tx_len_in, 139 __entry->geni_se_dma_tx_ptr_l, __entry->geni_se_dma_tx_ptr_h, 140 __entry->geni_se_dma_rx_ptr_l, __entry->geni_se_dma_rx_ptr_h, 141 __entry->geni_se_dma_tx_attr, __entry->geni_se_dma_tx_max_burst, 142 __entry->geni_se_dma_rx_attr, __entry->geni_se_dma_rx_max_burst, 143 __entry->geni_se_dma_if_en, __entry->geni_se_dma_if_en_ro, 144 __entry->geni_se_dma_general_cfg, __entry->geni_se_dma_qsb_trans_cfg, 145 __entry->geni_se_dma_dbg, 146 __entry->geni_se_m_irq_en, __entry->geni_se_s_irq_en, 147 __entry->geni_se_gsi_event_en, __entry->geni_se_irq_en, 148 __entry->geni_se_ser_m_clk_cfg, __entry->geni_se_ser_s_clk_cfg, 149 __entry->geni_se_general_cfg, __entry->geni_se_output_ctrl, 150 __entry->geni_se_clk_ctrl_ro, __entry->geni_se_fifo_if_disable, 151 __entry->geni_se_fw_multilock_msa, __entry->geni_se_clk_sel) 152 ); 153 154 #endif /* _TRACE_QCOM_GENI_SE_H */ 155 156 /* This part must be outside protection */ 157 #include <trace/define_trace.h> 158