1*f40e7ab0SPraveen Talari /* SPDX-License-Identifier: GPL-2.0 */ 2*f40e7ab0SPraveen Talari /* 3*f40e7ab0SPraveen Talari * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4*f40e7ab0SPraveen Talari */ 5*f40e7ab0SPraveen Talari #undef TRACE_SYSTEM 6*f40e7ab0SPraveen Talari #define TRACE_SYSTEM qcom_geni_se 7*f40e7ab0SPraveen Talari 8*f40e7ab0SPraveen Talari #if !defined(_TRACE_QCOM_GENI_SE_H) || defined(TRACE_HEADER_MULTI_READ) 9*f40e7ab0SPraveen Talari #define _TRACE_QCOM_GENI_SE_H 10*f40e7ab0SPraveen Talari 11*f40e7ab0SPraveen Talari #include <linux/io.h> 12*f40e7ab0SPraveen Talari #include <linux/tracepoint.h> 13*f40e7ab0SPraveen Talari #include <linux/soc/qcom/geni-se.h> 14*f40e7ab0SPraveen Talari 15*f40e7ab0SPraveen Talari TRACE_EVENT(geni_se_regs, 16*f40e7ab0SPraveen Talari TP_PROTO(struct geni_se *se), 17*f40e7ab0SPraveen Talari 18*f40e7ab0SPraveen Talari TP_ARGS(se), 19*f40e7ab0SPraveen Talari 20*f40e7ab0SPraveen Talari TP_STRUCT__entry(__string(geni_se_name, dev_name(se->dev)) 21*f40e7ab0SPraveen Talari __field(u32, geni_se_m_cmd0) 22*f40e7ab0SPraveen Talari __field(u32, geni_se_m_irq_status) 23*f40e7ab0SPraveen Talari __field(u32, geni_se_s_cmd0) 24*f40e7ab0SPraveen Talari __field(u32, geni_se_s_irq_status) 25*f40e7ab0SPraveen Talari __field(u32, geni_se_status) 26*f40e7ab0SPraveen Talari __field(u32, geni_se_ios) 27*f40e7ab0SPraveen Talari __field(u32, geni_se_m_cmd_ctrl) 28*f40e7ab0SPraveen Talari __field(u32, geni_se_m_cmd_err) 29*f40e7ab0SPraveen Talari __field(u32, geni_se_m_fw_err) 30*f40e7ab0SPraveen Talari __field(u32, geni_se_tx_fifo_status) 31*f40e7ab0SPraveen Talari __field(u32, geni_se_rx_fifo_status) 32*f40e7ab0SPraveen Talari __field(u32, geni_se_tx_watermark) 33*f40e7ab0SPraveen Talari __field(u32, geni_se_rx_watermark) 34*f40e7ab0SPraveen Talari __field(u32, geni_se_rx_watermark_rfr) 35*f40e7ab0SPraveen Talari __field(u32, geni_se_m_gp_length) 36*f40e7ab0SPraveen Talari __field(u32, geni_se_s_gp_length) 37*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_tx_irq) 38*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_rx_irq) 39*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_tx_irq_en) 40*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_rx_irq_en) 41*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_rx_len) 42*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_rx_len_in) 43*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_tx_len) 44*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_tx_len_in) 45*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_tx_ptr_l) 46*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_tx_ptr_h) 47*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_rx_ptr_l) 48*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_rx_ptr_h) 49*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_tx_attr) 50*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_tx_max_burst) 51*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_rx_attr) 52*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_rx_max_burst) 53*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_if_en) 54*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_if_en_ro) 55*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_general_cfg) 56*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_qsb_trans_cfg) 57*f40e7ab0SPraveen Talari __field(u32, geni_se_dma_dbg) 58*f40e7ab0SPraveen Talari __field(u32, geni_se_m_irq_en) 59*f40e7ab0SPraveen Talari __field(u32, geni_se_s_irq_en) 60*f40e7ab0SPraveen Talari __field(u32, geni_se_gsi_event_en) 61*f40e7ab0SPraveen Talari __field(u32, geni_se_irq_en) 62*f40e7ab0SPraveen Talari __field(u32, geni_se_ser_m_clk_cfg) 63*f40e7ab0SPraveen Talari __field(u32, geni_se_ser_s_clk_cfg) 64*f40e7ab0SPraveen Talari __field(u32, geni_se_general_cfg) 65*f40e7ab0SPraveen Talari __field(u32, geni_se_output_ctrl) 66*f40e7ab0SPraveen Talari __field(u32, geni_se_clk_ctrl_ro) 67*f40e7ab0SPraveen Talari __field(u32, geni_se_fifo_if_disable) 68*f40e7ab0SPraveen Talari __field(u32, geni_se_fw_multilock_msa) 69*f40e7ab0SPraveen Talari __field(u32, geni_se_clk_sel) 70*f40e7ab0SPraveen Talari ), 71*f40e7ab0SPraveen Talari 72*f40e7ab0SPraveen Talari TP_fast_assign(__assign_str(geni_se_name); 73*f40e7ab0SPraveen Talari __entry->geni_se_m_cmd0 = readl(se->base + SE_GENI_M_CMD0); 74*f40e7ab0SPraveen Talari __entry->geni_se_m_irq_status = readl(se->base + SE_GENI_M_IRQ_STATUS); 75*f40e7ab0SPraveen Talari __entry->geni_se_s_cmd0 = readl(se->base + SE_GENI_S_CMD0); 76*f40e7ab0SPraveen Talari __entry->geni_se_s_irq_status = readl(se->base + SE_GENI_S_IRQ_STATUS); 77*f40e7ab0SPraveen Talari __entry->geni_se_status = readl(se->base + SE_GENI_STATUS); 78*f40e7ab0SPraveen Talari __entry->geni_se_ios = readl(se->base + SE_GENI_IOS); 79*f40e7ab0SPraveen Talari __entry->geni_se_m_cmd_ctrl = readl(se->base + SE_GENI_M_CMD_CTRL_REG); 80*f40e7ab0SPraveen Talari __entry->geni_se_m_cmd_err = readl(se->base + M_CMD_ERR_STATUS); 81*f40e7ab0SPraveen Talari __entry->geni_se_m_fw_err = readl(se->base + M_FW_ERR_STATUS); 82*f40e7ab0SPraveen Talari __entry->geni_se_tx_fifo_status = readl(se->base + SE_GENI_TX_FIFO_STATUS); 83*f40e7ab0SPraveen Talari __entry->geni_se_rx_fifo_status = readl(se->base + SE_GENI_RX_FIFO_STATUS); 84*f40e7ab0SPraveen Talari __entry->geni_se_tx_watermark = readl(se->base + SE_GENI_TX_WATERMARK_REG); 85*f40e7ab0SPraveen Talari __entry->geni_se_rx_watermark = readl(se->base + SE_GENI_RX_WATERMARK_REG); 86*f40e7ab0SPraveen Talari __entry->geni_se_rx_watermark_rfr = readl(se->base + SE_GENI_RX_RFR_WATERMARK_REG); 87*f40e7ab0SPraveen Talari __entry->geni_se_m_gp_length = readl(se->base + SE_GENI_M_GP_LENGTH); 88*f40e7ab0SPraveen Talari __entry->geni_se_s_gp_length = readl(se->base + SE_GENI_S_GP_LENGTH); 89*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_irq = readl(se->base + SE_DMA_TX_IRQ_STAT); 90*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_irq = readl(se->base + SE_DMA_RX_IRQ_STAT); 91*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_irq_en = readl(se->base + SE_DMA_TX_IRQ_EN); 92*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_irq_en = readl(se->base + SE_DMA_RX_IRQ_EN); 93*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_len = readl(se->base + SE_DMA_RX_LEN); 94*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_len_in = readl(se->base + SE_DMA_RX_LEN_IN); 95*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_len = readl(se->base + SE_DMA_TX_LEN); 96*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_len_in = readl(se->base + SE_DMA_TX_LEN_IN); 97*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_ptr_l = readl(se->base + SE_DMA_TX_PTR_L); 98*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_ptr_h = readl(se->base + SE_DMA_TX_PTR_H); 99*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_ptr_l = readl(se->base + SE_DMA_RX_PTR_L); 100*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_ptr_h = readl(se->base + SE_DMA_RX_PTR_H); 101*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_attr = readl(se->base + SE_DMA_TX_ATTR); 102*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_max_burst = readl(se->base + SE_DMA_TX_MAX_BURST); 103*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_attr = readl(se->base + SE_DMA_RX_ATTR); 104*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_max_burst = readl(se->base + SE_DMA_RX_MAX_BURST); 105*f40e7ab0SPraveen Talari __entry->geni_se_dma_if_en = readl(se->base + SE_DMA_IF_EN); 106*f40e7ab0SPraveen Talari __entry->geni_se_dma_if_en_ro = readl(se->base + DMA_IF_EN_RO); 107*f40e7ab0SPraveen Talari __entry->geni_se_dma_general_cfg = readl(se->base + DMA_GENERAL_CFG); 108*f40e7ab0SPraveen Talari __entry->geni_se_dma_qsb_trans_cfg = readl(se->base + SE_DMA_QSB_TRANS_CFG); 109*f40e7ab0SPraveen Talari __entry->geni_se_dma_dbg = readl(se->base + SE_DMA_DEBUG_REG0); 110*f40e7ab0SPraveen Talari __entry->geni_se_m_irq_en = readl(se->base + SE_GENI_M_IRQ_EN); 111*f40e7ab0SPraveen Talari __entry->geni_se_s_irq_en = readl(se->base + SE_GENI_S_IRQ_EN); 112*f40e7ab0SPraveen Talari __entry->geni_se_gsi_event_en = readl(se->base + SE_GSI_EVENT_EN); 113*f40e7ab0SPraveen Talari __entry->geni_se_irq_en = readl(se->base + SE_IRQ_EN); 114*f40e7ab0SPraveen Talari __entry->geni_se_ser_m_clk_cfg = readl(se->base + GENI_SER_M_CLK_CFG); 115*f40e7ab0SPraveen Talari __entry->geni_se_ser_s_clk_cfg = readl(se->base + GENI_SER_S_CLK_CFG); 116*f40e7ab0SPraveen Talari __entry->geni_se_general_cfg = readl(se->base + GENI_GENERAL_CFG); 117*f40e7ab0SPraveen Talari __entry->geni_se_output_ctrl = readl(se->base + GENI_OUTPUT_CTRL); 118*f40e7ab0SPraveen Talari __entry->geni_se_clk_ctrl_ro = readl(se->base + GENI_CLK_CTRL_RO); 119*f40e7ab0SPraveen Talari __entry->geni_se_fifo_if_disable = readl(se->base + GENI_IF_DISABLE_RO); 120*f40e7ab0SPraveen Talari __entry->geni_se_fw_multilock_msa = readl(se->base + GENI_FW_MULTILOCK_MSA_RO); 121*f40e7ab0SPraveen Talari __entry->geni_se_clk_sel = readl(se->base + SE_GENI_CLK_SEL); 122*f40e7ab0SPraveen Talari ), 123*f40e7ab0SPraveen Talari 124*f40e7ab0SPraveen Talari TP_printk("%s: m_cmd0=0x%08x m_irq_status=0x%08x s_cmd0=0x%08x s_irq_status=0x%08x geni_status=0x%08x geni_ios=0x%08x m_cmd_ctrl=0x%08x m_cmd_err=0x%08x m_fw_err=0x%08x tx_fifo_sts=0x%08x rx_fifo_sts=0x%08x tx_watermark=0x%08x rx_watermark=0x%08x rx_watermark_rfr=0x%08x m_gp_length=0x%08x s_gp_length=0x%08x dma_tx_irq=0x%08x dma_rx_irq=0x%08x dma_tx_irq_en=0x%08x dma_rx_irq_en=0x%08x dma_rx_len=0x%08x dma_rx_len_in=0x%08x dma_tx_len=0x%08x dma_tx_len_in=0x%08x dma_tx_ptr_l=0x%08x dma_tx_ptr_h=0x%08x dma_rx_ptr_l=0x%08x dma_rx_ptr_h=0x%08x dma_tx_attr=0x%08x dma_tx_max_burst=0x%08x dma_rx_attr=0x%08x dma_rx_max_burst=0x%08x dma_if_en=0x%08x dma_if_en_ro=0x%08x dma_general_cfg=0x%08x dma_qsb_trans_cfg=0x%08x dma_dbg=0x%08x m_irq_en=0x%08x s_irq_en=0x%08x gsi_event_en=0x%08x se_irq_en=0x%08x ser_m_clk_cfg=0x%08x ser_s_clk_cfg=0x%08x general_cfg=0x%08x output_ctrl=0x%08x clk_ctrl_ro=0x%08x fifo_if_dis=0x%08x fw_multilock_msa=0x%08x clk_sel=0x%08x", 125*f40e7ab0SPraveen Talari __get_str(geni_se_name), 126*f40e7ab0SPraveen Talari __entry->geni_se_m_cmd0, __entry->geni_se_m_irq_status, 127*f40e7ab0SPraveen Talari __entry->geni_se_s_cmd0, __entry->geni_se_s_irq_status, 128*f40e7ab0SPraveen Talari __entry->geni_se_status, __entry->geni_se_ios, 129*f40e7ab0SPraveen Talari __entry->geni_se_m_cmd_ctrl, 130*f40e7ab0SPraveen Talari __entry->geni_se_m_cmd_err, __entry->geni_se_m_fw_err, 131*f40e7ab0SPraveen Talari __entry->geni_se_tx_fifo_status, __entry->geni_se_rx_fifo_status, 132*f40e7ab0SPraveen Talari __entry->geni_se_tx_watermark, __entry->geni_se_rx_watermark, 133*f40e7ab0SPraveen Talari __entry->geni_se_rx_watermark_rfr, 134*f40e7ab0SPraveen Talari __entry->geni_se_m_gp_length, __entry->geni_se_s_gp_length, 135*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_irq, __entry->geni_se_dma_rx_irq, 136*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_irq_en, __entry->geni_se_dma_rx_irq_en, 137*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_len, __entry->geni_se_dma_rx_len_in, 138*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_len, __entry->geni_se_dma_tx_len_in, 139*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_ptr_l, __entry->geni_se_dma_tx_ptr_h, 140*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_ptr_l, __entry->geni_se_dma_rx_ptr_h, 141*f40e7ab0SPraveen Talari __entry->geni_se_dma_tx_attr, __entry->geni_se_dma_tx_max_burst, 142*f40e7ab0SPraveen Talari __entry->geni_se_dma_rx_attr, __entry->geni_se_dma_rx_max_burst, 143*f40e7ab0SPraveen Talari __entry->geni_se_dma_if_en, __entry->geni_se_dma_if_en_ro, 144*f40e7ab0SPraveen Talari __entry->geni_se_dma_general_cfg, __entry->geni_se_dma_qsb_trans_cfg, 145*f40e7ab0SPraveen Talari __entry->geni_se_dma_dbg, 146*f40e7ab0SPraveen Talari __entry->geni_se_m_irq_en, __entry->geni_se_s_irq_en, 147*f40e7ab0SPraveen Talari __entry->geni_se_gsi_event_en, __entry->geni_se_irq_en, 148*f40e7ab0SPraveen Talari __entry->geni_se_ser_m_clk_cfg, __entry->geni_se_ser_s_clk_cfg, 149*f40e7ab0SPraveen Talari __entry->geni_se_general_cfg, __entry->geni_se_output_ctrl, 150*f40e7ab0SPraveen Talari __entry->geni_se_clk_ctrl_ro, __entry->geni_se_fifo_if_disable, 151*f40e7ab0SPraveen Talari __entry->geni_se_fw_multilock_msa, __entry->geni_se_clk_sel) 152*f40e7ab0SPraveen Talari ); 153*f40e7ab0SPraveen Talari 154*f40e7ab0SPraveen Talari #endif /* _TRACE_QCOM_GENI_SE_H */ 155*f40e7ab0SPraveen Talari 156*f40e7ab0SPraveen Talari /* This part must be outside protection */ 157*f40e7ab0SPraveen Talari #include <trace/define_trace.h> 158