1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2e3d280fcSTakashi Iwai /* 3e3d280fcSTakashi Iwai * HD-audio core stuff 4e3d280fcSTakashi Iwai */ 5e3d280fcSTakashi Iwai 6e3d280fcSTakashi Iwai #ifndef __SOUND_HDAUDIO_H 7e3d280fcSTakashi Iwai #define __SOUND_HDAUDIO_H 8e3d280fcSTakashi Iwai 9e3d280fcSTakashi Iwai #include <linux/device.h> 1014752412STakashi Iwai #include <linux/interrupt.h> 114d024fe8STakashi Iwai #include <linux/io.h> 12feb20faeSTakashi Iwai #include <linux/pm_runtime.h> 1314752412STakashi Iwai #include <linux/timecounter.h> 1414752412STakashi Iwai #include <sound/core.h> 15a6ea5fe9STakashi Iwai #include <sound/pcm.h> 1614752412STakashi Iwai #include <sound/memalloc.h> 17d068ebc2STakashi Iwai #include <sound/hda_verbs.h> 1898d8fc6cSMengdong Lin #include <drm/i915_component.h> 19d068ebc2STakashi Iwai 207639a06cSTakashi Iwai /* codec node id */ 217639a06cSTakashi Iwai typedef u16 hda_nid_t; 227639a06cSTakashi Iwai 23d068ebc2STakashi Iwai struct hdac_bus; 2414752412STakashi Iwai struct hdac_stream; 25d068ebc2STakashi Iwai struct hdac_device; 26d068ebc2STakashi Iwai struct hdac_driver; 273256be65STakashi Iwai struct hdac_widget_tree; 28da23ac1eSSubhransu S. Prusty struct hda_device_id; 29e3d280fcSTakashi Iwai 30e3d280fcSTakashi Iwai /* 31e3d280fcSTakashi Iwai * exported bus type 32e3d280fcSTakashi Iwai */ 33e3d280fcSTakashi Iwai extern struct bus_type snd_hda_bus_type; 34e3d280fcSTakashi Iwai 35e3d280fcSTakashi Iwai /* 3671fc4c7eSTakashi Iwai * generic arrays 3771fc4c7eSTakashi Iwai */ 3871fc4c7eSTakashi Iwai struct snd_array { 3971fc4c7eSTakashi Iwai unsigned int used; 4071fc4c7eSTakashi Iwai unsigned int alloced; 4171fc4c7eSTakashi Iwai unsigned int elem_size; 4271fc4c7eSTakashi Iwai unsigned int alloc_align; 4371fc4c7eSTakashi Iwai void *list; 4471fc4c7eSTakashi Iwai }; 4571fc4c7eSTakashi Iwai 4671fc4c7eSTakashi Iwai /* 47e3d280fcSTakashi Iwai * HD-audio codec base device 48e3d280fcSTakashi Iwai */ 49e3d280fcSTakashi Iwai struct hdac_device { 50e3d280fcSTakashi Iwai struct device dev; 51e3d280fcSTakashi Iwai int type; 52d068ebc2STakashi Iwai struct hdac_bus *bus; 53d068ebc2STakashi Iwai unsigned int addr; /* codec address */ 54d068ebc2STakashi Iwai struct list_head list; /* list point for bus codec_list */ 557639a06cSTakashi Iwai 567639a06cSTakashi Iwai hda_nid_t afg; /* AFG node id */ 577639a06cSTakashi Iwai hda_nid_t mfg; /* MFG node id */ 587639a06cSTakashi Iwai 597639a06cSTakashi Iwai /* ids */ 607639a06cSTakashi Iwai unsigned int vendor_id; 617639a06cSTakashi Iwai unsigned int subsystem_id; 627639a06cSTakashi Iwai unsigned int revision_id; 637639a06cSTakashi Iwai unsigned int afg_function_id; 647639a06cSTakashi Iwai unsigned int mfg_function_id; 657639a06cSTakashi Iwai unsigned int afg_unsol:1; 667639a06cSTakashi Iwai unsigned int mfg_unsol:1; 677639a06cSTakashi Iwai 687639a06cSTakashi Iwai unsigned int power_caps; /* FG power caps */ 697639a06cSTakashi Iwai 707639a06cSTakashi Iwai const char *vendor_name; /* codec vendor name */ 717639a06cSTakashi Iwai const char *chip_name; /* codec chip name */ 727639a06cSTakashi Iwai 7305852448STakashi Iwai /* verb exec op override */ 7405852448STakashi Iwai int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, 7505852448STakashi Iwai unsigned int flags, unsigned int *res); 7605852448STakashi Iwai 777639a06cSTakashi Iwai /* widgets */ 787639a06cSTakashi Iwai unsigned int num_nodes; 797639a06cSTakashi Iwai hda_nid_t start_nid, end_nid; 807639a06cSTakashi Iwai 817639a06cSTakashi Iwai /* misc flags */ 827639a06cSTakashi Iwai atomic_t in_pm; /* suspend/resume being performed */ 833256be65STakashi Iwai 843256be65STakashi Iwai /* sysfs */ 85ed180abbSAmadeusz Sławiński struct mutex widget_lock; 863256be65STakashi Iwai struct hdac_widget_tree *widgets; 874d75faa0STakashi Iwai 884d75faa0STakashi Iwai /* regmap */ 894d75faa0STakashi Iwai struct regmap *regmap; 901a462be5STakashi Iwai struct mutex regmap_lock; 915e56bceaSTakashi Iwai struct snd_array vendor_verbs; 924d75faa0STakashi Iwai bool lazy_cache:1; /* don't wake up for writes */ 93faa75f8aSTakashi Iwai bool caps_overwriting:1; /* caps overwrite being in process */ 9440ba66a7STakashi Iwai bool cache_coef:1; /* cache COEF read/write too */ 95e3d280fcSTakashi Iwai }; 96e3d280fcSTakashi Iwai 97e3d280fcSTakashi Iwai /* device/driver type used for matching */ 98e3d280fcSTakashi Iwai enum { 99e3d280fcSTakashi Iwai HDA_DEV_CORE, 100e3d280fcSTakashi Iwai HDA_DEV_LEGACY, 101c1cc18b1SRamesh Babu HDA_DEV_ASOC, 102e3d280fcSTakashi Iwai }; 103e3d280fcSTakashi Iwai 104d82b51c8SPierre-Louis Bossart enum { 105d82b51c8SPierre-Louis Bossart SND_SKL_PCI_BIND_AUTO, /* automatic selection based on pci class */ 106d82b51c8SPierre-Louis Bossart SND_SKL_PCI_BIND_LEGACY,/* bind only with legacy driver */ 107d82b51c8SPierre-Louis Bossart SND_SKL_PCI_BIND_ASOC /* bind only with ASoC driver */ 108d82b51c8SPierre-Louis Bossart }; 109d82b51c8SPierre-Louis Bossart 1107639a06cSTakashi Iwai /* direction */ 1117639a06cSTakashi Iwai enum { 1127639a06cSTakashi Iwai HDA_INPUT, HDA_OUTPUT 1137639a06cSTakashi Iwai }; 1147639a06cSTakashi Iwai 115e3d280fcSTakashi Iwai #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev) 116e3d280fcSTakashi Iwai 1177639a06cSTakashi Iwai int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus, 1187639a06cSTakashi Iwai const char *name, unsigned int addr); 1197639a06cSTakashi Iwai void snd_hdac_device_exit(struct hdac_device *dev); 1203256be65STakashi Iwai int snd_hdac_device_register(struct hdac_device *codec); 1213256be65STakashi Iwai void snd_hdac_device_unregister(struct hdac_device *codec); 122ded255beSTakashi Iwai int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name); 1234f9e0c38STakashi Iwai int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size); 1247639a06cSTakashi Iwai 125774a075aSTakashi Iwai int snd_hdac_refresh_widgets(struct hdac_device *codec); 1267639a06cSTakashi Iwai 1277639a06cSTakashi Iwai int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid, 1287639a06cSTakashi Iwai unsigned int verb, unsigned int parm, unsigned int *res); 12901ed3c06STakashi Iwai int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm, 13001ed3c06STakashi Iwai unsigned int *res); 1319ba17b4dSTakashi Iwai int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid, 1329ba17b4dSTakashi Iwai int parm); 133faa75f8aSTakashi Iwai int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid, 134faa75f8aSTakashi Iwai unsigned int parm, unsigned int val); 1357639a06cSTakashi Iwai int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid, 1367639a06cSTakashi Iwai hda_nid_t *conn_list, int max_conns); 1377639a06cSTakashi Iwai int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid, 1387639a06cSTakashi Iwai hda_nid_t *start_id); 139b7d023e1STakashi Iwai unsigned int snd_hdac_calc_stream_format(unsigned int rate, 140b7d023e1STakashi Iwai unsigned int channels, 141a6ea5fe9STakashi Iwai snd_pcm_format_t format, 142b7d023e1STakashi Iwai unsigned int maxbps, 143b7d023e1STakashi Iwai unsigned short spdif_ctls); 144b7d023e1STakashi Iwai int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid, 145b7d023e1STakashi Iwai u32 *ratesp, u64 *formatsp, unsigned int *bpsp); 146b7d023e1STakashi Iwai bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid, 147b7d023e1STakashi Iwai unsigned int format); 1487639a06cSTakashi Iwai 1491b5e6167SSubhransu S. Prusty int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid, 1501b5e6167SSubhransu S. Prusty int flags, unsigned int verb, unsigned int parm); 1511b5e6167SSubhransu S. Prusty int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid, 1521b5e6167SSubhransu S. Prusty int flags, unsigned int verb, unsigned int parm); 1531b5e6167SSubhransu S. Prusty bool snd_hdac_check_power_state(struct hdac_device *hdac, 1541b5e6167SSubhransu S. Prusty hda_nid_t nid, unsigned int target_state); 15509787492SAbhijeet Kumar unsigned int snd_hdac_sync_power_state(struct hdac_device *hdac, 15609787492SAbhijeet Kumar hda_nid_t nid, unsigned int target_state); 15701ed3c06STakashi Iwai /** 15801ed3c06STakashi Iwai * snd_hdac_read_parm - read a codec parameter 15901ed3c06STakashi Iwai * @codec: the codec object 16001ed3c06STakashi Iwai * @nid: NID to read a parameter 16101ed3c06STakashi Iwai * @parm: parameter to read 16201ed3c06STakashi Iwai * 16301ed3c06STakashi Iwai * Returns -1 for error. If you need to distinguish the error more 16401ed3c06STakashi Iwai * strictly, use _snd_hdac_read_parm() directly. 16501ed3c06STakashi Iwai */ 16601ed3c06STakashi Iwai static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, 16701ed3c06STakashi Iwai int parm) 16801ed3c06STakashi Iwai { 16901ed3c06STakashi Iwai unsigned int val; 17001ed3c06STakashi Iwai 17101ed3c06STakashi Iwai return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val; 17201ed3c06STakashi Iwai } 17301ed3c06STakashi Iwai 1747639a06cSTakashi Iwai #ifdef CONFIG_PM 175fbce23a0STakashi Iwai int snd_hdac_power_up(struct hdac_device *codec); 176fbce23a0STakashi Iwai int snd_hdac_power_down(struct hdac_device *codec); 177fbce23a0STakashi Iwai int snd_hdac_power_up_pm(struct hdac_device *codec); 178fbce23a0STakashi Iwai int snd_hdac_power_down_pm(struct hdac_device *codec); 179fc4f000bSTakashi Iwai int snd_hdac_keep_power_up(struct hdac_device *codec); 180feb20faeSTakashi Iwai 181feb20faeSTakashi Iwai /* call this at entering into suspend/resume callbacks in codec driver */ 182feb20faeSTakashi Iwai static inline void snd_hdac_enter_pm(struct hdac_device *codec) 183feb20faeSTakashi Iwai { 184feb20faeSTakashi Iwai atomic_inc(&codec->in_pm); 185feb20faeSTakashi Iwai } 186feb20faeSTakashi Iwai 187feb20faeSTakashi Iwai /* call this at leaving from suspend/resume callbacks in codec driver */ 188feb20faeSTakashi Iwai static inline void snd_hdac_leave_pm(struct hdac_device *codec) 189feb20faeSTakashi Iwai { 190feb20faeSTakashi Iwai atomic_dec(&codec->in_pm); 191feb20faeSTakashi Iwai } 192feb20faeSTakashi Iwai 193feb20faeSTakashi Iwai static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) 194feb20faeSTakashi Iwai { 195feb20faeSTakashi Iwai return atomic_read(&codec->in_pm); 196feb20faeSTakashi Iwai } 197feb20faeSTakashi Iwai 198feb20faeSTakashi Iwai static inline bool snd_hdac_is_power_on(struct hdac_device *codec) 199feb20faeSTakashi Iwai { 200feb20faeSTakashi Iwai return !pm_runtime_suspended(&codec->dev); 201feb20faeSTakashi Iwai } 2027639a06cSTakashi Iwai #else 203fbce23a0STakashi Iwai static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; } 204fbce23a0STakashi Iwai static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; } 205fbce23a0STakashi Iwai static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; } 206fbce23a0STakashi Iwai static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; } 207fc4f000bSTakashi Iwai static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; } 208feb20faeSTakashi Iwai static inline void snd_hdac_enter_pm(struct hdac_device *codec) {} 209feb20faeSTakashi Iwai static inline void snd_hdac_leave_pm(struct hdac_device *codec) {} 21079263c3bSJason Yan static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return false; } 21179263c3bSJason Yan static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return true; } 2127639a06cSTakashi Iwai #endif 2137639a06cSTakashi Iwai 214e3d280fcSTakashi Iwai /* 215e3d280fcSTakashi Iwai * HD-audio codec base driver 216e3d280fcSTakashi Iwai */ 217e3d280fcSTakashi Iwai struct hdac_driver { 218e3d280fcSTakashi Iwai struct device_driver driver; 219e3d280fcSTakashi Iwai int type; 220ec71efc9SVinod Koul const struct hda_device_id *id_table; 221e3d280fcSTakashi Iwai int (*match)(struct hdac_device *dev, struct hdac_driver *drv); 222d068ebc2STakashi Iwai void (*unsol_event)(struct hdac_device *dev, unsigned int event); 223e1df9317SRakesh Ughreja 224e1df9317SRakesh Ughreja /* fields used by ext bus APIs */ 225e1df9317SRakesh Ughreja int (*probe)(struct hdac_device *dev); 226e1df9317SRakesh Ughreja int (*remove)(struct hdac_device *dev); 227e1df9317SRakesh Ughreja void (*shutdown)(struct hdac_device *dev); 228e3d280fcSTakashi Iwai }; 229e3d280fcSTakashi Iwai 230e3d280fcSTakashi Iwai #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver) 231e3d280fcSTakashi Iwai 232ec71efc9SVinod Koul const struct hda_device_id * 233ec71efc9SVinod Koul hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv); 234ec71efc9SVinod Koul 235d068ebc2STakashi Iwai /* 23614752412STakashi Iwai * Bus verb operators 237d068ebc2STakashi Iwai */ 238d068ebc2STakashi Iwai struct hdac_bus_ops { 239d068ebc2STakashi Iwai /* send a single command */ 240d068ebc2STakashi Iwai int (*command)(struct hdac_bus *bus, unsigned int cmd); 241d068ebc2STakashi Iwai /* get a response from the last command */ 242d068ebc2STakashi Iwai int (*get_response)(struct hdac_bus *bus, unsigned int addr, 243d068ebc2STakashi Iwai unsigned int *res); 244d068ebc2STakashi Iwai }; 245d068ebc2STakashi Iwai 24614752412STakashi Iwai /* 247cb04ba33SRakesh Ughreja * ops used for ASoC HDA codec drivers 248cb04ba33SRakesh Ughreja */ 249cb04ba33SRakesh Ughreja struct hdac_ext_bus_ops { 250cb04ba33SRakesh Ughreja int (*hdev_attach)(struct hdac_device *hdev); 251cb04ba33SRakesh Ughreja int (*hdev_detach)(struct hdac_device *hdev); 252cb04ba33SRakesh Ughreja }; 253cb04ba33SRakesh Ughreja 25414752412STakashi Iwai #define HDA_UNSOL_QUEUE_SIZE 64 25514752412STakashi Iwai #define HDA_MAX_CODECS 8 /* limit by controller side */ 25614752412STakashi Iwai 25714752412STakashi Iwai /* 25814752412STakashi Iwai * CORB/RIRB 25914752412STakashi Iwai * 26014752412STakashi Iwai * Each CORB entry is 4byte, RIRB is 8byte 26114752412STakashi Iwai */ 26214752412STakashi Iwai struct hdac_rb { 26314752412STakashi Iwai __le32 *buf; /* virtual address of CORB/RIRB buffer */ 26414752412STakashi Iwai dma_addr_t addr; /* physical address of CORB/RIRB buffer */ 26514752412STakashi Iwai unsigned short rp, wp; /* RIRB read/write pointers */ 26614752412STakashi Iwai int cmds[HDA_MAX_CODECS]; /* number of pending requests */ 26714752412STakashi Iwai u32 res[HDA_MAX_CODECS]; /* last read value */ 26814752412STakashi Iwai }; 26914752412STakashi Iwai 27014752412STakashi Iwai /* 27114752412STakashi Iwai * HD-audio bus base driver 2726720b384SVinod Koul * 2736720b384SVinod Koul * @ppcap: pp capabilities pointer 2746720b384SVinod Koul * @spbcap: SPIB capabilities pointer 2756720b384SVinod Koul * @mlcap: MultiLink capabilities pointer 2766720b384SVinod Koul * @gtscap: gts capabilities pointer 2776720b384SVinod Koul * @drsmcap: dma resume capabilities pointer 27876f56faeSRakesh Ughreja * @num_streams: streams supported 27976f56faeSRakesh Ughreja * @idx: HDA link index 28076f56faeSRakesh Ughreja * @hlink_list: link list of HDA links 281e61ab9f0STakashi Iwai * @lock: lock for link and display power mgmt 28276f56faeSRakesh Ughreja * @cmd_dma_state: state of cmd DMAs: CORB and RIRB 28314752412STakashi Iwai */ 284d068ebc2STakashi Iwai struct hdac_bus { 285d068ebc2STakashi Iwai struct device *dev; 286d068ebc2STakashi Iwai const struct hdac_bus_ops *ops; 287cb04ba33SRakesh Ughreja const struct hdac_ext_bus_ops *ext_ops; 28814752412STakashi Iwai 28914752412STakashi Iwai /* h/w resources */ 29014752412STakashi Iwai unsigned long addr; 29114752412STakashi Iwai void __iomem *remap_addr; 29214752412STakashi Iwai int irq; 293d068ebc2STakashi Iwai 2946720b384SVinod Koul void __iomem *ppcap; 2956720b384SVinod Koul void __iomem *spbcap; 2966720b384SVinod Koul void __iomem *mlcap; 2976720b384SVinod Koul void __iomem *gtscap; 2986720b384SVinod Koul void __iomem *drsmcap; 2996720b384SVinod Koul 300d068ebc2STakashi Iwai /* codec linked list */ 301d068ebc2STakashi Iwai struct list_head codec_list; 302d068ebc2STakashi Iwai unsigned int num_codecs; 303d068ebc2STakashi Iwai 304d068ebc2STakashi Iwai /* link caddr -> codec */ 305d068ebc2STakashi Iwai struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; 306d068ebc2STakashi Iwai 307d068ebc2STakashi Iwai /* unsolicited event queue */ 308d068ebc2STakashi Iwai u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */ 309d068ebc2STakashi Iwai unsigned int unsol_rp, unsol_wp; 310d068ebc2STakashi Iwai struct work_struct unsol_work; 311d068ebc2STakashi Iwai 31214752412STakashi Iwai /* bit flags of detected codecs */ 31314752412STakashi Iwai unsigned long codec_mask; 31414752412STakashi Iwai 315d068ebc2STakashi Iwai /* bit flags of powered codecs */ 316d068ebc2STakashi Iwai unsigned long codec_powered; 317d068ebc2STakashi Iwai 31814752412STakashi Iwai /* CORB/RIRB */ 31914752412STakashi Iwai struct hdac_rb corb; 32014752412STakashi Iwai struct hdac_rb rirb; 32114752412STakashi Iwai unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */ 32288452da9STakashi Iwai wait_queue_head_t rirb_wq; 32314752412STakashi Iwai 32414752412STakashi Iwai /* CORB/RIRB and position buffers */ 32514752412STakashi Iwai struct snd_dma_buffer rb; 32614752412STakashi Iwai struct snd_dma_buffer posbuf; 327619a1f19STakashi Iwai int dma_type; /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */ 32814752412STakashi Iwai 32914752412STakashi Iwai /* hdac_stream linked list */ 33014752412STakashi Iwai struct list_head stream_list; 33114752412STakashi Iwai 33214752412STakashi Iwai /* operation state */ 33314752412STakashi Iwai bool chip_init:1; /* h/w initialized */ 33414752412STakashi Iwai 33514752412STakashi Iwai /* behavior flags */ 3364d024fe8STakashi Iwai bool aligned_mmio:1; /* aligned MMIO access */ 337d068ebc2STakashi Iwai bool sync_write:1; /* sync after verb write */ 33814752412STakashi Iwai bool use_posbuf:1; /* use position buffer */ 33914752412STakashi Iwai bool snoop:1; /* enable snooping */ 34014752412STakashi Iwai bool align_bdle_4k:1; /* BDLE align 4K boundary */ 34114752412STakashi Iwai bool reverse_assign:1; /* assign devices in reverse order */ 34214752412STakashi Iwai bool corbrp_self_clear:1; /* CORBRP clears itself after reset */ 3438af42130SBard Liao bool polling_mode:1; 3445f2cb361STakashi Iwai bool needs_damn_long_delay:1; 3458af42130SBard Liao 3468af42130SBard Liao int poll_count; 34714752412STakashi Iwai 34814752412STakashi Iwai int bdl_pos_adj; /* BDL position adjustment */ 349d068ebc2STakashi Iwai 350*4106820bSMohan Kumar /* delay time in us for dma stop */ 351*4106820bSMohan Kumar unsigned int dma_stop_delay; 352*4106820bSMohan Kumar 353d068ebc2STakashi Iwai /* locks */ 35414752412STakashi Iwai spinlock_t reg_lock; 355d068ebc2STakashi Iwai struct mutex cmd_mutex; 356e61ab9f0STakashi Iwai struct mutex lock; 35798d8fc6cSMengdong Lin 358ae891abeSTakashi Iwai /* DRM component interface */ 359ae891abeSTakashi Iwai struct drm_audio_component *audio_component; 360029d92c2STakashi Iwai long display_power_status; 361d31c85fcSChris Wilson unsigned long display_power_active; 36276f56faeSRakesh Ughreja 36376f56faeSRakesh Ughreja /* parameters required for enhanced capabilities */ 36476f56faeSRakesh Ughreja int num_streams; 36576f56faeSRakesh Ughreja int idx; 36676f56faeSRakesh Ughreja 367e61ab9f0STakashi Iwai /* link management */ 36876f56faeSRakesh Ughreja struct list_head hlink_list; 36976f56faeSRakesh Ughreja bool cmd_dma_state; 37067ae482aSSameer Pujar 37167ae482aSSameer Pujar /* factor used to derive STRIPE control value */ 37267ae482aSSameer Pujar unsigned int sdo_limit; 373d068ebc2STakashi Iwai }; 374d068ebc2STakashi Iwai 375d068ebc2STakashi Iwai int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev, 37619abfefdSTakashi Iwai const struct hdac_bus_ops *ops); 377d068ebc2STakashi Iwai void snd_hdac_bus_exit(struct hdac_bus *bus); 378d068ebc2STakashi Iwai int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr, 379d068ebc2STakashi Iwai unsigned int cmd, unsigned int *res); 380d068ebc2STakashi Iwai 3817639a06cSTakashi Iwai static inline void snd_hdac_codec_link_up(struct hdac_device *codec) 3827639a06cSTakashi Iwai { 3837639a06cSTakashi Iwai set_bit(codec->addr, &codec->bus->codec_powered); 3847639a06cSTakashi Iwai } 3857639a06cSTakashi Iwai 3867639a06cSTakashi Iwai static inline void snd_hdac_codec_link_down(struct hdac_device *codec) 3877639a06cSTakashi Iwai { 3887639a06cSTakashi Iwai clear_bit(codec->addr, &codec->bus->codec_powered); 3897639a06cSTakashi Iwai } 3907639a06cSTakashi Iwai 39114752412STakashi Iwai int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val); 39214752412STakashi Iwai int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr, 39314752412STakashi Iwai unsigned int *res); 3946720b384SVinod Koul int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus); 39514752412STakashi Iwai 39614752412STakashi Iwai bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset); 39714752412STakashi Iwai void snd_hdac_bus_stop_chip(struct hdac_bus *bus); 39814752412STakashi Iwai void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus); 39914752412STakashi Iwai void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus); 40014752412STakashi Iwai void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus); 40114752412STakashi Iwai void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus); 40275383f8dSYu Zhao int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset); 40314752412STakashi Iwai 40414752412STakashi Iwai void snd_hdac_bus_update_rirb(struct hdac_bus *bus); 405473f4145STakashi Iwai int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status, 40614752412STakashi Iwai void (*ack)(struct hdac_bus *, 40714752412STakashi Iwai struct hdac_stream *)); 40814752412STakashi Iwai 409304dad30SJeeja KP int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus); 410304dad30SJeeja KP void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus); 411304dad30SJeeja KP 41219abfefdSTakashi Iwai #ifdef CONFIG_SND_HDA_ALIGNED_MMIO 41319abfefdSTakashi Iwai unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask); 41419abfefdSTakashi Iwai void snd_hdac_aligned_write(unsigned int val, void __iomem *addr, 41519abfefdSTakashi Iwai unsigned int mask); 4164d024fe8STakashi Iwai #define snd_hdac_aligned_mmio(bus) (bus)->aligned_mmio 4174d024fe8STakashi Iwai #else 4184d024fe8STakashi Iwai #define snd_hdac_aligned_mmio(bus) false 4194d024fe8STakashi Iwai #define snd_hdac_aligned_read(addr, mask) 0 4204d024fe8STakashi Iwai #define snd_hdac_aligned_write(val, addr, mask) do {} while (0) 4214d024fe8STakashi Iwai #endif 4224d024fe8STakashi Iwai 4234d024fe8STakashi Iwai static inline void snd_hdac_reg_writeb(struct hdac_bus *bus, void __iomem *addr, 4244d024fe8STakashi Iwai u8 val) 4254d024fe8STakashi Iwai { 4264d024fe8STakashi Iwai if (snd_hdac_aligned_mmio(bus)) 4274d024fe8STakashi Iwai snd_hdac_aligned_write(val, addr, 0xff); 4284d024fe8STakashi Iwai else 4294d024fe8STakashi Iwai writeb(val, addr); 4304d024fe8STakashi Iwai } 4314d024fe8STakashi Iwai 4324d024fe8STakashi Iwai static inline void snd_hdac_reg_writew(struct hdac_bus *bus, void __iomem *addr, 4334d024fe8STakashi Iwai u16 val) 4344d024fe8STakashi Iwai { 4354d024fe8STakashi Iwai if (snd_hdac_aligned_mmio(bus)) 4364d024fe8STakashi Iwai snd_hdac_aligned_write(val, addr, 0xffff); 4374d024fe8STakashi Iwai else 4384d024fe8STakashi Iwai writew(val, addr); 4394d024fe8STakashi Iwai } 4404d024fe8STakashi Iwai 4414d024fe8STakashi Iwai static inline u8 snd_hdac_reg_readb(struct hdac_bus *bus, void __iomem *addr) 4424d024fe8STakashi Iwai { 4434d024fe8STakashi Iwai return snd_hdac_aligned_mmio(bus) ? 4444d024fe8STakashi Iwai snd_hdac_aligned_read(addr, 0xff) : readb(addr); 4454d024fe8STakashi Iwai } 4464d024fe8STakashi Iwai 4474d024fe8STakashi Iwai static inline u16 snd_hdac_reg_readw(struct hdac_bus *bus, void __iomem *addr) 4484d024fe8STakashi Iwai { 4494d024fe8STakashi Iwai return snd_hdac_aligned_mmio(bus) ? 4504d024fe8STakashi Iwai snd_hdac_aligned_read(addr, 0xffff) : readw(addr); 4514d024fe8STakashi Iwai } 4524d024fe8STakashi Iwai 4534d024fe8STakashi Iwai #define snd_hdac_reg_writel(bus, addr, val) writel(val, addr) 4544d024fe8STakashi Iwai #define snd_hdac_reg_readl(bus, addr) readl(addr) 45519abfefdSTakashi Iwai 45614752412STakashi Iwai /* 45714752412STakashi Iwai * macros for easy use 45814752412STakashi Iwai */ 4592c1f8138STakashi Iwai #define _snd_hdac_chip_writeb(chip, reg, value) \ 4604d024fe8STakashi Iwai snd_hdac_reg_writeb(chip, (chip)->remap_addr + (reg), value) 4612c1f8138STakashi Iwai #define _snd_hdac_chip_readb(chip, reg) \ 4624d024fe8STakashi Iwai snd_hdac_reg_readb(chip, (chip)->remap_addr + (reg)) 4632c1f8138STakashi Iwai #define _snd_hdac_chip_writew(chip, reg, value) \ 4644d024fe8STakashi Iwai snd_hdac_reg_writew(chip, (chip)->remap_addr + (reg), value) 4652c1f8138STakashi Iwai #define _snd_hdac_chip_readw(chip, reg) \ 4664d024fe8STakashi Iwai snd_hdac_reg_readw(chip, (chip)->remap_addr + (reg)) 4672c1f8138STakashi Iwai #define _snd_hdac_chip_writel(chip, reg, value) \ 4684d024fe8STakashi Iwai snd_hdac_reg_writel(chip, (chip)->remap_addr + (reg), value) 4692c1f8138STakashi Iwai #define _snd_hdac_chip_readl(chip, reg) \ 4704d024fe8STakashi Iwai snd_hdac_reg_readl(chip, (chip)->remap_addr + (reg)) 47114752412STakashi Iwai 47214752412STakashi Iwai /* read/write a register, pass without AZX_REG_ prefix */ 47314752412STakashi Iwai #define snd_hdac_chip_writel(chip, reg, value) \ 4742c1f8138STakashi Iwai _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value) 47514752412STakashi Iwai #define snd_hdac_chip_writew(chip, reg, value) \ 4762c1f8138STakashi Iwai _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value) 47714752412STakashi Iwai #define snd_hdac_chip_writeb(chip, reg, value) \ 4782c1f8138STakashi Iwai _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value) 47914752412STakashi Iwai #define snd_hdac_chip_readl(chip, reg) \ 4802c1f8138STakashi Iwai _snd_hdac_chip_readl(chip, AZX_REG_ ## reg) 48114752412STakashi Iwai #define snd_hdac_chip_readw(chip, reg) \ 4822c1f8138STakashi Iwai _snd_hdac_chip_readw(chip, AZX_REG_ ## reg) 48314752412STakashi Iwai #define snd_hdac_chip_readb(chip, reg) \ 4842c1f8138STakashi Iwai _snd_hdac_chip_readb(chip, AZX_REG_ ## reg) 48514752412STakashi Iwai 48614752412STakashi Iwai /* update a register, pass without AZX_REG_ prefix */ 48714752412STakashi Iwai #define snd_hdac_chip_updatel(chip, reg, mask, val) \ 48814752412STakashi Iwai snd_hdac_chip_writel(chip, reg, \ 48914752412STakashi Iwai (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val)) 49014752412STakashi Iwai #define snd_hdac_chip_updatew(chip, reg, mask, val) \ 49114752412STakashi Iwai snd_hdac_chip_writew(chip, reg, \ 49214752412STakashi Iwai (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val)) 49314752412STakashi Iwai #define snd_hdac_chip_updateb(chip, reg, mask, val) \ 49414752412STakashi Iwai snd_hdac_chip_writeb(chip, reg, \ 49514752412STakashi Iwai (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val)) 49614752412STakashi Iwai 49714752412STakashi Iwai /* 49814752412STakashi Iwai * HD-audio stream 49914752412STakashi Iwai */ 50014752412STakashi Iwai struct hdac_stream { 50114752412STakashi Iwai struct hdac_bus *bus; 50214752412STakashi Iwai struct snd_dma_buffer bdl; /* BDL buffer */ 50314752412STakashi Iwai __le32 *posbuf; /* position buffer pointer */ 50414752412STakashi Iwai int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */ 50514752412STakashi Iwai 50614752412STakashi Iwai unsigned int bufsize; /* size of the play buffer in bytes */ 50714752412STakashi Iwai unsigned int period_bytes; /* size of the period in bytes */ 50814752412STakashi Iwai unsigned int frags; /* number for period in the play buffer */ 50914752412STakashi Iwai unsigned int fifo_size; /* FIFO size */ 51014752412STakashi Iwai 51114752412STakashi Iwai void __iomem *sd_addr; /* stream descriptor pointer */ 51214752412STakashi Iwai 51314752412STakashi Iwai u32 sd_int_sta_mask; /* stream int status mask */ 51414752412STakashi Iwai 51514752412STakashi Iwai /* pcm support */ 51614752412STakashi Iwai struct snd_pcm_substream *substream; /* assigned substream, 51714752412STakashi Iwai * set in PCM open 51814752412STakashi Iwai */ 5194a9ce6e4SCezary Rojewski struct snd_compr_stream *cstream; 52014752412STakashi Iwai unsigned int format_val; /* format value to be set in the 52114752412STakashi Iwai * controller and the codec 52214752412STakashi Iwai */ 52314752412STakashi Iwai unsigned char stream_tag; /* assigned stream */ 52414752412STakashi Iwai unsigned char index; /* stream index */ 52514752412STakashi Iwai int assigned_key; /* last device# key assigned to */ 52614752412STakashi Iwai 52714752412STakashi Iwai bool opened:1; 52814752412STakashi Iwai bool running:1; 5296d23c8f5STakashi Iwai bool prepared:1; 53014752412STakashi Iwai bool no_period_wakeup:1; 5318f3f600bSTakashi Iwai bool locked:1; 532e38e486dSTakashi Iwai bool stripe:1; /* apply stripe control */ 53314752412STakashi Iwai 5344a9ce6e4SCezary Rojewski u64 curr_pos; 53514752412STakashi Iwai /* timestamp */ 53614752412STakashi Iwai unsigned long start_wallclk; /* start + minimum wallclk */ 53714752412STakashi Iwai unsigned long period_wallclk; /* wallclk for period */ 53814752412STakashi Iwai struct timecounter tc; 53914752412STakashi Iwai struct cyclecounter cc; 54014752412STakashi Iwai int delay_negative_threshold; 54114752412STakashi Iwai 54214752412STakashi Iwai struct list_head list; 5438f3f600bSTakashi Iwai #ifdef CONFIG_SND_HDA_DSP_LOADER 5448f3f600bSTakashi Iwai /* DSP access mutex */ 5458f3f600bSTakashi Iwai struct mutex dsp_mutex; 5468f3f600bSTakashi Iwai #endif 54714752412STakashi Iwai }; 54814752412STakashi Iwai 54914752412STakashi Iwai void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev, 55014752412STakashi Iwai int idx, int direction, int tag); 55114752412STakashi Iwai struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus, 55214752412STakashi Iwai struct snd_pcm_substream *substream); 55314752412STakashi Iwai void snd_hdac_stream_release(struct hdac_stream *azx_dev); 5544308c9b0SJeeja KP struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus, 5554308c9b0SJeeja KP int dir, int stream_tag); 55614752412STakashi Iwai 55714752412STakashi Iwai int snd_hdac_stream_setup(struct hdac_stream *azx_dev); 55814752412STakashi Iwai void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev); 55914752412STakashi Iwai int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev); 56086f6501bSJeeja KP int snd_hdac_stream_set_params(struct hdac_stream *azx_dev, 56186f6501bSJeeja KP unsigned int format_val); 56214752412STakashi Iwai void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start); 56314752412STakashi Iwai void snd_hdac_stream_clear(struct hdac_stream *azx_dev); 56414752412STakashi Iwai void snd_hdac_stream_stop(struct hdac_stream *azx_dev); 56514752412STakashi Iwai void snd_hdac_stream_reset(struct hdac_stream *azx_dev); 56614752412STakashi Iwai void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set, 56714752412STakashi Iwai unsigned int streams, unsigned int reg); 56814752412STakashi Iwai void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start, 56914752412STakashi Iwai unsigned int streams); 57014752412STakashi Iwai void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev, 57114752412STakashi Iwai unsigned int streams); 5725dd3d271SSameer Pujar int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus, 5735dd3d271SSameer Pujar struct snd_pcm_substream *substream); 5745dd3d271SSameer Pujar 57514752412STakashi Iwai /* 57614752412STakashi Iwai * macros for easy use 57714752412STakashi Iwai */ 57814752412STakashi Iwai /* read/write a register, pass without AZX_REG_ prefix */ 57914752412STakashi Iwai #define snd_hdac_stream_writel(dev, reg, value) \ 5804d024fe8STakashi Iwai snd_hdac_reg_writel((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 58114752412STakashi Iwai #define snd_hdac_stream_writew(dev, reg, value) \ 5824d024fe8STakashi Iwai snd_hdac_reg_writew((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 58314752412STakashi Iwai #define snd_hdac_stream_writeb(dev, reg, value) \ 5844d024fe8STakashi Iwai snd_hdac_reg_writeb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 58514752412STakashi Iwai #define snd_hdac_stream_readl(dev, reg) \ 5864d024fe8STakashi Iwai snd_hdac_reg_readl((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 58714752412STakashi Iwai #define snd_hdac_stream_readw(dev, reg) \ 5884d024fe8STakashi Iwai snd_hdac_reg_readw((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 58914752412STakashi Iwai #define snd_hdac_stream_readb(dev, reg) \ 5904d024fe8STakashi Iwai snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 59114752412STakashi Iwai 59214752412STakashi Iwai /* update a register, pass without AZX_REG_ prefix */ 59314752412STakashi Iwai #define snd_hdac_stream_updatel(dev, reg, mask, val) \ 59414752412STakashi Iwai snd_hdac_stream_writel(dev, reg, \ 59514752412STakashi Iwai (snd_hdac_stream_readl(dev, reg) & \ 59614752412STakashi Iwai ~(mask)) | (val)) 59714752412STakashi Iwai #define snd_hdac_stream_updatew(dev, reg, mask, val) \ 59814752412STakashi Iwai snd_hdac_stream_writew(dev, reg, \ 59914752412STakashi Iwai (snd_hdac_stream_readw(dev, reg) & \ 60014752412STakashi Iwai ~(mask)) | (val)) 60114752412STakashi Iwai #define snd_hdac_stream_updateb(dev, reg, mask, val) \ 60214752412STakashi Iwai snd_hdac_stream_writeb(dev, reg, \ 60314752412STakashi Iwai (snd_hdac_stream_readb(dev, reg) & \ 60414752412STakashi Iwai ~(mask)) | (val)) 60514752412STakashi Iwai 6068f3f600bSTakashi Iwai #ifdef CONFIG_SND_HDA_DSP_LOADER 6078f3f600bSTakashi Iwai /* DSP lock helpers */ 6088f3f600bSTakashi Iwai #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex) 6098f3f600bSTakashi Iwai #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex) 6108f3f600bSTakashi Iwai #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex) 6118f3f600bSTakashi Iwai #define snd_hdac_stream_is_locked(dev) ((dev)->locked) 6128f3f600bSTakashi Iwai /* DSP loader helpers */ 6138f3f600bSTakashi Iwai int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 6148f3f600bSTakashi Iwai unsigned int byte_size, struct snd_dma_buffer *bufp); 6158f3f600bSTakashi Iwai void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start); 6168f3f600bSTakashi Iwai void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 6178f3f600bSTakashi Iwai struct snd_dma_buffer *dmab); 6188f3f600bSTakashi Iwai #else /* CONFIG_SND_HDA_DSP_LOADER */ 6198f3f600bSTakashi Iwai #define snd_hdac_dsp_lock_init(dev) do {} while (0) 6208f3f600bSTakashi Iwai #define snd_hdac_dsp_lock(dev) do {} while (0) 6218f3f600bSTakashi Iwai #define snd_hdac_dsp_unlock(dev) do {} while (0) 6228f3f600bSTakashi Iwai #define snd_hdac_stream_is_locked(dev) 0 6238f3f600bSTakashi Iwai 6248f3f600bSTakashi Iwai static inline int 6258f3f600bSTakashi Iwai snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 6268f3f600bSTakashi Iwai unsigned int byte_size, struct snd_dma_buffer *bufp) 6278f3f600bSTakashi Iwai { 6288f3f600bSTakashi Iwai return 0; 6298f3f600bSTakashi Iwai } 6308f3f600bSTakashi Iwai 6318f3f600bSTakashi Iwai static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start) 6328f3f600bSTakashi Iwai { 6338f3f600bSTakashi Iwai } 6348f3f600bSTakashi Iwai 6358f3f600bSTakashi Iwai static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 6368f3f600bSTakashi Iwai struct snd_dma_buffer *dmab) 6378f3f600bSTakashi Iwai { 6388f3f600bSTakashi Iwai } 6398f3f600bSTakashi Iwai #endif /* CONFIG_SND_HDA_DSP_LOADER */ 6408f3f600bSTakashi Iwai 6418f3f600bSTakashi Iwai 64271fc4c7eSTakashi Iwai /* 64371fc4c7eSTakashi Iwai * generic array helpers 64471fc4c7eSTakashi Iwai */ 64571fc4c7eSTakashi Iwai void *snd_array_new(struct snd_array *array); 64671fc4c7eSTakashi Iwai void snd_array_free(struct snd_array *array); 64771fc4c7eSTakashi Iwai static inline void snd_array_init(struct snd_array *array, unsigned int size, 64871fc4c7eSTakashi Iwai unsigned int align) 64971fc4c7eSTakashi Iwai { 65071fc4c7eSTakashi Iwai array->elem_size = size; 65171fc4c7eSTakashi Iwai array->alloc_align = align; 65271fc4c7eSTakashi Iwai } 65371fc4c7eSTakashi Iwai 65471fc4c7eSTakashi Iwai static inline void *snd_array_elem(struct snd_array *array, unsigned int idx) 65571fc4c7eSTakashi Iwai { 65671fc4c7eSTakashi Iwai return array->list + idx * array->elem_size; 65771fc4c7eSTakashi Iwai } 65871fc4c7eSTakashi Iwai 65971fc4c7eSTakashi Iwai static inline unsigned int snd_array_index(struct snd_array *array, void *ptr) 66071fc4c7eSTakashi Iwai { 66171fc4c7eSTakashi Iwai return (unsigned long)(ptr - array->list) / array->elem_size; 66271fc4c7eSTakashi Iwai } 66371fc4c7eSTakashi Iwai 664a9c2dfc8STakashi Iwai /* a helper macro to iterate for each snd_array element */ 665a9c2dfc8STakashi Iwai #define snd_array_for_each(array, idx, ptr) \ 666a9c2dfc8STakashi Iwai for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \ 667a9c2dfc8STakashi Iwai (ptr) = snd_array_elem(array, ++(idx))) 668a9c2dfc8STakashi Iwai 669e3d280fcSTakashi Iwai #endif /* __SOUND_HDAUDIO_H */ 670