xref: /linux/include/soc/tegra/mc.h (revision 7fcfa9a2d9a7c1b428d61992c2deaa9e37a437b0)
1 /*
2  * Copyright (C) 2014 NVIDIA Corporation
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 #ifndef __SOC_TEGRA_MC_H__
10 #define __SOC_TEGRA_MC_H__
11 
12 #include <linux/err.h>
13 #include <linux/reset-controller.h>
14 #include <linux/types.h>
15 
16 struct clk;
17 struct device;
18 struct page;
19 
20 struct tegra_smmu_enable {
21 	unsigned int reg;
22 	unsigned int bit;
23 };
24 
25 struct tegra_mc_timing {
26 	unsigned long rate;
27 
28 	u32 *emem_data;
29 };
30 
31 /* latency allowance */
32 struct tegra_mc_la {
33 	unsigned int reg;
34 	unsigned int shift;
35 	unsigned int mask;
36 	unsigned int def;
37 };
38 
39 struct tegra_mc_client {
40 	unsigned int id;
41 	const char *name;
42 	unsigned int swgroup;
43 
44 	unsigned int fifo_size;
45 
46 	struct tegra_smmu_enable smmu;
47 	struct tegra_mc_la la;
48 };
49 
50 struct tegra_smmu_swgroup {
51 	const char *name;
52 	unsigned int swgroup;
53 	unsigned int reg;
54 };
55 
56 struct tegra_smmu_group_soc {
57 	const char *name;
58 	const unsigned int *swgroups;
59 	unsigned int num_swgroups;
60 };
61 
62 struct tegra_smmu_soc {
63 	const struct tegra_mc_client *clients;
64 	unsigned int num_clients;
65 
66 	const struct tegra_smmu_swgroup *swgroups;
67 	unsigned int num_swgroups;
68 
69 	const struct tegra_smmu_group_soc *groups;
70 	unsigned int num_groups;
71 
72 	bool supports_round_robin_arbitration;
73 	bool supports_request_limit;
74 
75 	unsigned int num_tlb_lines;
76 	unsigned int num_asids;
77 };
78 
79 struct tegra_mc;
80 struct tegra_smmu;
81 struct gart_device;
82 
83 #ifdef CONFIG_TEGRA_IOMMU_SMMU
84 struct tegra_smmu *tegra_smmu_probe(struct device *dev,
85 				    const struct tegra_smmu_soc *soc,
86 				    struct tegra_mc *mc);
87 void tegra_smmu_remove(struct tegra_smmu *smmu);
88 #else
89 static inline struct tegra_smmu *
90 tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc,
91 		 struct tegra_mc *mc)
92 {
93 	return NULL;
94 }
95 
96 static inline void tegra_smmu_remove(struct tegra_smmu *smmu)
97 {
98 }
99 #endif
100 
101 #ifdef CONFIG_TEGRA_IOMMU_GART
102 struct gart_device *tegra_gart_probe(struct device *dev, struct tegra_mc *mc);
103 int tegra_gart_suspend(struct gart_device *gart);
104 int tegra_gart_resume(struct gart_device *gart);
105 #else
106 static inline struct gart_device *
107 tegra_gart_probe(struct device *dev, struct tegra_mc *mc)
108 {
109 	return ERR_PTR(-ENODEV);
110 }
111 
112 static inline int tegra_gart_suspend(struct gart_device *gart)
113 {
114 	return -ENODEV;
115 }
116 
117 static inline int tegra_gart_resume(struct gart_device *gart)
118 {
119 	return -ENODEV;
120 }
121 #endif
122 
123 struct tegra_mc_reset {
124 	const char *name;
125 	unsigned long id;
126 	unsigned int control;
127 	unsigned int status;
128 	unsigned int reset;
129 	unsigned int bit;
130 };
131 
132 struct tegra_mc_reset_ops {
133 	int (*hotreset_assert)(struct tegra_mc *mc,
134 			       const struct tegra_mc_reset *rst);
135 	int (*hotreset_deassert)(struct tegra_mc *mc,
136 				 const struct tegra_mc_reset *rst);
137 	int (*block_dma)(struct tegra_mc *mc,
138 			 const struct tegra_mc_reset *rst);
139 	bool (*dma_idling)(struct tegra_mc *mc,
140 			   const struct tegra_mc_reset *rst);
141 	int (*unblock_dma)(struct tegra_mc *mc,
142 			   const struct tegra_mc_reset *rst);
143 	int (*reset_status)(struct tegra_mc *mc,
144 			    const struct tegra_mc_reset *rst);
145 };
146 
147 struct tegra_mc_soc {
148 	const struct tegra_mc_client *clients;
149 	unsigned int num_clients;
150 
151 	const unsigned long *emem_regs;
152 	unsigned int num_emem_regs;
153 
154 	unsigned int num_address_bits;
155 	unsigned int atom_size;
156 
157 	u8 client_id_mask;
158 
159 	const struct tegra_smmu_soc *smmu;
160 
161 	u32 intmask;
162 
163 	const struct tegra_mc_reset_ops *reset_ops;
164 	const struct tegra_mc_reset *resets;
165 	unsigned int num_resets;
166 };
167 
168 struct tegra_mc {
169 	struct device *dev;
170 	struct tegra_smmu *smmu;
171 	struct gart_device *gart;
172 	void __iomem *regs;
173 	struct clk *clk;
174 	int irq;
175 
176 	const struct tegra_mc_soc *soc;
177 	unsigned long tick;
178 
179 	struct tegra_mc_timing *timings;
180 	unsigned int num_timings;
181 
182 	struct reset_controller_dev reset;
183 
184 	spinlock_t lock;
185 };
186 
187 void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
188 unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);
189 
190 #endif /* __SOC_TEGRA_MC_H__ */
191