xref: /linux/include/soc/microchip/mpfs.h (revision 7b8e9264f55a9c320f398e337d215e68cca50131)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  *
4  * Microchip PolarFire SoC (MPFS)
5  *
6  * Copyright (c) 2020 Microchip Corporation. All rights reserved.
7  *
8  * Author: Conor Dooley <conor.dooley@microchip.com>
9  *
10  */
11 
12 #ifndef __SOC_MPFS_H__
13 #define __SOC_MPFS_H__
14 
15 #include <linux/types.h>
16 #include <linux/of_device.h>
17 #include <linux/regmap.h>
18 
19 struct mpfs_sys_controller;
20 
21 struct mpfs_mss_msg {
22 	u8 cmd_opcode;
23 	u16 cmd_data_size;
24 	struct mpfs_mss_response *response;
25 	u8 *cmd_data;
26 	u16 mbox_offset;
27 	u16 resp_offset;
28 };
29 
30 struct mpfs_mss_response {
31 	u32 resp_status;
32 	u32 *resp_msg;
33 	u16 resp_size;
34 };
35 
36 #if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL)
37 
38 int mpfs_blocking_transaction(struct mpfs_sys_controller *mpfs_client, struct mpfs_mss_msg *msg);
39 
40 struct mpfs_sys_controller *mpfs_sys_controller_get(struct device *dev);
41 
42 struct mtd_info *mpfs_sys_controller_get_flash(struct mpfs_sys_controller *mpfs_client);
43 
44 #endif /* if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL) */
45 
46 #if IS_ENABLED(CONFIG_MCHP_CLK_MPFS)
47 #if IS_ENABLED(CONFIG_RESET_POLARFIRE_SOC)
48 int mpfs_reset_controller_register(struct device *clk_dev, struct regmap *map);
49 #else
50 static inline int mpfs_reset_controller_register(struct device *clk_dev, void __iomem *base) { return 0; }
51 #endif /* if IS_ENABLED(CONFIG_RESET_POLARFIRE_SOC) */
52 #endif /* if IS_ENABLED(CONFIG_MCHP_CLK_MPFS) */
53 
54 #endif /* __SOC_MPFS_H__ */
55