xref: /linux/include/soc/imx/revision.h (revision a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0)
1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
29bbef187SShawn Guo /*
39bbef187SShawn Guo  * Copyright 2015 Linaro Ltd.
49bbef187SShawn Guo  */
59bbef187SShawn Guo 
69bbef187SShawn Guo #ifndef __SOC_IMX_REVISION_H__
79bbef187SShawn Guo #define __SOC_IMX_REVISION_H__
89bbef187SShawn Guo 
99bbef187SShawn Guo #define IMX_CHIP_REVISION_1_0		0x10
109bbef187SShawn Guo #define IMX_CHIP_REVISION_1_1		0x11
119bbef187SShawn Guo #define IMX_CHIP_REVISION_1_2		0x12
129bbef187SShawn Guo #define IMX_CHIP_REVISION_1_3		0x13
139bbef187SShawn Guo #define IMX_CHIP_REVISION_1_4		0x14
149bbef187SShawn Guo #define IMX_CHIP_REVISION_1_5		0x15
159bbef187SShawn Guo #define IMX_CHIP_REVISION_2_0		0x20
169bbef187SShawn Guo #define IMX_CHIP_REVISION_2_1		0x21
179bbef187SShawn Guo #define IMX_CHIP_REVISION_2_2		0x22
189bbef187SShawn Guo #define IMX_CHIP_REVISION_2_3		0x23
199bbef187SShawn Guo #define IMX_CHIP_REVISION_3_0		0x30
209bbef187SShawn Guo #define IMX_CHIP_REVISION_3_1		0x31
219bbef187SShawn Guo #define IMX_CHIP_REVISION_3_2		0x32
229bbef187SShawn Guo #define IMX_CHIP_REVISION_3_3		0x33
239bbef187SShawn Guo #define IMX_CHIP_REVISION_UNKNOWN	0xff
249bbef187SShawn Guo 
25*b8a06b12SMartin Kaiser int mx25_revision(void);
269bbef187SShawn Guo int mx27_revision(void);
279bbef187SShawn Guo int mx31_revision(void);
289bbef187SShawn Guo int mx35_revision(void);
299bbef187SShawn Guo int mx51_revision(void);
309bbef187SShawn Guo int mx53_revision(void);
319bbef187SShawn Guo 
329bbef187SShawn Guo unsigned int imx_get_soc_revision(void);
339bbef187SShawn Guo void imx_print_silicon_rev(const char *cpu, int srev);
349bbef187SShawn Guo 
359bbef187SShawn Guo #endif /* __SOC_IMX_REVISION_H__ */
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