xref: /linux/include/soc/fsl/qe/ucc.h (revision 24bce201d79807b668bf9d9e0aca801c5c0d5f78)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.
4  *
5  * Authors: 	Shlomi Gridish <gridish@freescale.com>
6  * 		Li Yang <leoli@freescale.com>
7  *
8  * Description:
9  * Internal header file for UCC unit routines.
10  */
11 #ifndef __UCC_H__
12 #define __UCC_H__
13 
14 #include <soc/fsl/qe/immap_qe.h>
15 #include <soc/fsl/qe/qe.h>
16 
17 #define STATISTICS
18 
19 #define UCC_MAX_NUM	8
20 
21 /* Slow or fast type for UCCs.
22 */
23 enum ucc_speed_type {
24 	UCC_SPEED_TYPE_FAST = UCC_GUEMR_MODE_FAST_RX | UCC_GUEMR_MODE_FAST_TX,
25 	UCC_SPEED_TYPE_SLOW = UCC_GUEMR_MODE_SLOW_RX | UCC_GUEMR_MODE_SLOW_TX
26 };
27 
28 /* ucc_set_type
29  * Sets UCC to slow or fast mode.
30  *
31  * ucc_num - (In) number of UCC (0-7).
32  * speed   - (In) slow or fast mode for UCC.
33  */
34 int ucc_set_type(unsigned int ucc_num, enum ucc_speed_type speed);
35 
36 int ucc_set_qe_mux_mii_mng(unsigned int ucc_num);
37 
38 int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock,
39 	enum comm_dir mode);
40 int ucc_set_tdm_rxtx_clk(unsigned int tdm_num, enum qe_clock clock,
41 			 enum comm_dir mode);
42 int ucc_set_tdm_rxtx_sync(unsigned int tdm_num, enum qe_clock clock,
43 			  enum comm_dir mode);
44 
45 int ucc_mux_set_grant_tsa_bkpt(unsigned int ucc_num, int set, u32 mask);
46 
47 /* QE MUX clock routing for UCC
48 */
49 static inline int ucc_set_qe_mux_grant(unsigned int ucc_num, int set)
50 {
51 	return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_GRANT);
52 }
53 
54 static inline int ucc_set_qe_mux_tsa(unsigned int ucc_num, int set)
55 {
56 	return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_TSA);
57 }
58 
59 static inline int ucc_set_qe_mux_bkpt(unsigned int ucc_num, int set)
60 {
61 	return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_BKPT);
62 }
63 
64 #endif				/* __UCC_H__ */
65