1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * QMC management 4 * 5 * Copyright 2022 CS GROUP France 6 * 7 * Author: Herve Codina <herve.codina@bootlin.com> 8 */ 9 #ifndef __SOC_FSL_QMC_H__ 10 #define __SOC_FSL_QMC_H__ 11 12 #include <linux/bits.h> 13 #include <linux/types.h> 14 15 struct device_node; 16 struct device; 17 struct qmc_chan; 18 19 struct qmc_chan *qmc_chan_get_byphandle(struct device_node *np, const char *phandle_name); 20 void qmc_chan_put(struct qmc_chan *chan); 21 struct qmc_chan *devm_qmc_chan_get_byphandle(struct device *dev, struct device_node *np, 22 const char *phandle_name); 23 24 enum qmc_mode { 25 QMC_TRANSPARENT, 26 QMC_HDLC, 27 }; 28 29 struct qmc_chan_info { 30 enum qmc_mode mode; 31 unsigned long rx_fs_rate; 32 unsigned long rx_bit_rate; 33 u8 nb_rx_ts; 34 unsigned long tx_fs_rate; 35 unsigned long tx_bit_rate; 36 u8 nb_tx_ts; 37 }; 38 39 int qmc_chan_get_info(struct qmc_chan *chan, struct qmc_chan_info *info); 40 41 struct qmc_chan_param { 42 enum qmc_mode mode; 43 union { 44 struct { 45 u16 max_rx_buf_size; 46 u16 max_rx_frame_size; 47 bool is_crc32; 48 } hdlc; 49 struct { 50 u16 max_rx_buf_size; 51 } transp; 52 }; 53 }; 54 55 int qmc_chan_set_param(struct qmc_chan *chan, const struct qmc_chan_param *param); 56 57 int qmc_chan_write_submit(struct qmc_chan *chan, dma_addr_t addr, size_t length, 58 void (*complete)(void *context), void *context); 59 60 /* Flags available (ORed) for read complete() flags parameter in HDLC mode. 61 * No flags are available in transparent mode and the read complete() flags 62 * parameter has no meaning in transparent mode. 63 */ 64 #define QMC_RX_FLAG_HDLC_LAST BIT(11) /* Last in frame */ 65 #define QMC_RX_FLAG_HDLC_FIRST BIT(10) /* First in frame */ 66 #define QMC_RX_FLAG_HDLC_OVF BIT(5) /* Data overflow */ 67 #define QMC_RX_FLAG_HDLC_UNA BIT(4) /* Unaligned (ie. bits received not multiple of 8) */ 68 #define QMC_RX_FLAG_HDLC_ABORT BIT(3) /* Received an abort sequence (seven consecutive ones) */ 69 #define QMC_RX_FLAG_HDLC_CRC BIT(2) /* CRC error */ 70 71 int qmc_chan_read_submit(struct qmc_chan *chan, dma_addr_t addr, size_t length, 72 void (*complete)(void *context, size_t length, 73 unsigned int flags), 74 void *context); 75 76 #define QMC_CHAN_READ (1<<0) 77 #define QMC_CHAN_WRITE (1<<1) 78 #define QMC_CHAN_ALL (QMC_CHAN_READ | QMC_CHAN_WRITE) 79 80 int qmc_chan_start(struct qmc_chan *chan, int direction); 81 int qmc_chan_stop(struct qmc_chan *chan, int direction); 82 int qmc_chan_reset(struct qmc_chan *chan, int direction); 83 84 #endif /* __SOC_FSL_QMC_H__ */ 85