xref: /linux/include/soc/fsl/dpaa2-io.h (revision c83b49383b595be50647f0c764a48c78b5f3c4f8)
1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /*
3  * Copyright 2014-2016 Freescale Semiconductor Inc.
4  * Copyright 2017-2019 NXP
5  *
6  */
7 #ifndef __FSL_DPAA2_IO_H
8 #define __FSL_DPAA2_IO_H
9 
10 #include <linux/types.h>
11 #include <linux/cpumask.h>
12 #include <linux/irqreturn.h>
13 
14 #include "dpaa2-fd.h"
15 #include "dpaa2-global.h"
16 
17 struct dpaa2_io;
18 struct dpaa2_io_store;
19 struct device;
20 
21 /**
22  * DOC: DPIO Service
23  *
24  * The DPIO service provides APIs for users to interact with the datapath
25  * by enqueueing and dequeing frame descriptors.
26  *
27  * The following set of APIs can be used to enqueue and dequeue frames
28  * as well as producing notification callbacks when data is available
29  * for dequeue.
30  */
31 
32 #define DPAA2_IO_ANY_CPU	-1
33 
34 /**
35  * struct dpaa2_io_desc - The DPIO descriptor
36  * @receives_notifications: Use notificaton mode. Non-zero if the DPIO
37  *                  has a channel.
38  * @has_8prio:      Set to non-zero for channel with 8 priority WQs.  Ignored
39  *                  unless receives_notification is TRUE.
40  * @cpu:            The cpu index that at least interrupt handlers will
41  *                  execute on.
42  * @stash_affinity: The stash affinity for this portal favour 'cpu'
43  * @regs_cena:      The cache enabled regs.
44  * @regs_cinh:      The cache inhibited regs
45  * @dpio_id:        The dpio index
46  * @qman_version:   The qman version
47  * @qman_clk:       The qman clock frequency in Hz
48  *
49  * Describes the attributes and features of the DPIO object.
50  */
51 struct dpaa2_io_desc {
52 	int receives_notifications;
53 	int has_8prio;
54 	int cpu;
55 	void *regs_cena;
56 	void __iomem *regs_cinh;
57 	int dpio_id;
58 	u32 qman_version;
59 	u32 qman_clk;
60 };
61 
62 struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc,
63 				 struct device *dev);
64 
65 void dpaa2_io_down(struct dpaa2_io *d);
66 
67 irqreturn_t dpaa2_io_irq(struct dpaa2_io *obj);
68 
69 struct dpaa2_io *dpaa2_io_service_select(int cpu);
70 
71 /**
72  * struct dpaa2_io_notification_ctx - The DPIO notification context structure
73  * @cb:           The callback to be invoked when the notification arrives
74  * @is_cdan:      Zero for FQDAN, non-zero for CDAN
75  * @id:           FQID or channel ID, needed for rearm
76  * @desired_cpu:  The cpu on which the notifications will show up. Use
77  *                DPAA2_IO_ANY_CPU if don't care
78  * @dpio_id:      The dpio index
79  * @qman64:       The 64-bit context value shows up in the FQDAN/CDAN.
80  * @node:         The list node
81  * @dpio_private: The dpio object internal to dpio_service
82  *
83  * Used when a FQDAN/CDAN registration is made by drivers.
84  */
85 struct dpaa2_io_notification_ctx {
86 	void (*cb)(struct dpaa2_io_notification_ctx *ctx);
87 	int is_cdan;
88 	u32 id;
89 	int desired_cpu;
90 	int dpio_id;
91 	u64 qman64;
92 	struct list_head node;
93 	void *dpio_private;
94 };
95 
96 int dpaa2_io_get_cpu(struct dpaa2_io *d);
97 
98 int dpaa2_io_service_register(struct dpaa2_io *service,
99 			      struct dpaa2_io_notification_ctx *ctx,
100 			      struct device *dev);
101 void dpaa2_io_service_deregister(struct dpaa2_io *service,
102 				 struct dpaa2_io_notification_ctx *ctx,
103 				 struct device *dev);
104 int dpaa2_io_service_rearm(struct dpaa2_io *service,
105 			   struct dpaa2_io_notification_ctx *ctx);
106 
107 int dpaa2_io_service_pull_fq(struct dpaa2_io *d, u32 fqid,
108 			     struct dpaa2_io_store *s);
109 int dpaa2_io_service_pull_channel(struct dpaa2_io *d, u32 channelid,
110 				  struct dpaa2_io_store *s);
111 
112 int dpaa2_io_service_enqueue_fq(struct dpaa2_io *d, u32 fqid,
113 				const struct dpaa2_fd *fd);
114 int dpaa2_io_service_enqueue_multiple_fq(struct dpaa2_io *d, u32 fqid,
115 				const struct dpaa2_fd *fd, int number_of_frame);
116 int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d, u32 *fqid,
117 				const struct dpaa2_fd *fd, int number_of_frame);
118 int dpaa2_io_service_enqueue_qd(struct dpaa2_io *d, u32 qdid, u8 prio,
119 				u16 qdbin, const struct dpaa2_fd *fd);
120 int dpaa2_io_service_release(struct dpaa2_io *d, u16 bpid,
121 			     const u64 *buffers, unsigned int num_buffers);
122 int dpaa2_io_service_acquire(struct dpaa2_io *d, u16 bpid,
123 			     u64 *buffers, unsigned int num_buffers);
124 
125 struct dpaa2_io_store *dpaa2_io_store_create(unsigned int max_frames,
126 					     struct device *dev);
127 void dpaa2_io_store_destroy(struct dpaa2_io_store *s);
128 struct dpaa2_dq *dpaa2_io_store_next(struct dpaa2_io_store *s, int *is_last);
129 
130 int dpaa2_io_query_fq_count(struct dpaa2_io *d, u32 fqid,
131 			    u32 *fcnt, u32 *bcnt);
132 int dpaa2_io_query_bp_count(struct dpaa2_io *d, u16 bpid,
133 			    u32 *num);
134 
135 int dpaa2_io_set_irq_coalescing(struct dpaa2_io *d, u32 irq_holdoff);
136 void dpaa2_io_get_irq_coalescing(struct dpaa2_io *d, u32 *irq_holdoff);
137 void dpaa2_io_set_adaptive_coalescing(struct dpaa2_io *d,
138 				      int use_adaptive_rx_coalesce);
139 int dpaa2_io_get_adaptive_coalescing(struct dpaa2_io *d);
140 void dpaa2_io_update_net_dim(struct dpaa2_io *d, __u64 frames, __u64 bytes);
141 #endif /* __FSL_DPAA2_IO_H */
142